1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Machine Code Emitter *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9uint64_t HexagonMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10 SmallVectorImpl<MCFixup> &Fixups,
11 const MCSubtargetInfo &STI) const {
12 static const uint64_t InstBits[] = {
13 UINT64_C(0),
14 UINT64_C(0),
15 UINT64_C(0),
16 UINT64_C(0),
17 UINT64_C(0),
18 UINT64_C(0),
19 UINT64_C(0),
20 UINT64_C(0),
21 UINT64_C(0),
22 UINT64_C(0),
23 UINT64_C(0),
24 UINT64_C(0),
25 UINT64_C(0),
26 UINT64_C(0),
27 UINT64_C(0),
28 UINT64_C(0),
29 UINT64_C(0),
30 UINT64_C(0),
31 UINT64_C(0),
32 UINT64_C(0),
33 UINT64_C(0),
34 UINT64_C(0),
35 UINT64_C(0),
36 UINT64_C(0),
37 UINT64_C(0),
38 UINT64_C(0),
39 UINT64_C(0),
40 UINT64_C(0),
41 UINT64_C(0),
42 UINT64_C(0),
43 UINT64_C(0),
44 UINT64_C(0),
45 UINT64_C(0),
46 UINT64_C(0),
47 UINT64_C(0),
48 UINT64_C(0),
49 UINT64_C(0),
50 UINT64_C(0),
51 UINT64_C(0),
52 UINT64_C(0),
53 UINT64_C(0),
54 UINT64_C(0),
55 UINT64_C(0),
56 UINT64_C(0),
57 UINT64_C(0),
58 UINT64_C(0),
59 UINT64_C(0),
60 UINT64_C(0),
61 UINT64_C(0),
62 UINT64_C(0),
63 UINT64_C(0),
64 UINT64_C(0),
65 UINT64_C(0),
66 UINT64_C(0),
67 UINT64_C(0),
68 UINT64_C(0),
69 UINT64_C(0),
70 UINT64_C(0),
71 UINT64_C(0),
72 UINT64_C(0),
73 UINT64_C(0),
74 UINT64_C(0),
75 UINT64_C(0),
76 UINT64_C(0),
77 UINT64_C(0),
78 UINT64_C(0),
79 UINT64_C(0),
80 UINT64_C(0),
81 UINT64_C(0),
82 UINT64_C(0),
83 UINT64_C(0),
84 UINT64_C(0),
85 UINT64_C(0),
86 UINT64_C(0),
87 UINT64_C(0),
88 UINT64_C(0),
89 UINT64_C(0),
90 UINT64_C(0),
91 UINT64_C(0),
92 UINT64_C(0),
93 UINT64_C(0),
94 UINT64_C(0),
95 UINT64_C(0),
96 UINT64_C(0),
97 UINT64_C(0),
98 UINT64_C(0),
99 UINT64_C(0),
100 UINT64_C(0),
101 UINT64_C(0),
102 UINT64_C(0),
103 UINT64_C(0),
104 UINT64_C(0),
105 UINT64_C(0),
106 UINT64_C(0),
107 UINT64_C(0),
108 UINT64_C(0),
109 UINT64_C(0),
110 UINT64_C(0),
111 UINT64_C(0),
112 UINT64_C(0),
113 UINT64_C(0),
114 UINT64_C(0),
115 UINT64_C(0),
116 UINT64_C(0),
117 UINT64_C(0),
118 UINT64_C(0),
119 UINT64_C(0),
120 UINT64_C(0),
121 UINT64_C(0),
122 UINT64_C(0),
123 UINT64_C(0),
124 UINT64_C(0),
125 UINT64_C(0),
126 UINT64_C(0),
127 UINT64_C(0),
128 UINT64_C(0),
129 UINT64_C(0),
130 UINT64_C(0),
131 UINT64_C(0),
132 UINT64_C(0),
133 UINT64_C(0),
134 UINT64_C(0),
135 UINT64_C(0),
136 UINT64_C(0),
137 UINT64_C(0),
138 UINT64_C(0),
139 UINT64_C(0),
140 UINT64_C(0),
141 UINT64_C(0),
142 UINT64_C(0),
143 UINT64_C(0),
144 UINT64_C(0),
145 UINT64_C(0),
146 UINT64_C(0),
147 UINT64_C(0),
148 UINT64_C(0),
149 UINT64_C(0),
150 UINT64_C(0),
151 UINT64_C(0),
152 UINT64_C(0),
153 UINT64_C(0),
154 UINT64_C(0),
155 UINT64_C(0),
156 UINT64_C(0),
157 UINT64_C(0),
158 UINT64_C(0),
159 UINT64_C(0),
160 UINT64_C(0),
161 UINT64_C(0),
162 UINT64_C(0),
163 UINT64_C(0),
164 UINT64_C(0),
165 UINT64_C(0),
166 UINT64_C(0),
167 UINT64_C(0),
168 UINT64_C(0),
169 UINT64_C(0),
170 UINT64_C(0),
171 UINT64_C(0),
172 UINT64_C(0),
173 UINT64_C(0),
174 UINT64_C(0),
175 UINT64_C(0),
176 UINT64_C(0),
177 UINT64_C(0),
178 UINT64_C(0),
179 UINT64_C(0),
180 UINT64_C(0),
181 UINT64_C(0),
182 UINT64_C(0),
183 UINT64_C(0),
184 UINT64_C(0),
185 UINT64_C(0),
186 UINT64_C(0),
187 UINT64_C(0),
188 UINT64_C(0),
189 UINT64_C(0),
190 UINT64_C(0),
191 UINT64_C(0),
192 UINT64_C(0),
193 UINT64_C(0),
194 UINT64_C(0),
195 UINT64_C(0),
196 UINT64_C(0),
197 UINT64_C(0),
198 UINT64_C(0),
199 UINT64_C(0),
200 UINT64_C(0),
201 UINT64_C(0),
202 UINT64_C(0),
203 UINT64_C(0),
204 UINT64_C(0),
205 UINT64_C(0),
206 UINT64_C(0),
207 UINT64_C(0),
208 UINT64_C(0),
209 UINT64_C(0),
210 UINT64_C(0),
211 UINT64_C(0),
212 UINT64_C(0),
213 UINT64_C(0),
214 UINT64_C(0),
215 UINT64_C(0),
216 UINT64_C(0),
217 UINT64_C(0),
218 UINT64_C(0),
219 UINT64_C(0),
220 UINT64_C(0),
221 UINT64_C(0),
222 UINT64_C(0),
223 UINT64_C(0),
224 UINT64_C(0),
225 UINT64_C(0),
226 UINT64_C(0),
227 UINT64_C(0),
228 UINT64_C(0),
229 UINT64_C(0),
230 UINT64_C(0),
231 UINT64_C(0),
232 UINT64_C(0),
233 UINT64_C(0),
234 UINT64_C(0),
235 UINT64_C(0),
236 UINT64_C(0),
237 UINT64_C(0),
238 UINT64_C(0),
239 UINT64_C(0),
240 UINT64_C(0),
241 UINT64_C(0),
242 UINT64_C(0),
243 UINT64_C(0),
244 UINT64_C(0),
245 UINT64_C(0),
246 UINT64_C(0),
247 UINT64_C(0),
248 UINT64_C(0),
249 UINT64_C(0),
250 UINT64_C(0),
251 UINT64_C(0),
252 UINT64_C(0),
253 UINT64_C(0),
254 UINT64_C(0),
255 UINT64_C(0),
256 UINT64_C(0),
257 UINT64_C(0),
258 UINT64_C(0),
259 UINT64_C(0),
260 UINT64_C(0),
261 UINT64_C(0),
262 UINT64_C(0),
263 UINT64_C(0),
264 UINT64_C(0),
265 UINT64_C(0),
266 UINT64_C(0),
267 UINT64_C(0),
268 UINT64_C(0),
269 UINT64_C(0),
270 UINT64_C(0),
271 UINT64_C(0),
272 UINT64_C(0),
273 UINT64_C(0),
274 UINT64_C(0),
275 UINT64_C(0),
276 UINT64_C(0),
277 UINT64_C(0),
278 UINT64_C(0),
279 UINT64_C(0),
280 UINT64_C(0),
281 UINT64_C(0),
282 UINT64_C(0),
283 UINT64_C(0),
284 UINT64_C(0),
285 UINT64_C(0),
286 UINT64_C(0),
287 UINT64_C(0),
288 UINT64_C(0),
289 UINT64_C(0),
290 UINT64_C(0),
291 UINT64_C(0),
292 UINT64_C(0),
293 UINT64_C(0),
294 UINT64_C(0),
295 UINT64_C(0),
296 UINT64_C(0),
297 UINT64_C(0),
298 UINT64_C(0),
299 UINT64_C(0),
300 UINT64_C(0),
301 UINT64_C(0),
302 UINT64_C(0),
303 UINT64_C(0),
304 UINT64_C(0),
305 UINT64_C(0),
306 UINT64_C(0),
307 UINT64_C(0),
308 UINT64_C(0),
309 UINT64_C(0),
310 UINT64_C(0),
311 UINT64_C(0),
312 UINT64_C(0),
313 UINT64_C(0),
314 UINT64_C(0),
315 UINT64_C(0),
316 UINT64_C(0),
317 UINT64_C(0),
318 UINT64_C(0),
319 UINT64_C(0),
320 UINT64_C(0),
321 UINT64_C(0),
322 UINT64_C(0),
323 UINT64_C(0),
324 UINT64_C(0),
325 UINT64_C(0),
326 UINT64_C(0),
327 UINT64_C(0),
328 UINT64_C(0),
329 UINT64_C(0),
330 UINT64_C(0),
331 UINT64_C(0),
332 UINT64_C(0),
333 UINT64_C(0),
334 UINT64_C(0),
335 UINT64_C(0),
336 UINT64_C(0),
337 UINT64_C(0),
338 UINT64_C(0),
339 UINT64_C(0),
340 UINT64_C(0),
341 UINT64_C(0),
342 UINT64_C(0),
343 UINT64_C(0),
344 UINT64_C(0),
345 UINT64_C(0),
346 UINT64_C(0),
347 UINT64_C(0),
348 UINT64_C(0),
349 UINT64_C(0),
350 UINT64_C(0),
351 UINT64_C(0),
352 UINT64_C(0),
353 UINT64_C(0),
354 UINT64_C(0),
355 UINT64_C(0),
356 UINT64_C(0),
357 UINT64_C(0),
358 UINT64_C(0),
359 UINT64_C(0),
360 UINT64_C(0),
361 UINT64_C(0),
362 UINT64_C(0),
363 UINT64_C(0),
364 UINT64_C(0),
365 UINT64_C(0),
366 UINT64_C(0),
367 UINT64_C(0),
368 UINT64_C(0),
369 UINT64_C(0),
370 UINT64_C(0),
371 UINT64_C(0),
372 UINT64_C(0),
373 UINT64_C(0),
374 UINT64_C(0),
375 UINT64_C(0),
376 UINT64_C(0),
377 UINT64_C(0),
378 UINT64_C(0),
379 UINT64_C(0),
380 UINT64_C(0),
381 UINT64_C(0),
382 UINT64_C(0),
383 UINT64_C(0),
384 UINT64_C(0),
385 UINT64_C(0),
386 UINT64_C(0),
387 UINT64_C(0),
388 UINT64_C(0),
389 UINT64_C(0),
390 UINT64_C(0),
391 UINT64_C(0),
392 UINT64_C(0),
393 UINT64_C(0),
394 UINT64_C(0),
395 UINT64_C(0),
396 UINT64_C(0),
397 UINT64_C(0),
398 UINT64_C(0),
399 UINT64_C(0),
400 UINT64_C(0),
401 UINT64_C(0),
402 UINT64_C(0),
403 UINT64_C(0),
404 UINT64_C(0),
405 UINT64_C(0),
406 UINT64_C(0),
407 UINT64_C(0),
408 UINT64_C(0),
409 UINT64_C(0),
410 UINT64_C(0),
411 UINT64_C(0),
412 UINT64_C(0),
413 UINT64_C(0),
414 UINT64_C(0),
415 UINT64_C(0),
416 UINT64_C(0),
417 UINT64_C(0),
418 UINT64_C(0),
419 UINT64_C(0),
420 UINT64_C(0),
421 UINT64_C(0),
422 UINT64_C(0),
423 UINT64_C(0),
424 UINT64_C(0),
425 UINT64_C(0),
426 UINT64_C(0),
427 UINT64_C(0),
428 UINT64_C(0),
429 UINT64_C(0),
430 UINT64_C(0),
431 UINT64_C(0),
432 UINT64_C(0),
433 UINT64_C(0),
434 UINT64_C(0),
435 UINT64_C(0),
436 UINT64_C(0),
437 UINT64_C(0),
438 UINT64_C(0),
439 UINT64_C(0),
440 UINT64_C(0),
441 UINT64_C(0),
442 UINT64_C(0),
443 UINT64_C(0),
444 UINT64_C(0),
445 UINT64_C(0),
446 UINT64_C(0),
447 UINT64_C(0),
448 UINT64_C(0),
449 UINT64_C(0),
450 UINT64_C(0),
451 UINT64_C(0),
452 UINT64_C(0),
453 UINT64_C(0),
454 UINT64_C(0),
455 UINT64_C(0),
456 UINT64_C(0),
457 UINT64_C(0),
458 UINT64_C(0),
459 UINT64_C(0),
460 UINT64_C(0),
461 UINT64_C(0),
462 UINT64_C(0),
463 UINT64_C(0),
464 UINT64_C(0),
465 UINT64_C(0),
466 UINT64_C(0),
467 UINT64_C(0),
468 UINT64_C(0),
469 UINT64_C(0),
470 UINT64_C(0),
471 UINT64_C(0),
472 UINT64_C(0),
473 UINT64_C(0),
474 UINT64_C(0),
475 UINT64_C(0),
476 UINT64_C(0),
477 UINT64_C(0),
478 UINT64_C(0),
479 UINT64_C(0),
480 UINT64_C(0),
481 UINT64_C(0),
482 UINT64_C(0),
483 UINT64_C(0),
484 UINT64_C(0),
485 UINT64_C(0),
486 UINT64_C(0),
487 UINT64_C(0),
488 UINT64_C(0),
489 UINT64_C(0),
490 UINT64_C(0),
491 UINT64_C(0),
492 UINT64_C(0),
493 UINT64_C(0),
494 UINT64_C(0),
495 UINT64_C(0),
496 UINT64_C(0),
497 UINT64_C(0),
498 UINT64_C(0),
499 UINT64_C(0),
500 UINT64_C(0),
501 UINT64_C(0),
502 UINT64_C(0),
503 UINT64_C(0),
504 UINT64_C(0),
505 UINT64_C(0),
506 UINT64_C(0),
507 UINT64_C(0),
508 UINT64_C(0),
509 UINT64_C(0),
510 UINT64_C(0),
511 UINT64_C(0),
512 UINT64_C(0),
513 UINT64_C(0),
514 UINT64_C(0),
515 UINT64_C(0),
516 UINT64_C(0),
517 UINT64_C(0),
518 UINT64_C(0),
519 UINT64_C(0),
520 UINT64_C(0),
521 UINT64_C(0),
522 UINT64_C(0),
523 UINT64_C(0),
524 UINT64_C(0),
525 UINT64_C(0),
526 UINT64_C(0),
527 UINT64_C(0),
528 UINT64_C(0),
529 UINT64_C(0),
530 UINT64_C(0),
531 UINT64_C(0),
532 UINT64_C(0),
533 UINT64_C(0),
534 UINT64_C(0),
535 UINT64_C(0),
536 UINT64_C(0),
537 UINT64_C(0),
538 UINT64_C(0),
539 UINT64_C(0),
540 UINT64_C(0),
541 UINT64_C(0),
542 UINT64_C(0),
543 UINT64_C(0),
544 UINT64_C(0),
545 UINT64_C(0),
546 UINT64_C(0),
547 UINT64_C(0),
548 UINT64_C(0),
549 UINT64_C(0),
550 UINT64_C(0),
551 UINT64_C(0),
552 UINT64_C(0),
553 UINT64_C(0),
554 UINT64_C(0),
555 UINT64_C(0),
556 UINT64_C(0),
557 UINT64_C(0),
558 UINT64_C(0),
559 UINT64_C(0),
560 UINT64_C(0),
561 UINT64_C(0),
562 UINT64_C(0),
563 UINT64_C(0),
564 UINT64_C(0),
565 UINT64_C(0),
566 UINT64_C(0),
567 UINT64_C(0),
568 UINT64_C(0),
569 UINT64_C(0),
570 UINT64_C(0),
571 UINT64_C(0),
572 UINT64_C(0),
573 UINT64_C(0),
574 UINT64_C(0),
575 UINT64_C(0),
576 UINT64_C(0),
577 UINT64_C(0),
578 UINT64_C(0),
579 UINT64_C(0),
580 UINT64_C(0),
581 UINT64_C(0),
582 UINT64_C(0),
583 UINT64_C(0),
584 UINT64_C(0),
585 UINT64_C(0),
586 UINT64_C(0),
587 UINT64_C(0),
588 UINT64_C(0),
589 UINT64_C(0),
590 UINT64_C(0),
591 UINT64_C(0),
592 UINT64_C(0),
593 UINT64_C(0),
594 UINT64_C(0),
595 UINT64_C(0),
596 UINT64_C(0),
597 UINT64_C(0),
598 UINT64_C(0),
599 UINT64_C(0),
600 UINT64_C(0),
601 UINT64_C(0),
602 UINT64_C(0),
603 UINT64_C(0),
604 UINT64_C(0),
605 UINT64_C(0),
606 UINT64_C(0),
607 UINT64_C(0),
608 UINT64_C(0),
609 UINT64_C(0),
610 UINT64_C(0),
611 UINT64_C(0),
612 UINT64_C(0),
613 UINT64_C(0),
614 UINT64_C(0),
615 UINT64_C(0),
616 UINT64_C(0),
617 UINT64_C(0),
618 UINT64_C(0),
619 UINT64_C(0),
620 UINT64_C(0),
621 UINT64_C(0),
622 UINT64_C(0),
623 UINT64_C(0),
624 UINT64_C(0),
625 UINT64_C(0),
626 UINT64_C(0),
627 UINT64_C(0),
628 UINT64_C(0),
629 UINT64_C(0),
630 UINT64_C(0),
631 UINT64_C(0),
632 UINT64_C(0),
633 UINT64_C(0),
634 UINT64_C(0),
635 UINT64_C(0),
636 UINT64_C(0),
637 UINT64_C(0),
638 UINT64_C(0),
639 UINT64_C(0),
640 UINT64_C(0),
641 UINT64_C(0),
642 UINT64_C(0),
643 UINT64_C(0),
644 UINT64_C(0),
645 UINT64_C(0),
646 UINT64_C(0),
647 UINT64_C(0),
648 UINT64_C(0),
649 UINT64_C(0),
650 UINT64_C(0),
651 UINT64_C(0),
652 UINT64_C(0),
653 UINT64_C(0),
654 UINT64_C(0),
655 UINT64_C(0),
656 UINT64_C(0),
657 UINT64_C(0),
658 UINT64_C(0),
659 UINT64_C(0),
660 UINT64_C(0),
661 UINT64_C(0),
662 UINT64_C(0),
663 UINT64_C(0),
664 UINT64_C(0),
665 UINT64_C(0),
666 UINT64_C(0),
667 UINT64_C(0),
668 UINT64_C(0),
669 UINT64_C(0),
670 UINT64_C(0),
671 UINT64_C(0),
672 UINT64_C(0),
673 UINT64_C(0),
674 UINT64_C(0),
675 UINT64_C(0),
676 UINT64_C(0),
677 UINT64_C(0),
678 UINT64_C(0),
679 UINT64_C(0),
680 UINT64_C(0),
681 UINT64_C(0),
682 UINT64_C(0),
683 UINT64_C(0),
684 UINT64_C(0),
685 UINT64_C(0),
686 UINT64_C(0),
687 UINT64_C(0),
688 UINT64_C(0),
689 UINT64_C(0),
690 UINT64_C(0),
691 UINT64_C(0),
692 UINT64_C(0),
693 UINT64_C(0),
694 UINT64_C(0),
695 UINT64_C(0),
696 UINT64_C(0),
697 UINT64_C(0),
698 UINT64_C(0),
699 UINT64_C(0),
700 UINT64_C(0),
701 UINT64_C(0),
702 UINT64_C(0),
703 UINT64_C(0),
704 UINT64_C(0),
705 UINT64_C(0),
706 UINT64_C(0),
707 UINT64_C(0),
708 UINT64_C(0),
709 UINT64_C(0),
710 UINT64_C(0),
711 UINT64_C(0),
712 UINT64_C(0),
713 UINT64_C(0),
714 UINT64_C(0),
715 UINT64_C(0),
716 UINT64_C(0),
717 UINT64_C(0),
718 UINT64_C(0),
719 UINT64_C(0),
720 UINT64_C(0),
721 UINT64_C(0),
722 UINT64_C(0),
723 UINT64_C(0),
724 UINT64_C(0),
725 UINT64_C(0),
726 UINT64_C(0),
727 UINT64_C(0),
728 UINT64_C(0),
729 UINT64_C(0),
730 UINT64_C(0),
731 UINT64_C(0),
732 UINT64_C(0),
733 UINT64_C(0),
734 UINT64_C(0),
735 UINT64_C(0),
736 UINT64_C(0),
737 UINT64_C(0),
738 UINT64_C(0),
739 UINT64_C(0),
740 UINT64_C(0),
741 UINT64_C(0),
742 UINT64_C(0),
743 UINT64_C(0),
744 UINT64_C(0),
745 UINT64_C(0),
746 UINT64_C(0),
747 UINT64_C(0),
748 UINT64_C(0),
749 UINT64_C(0),
750 UINT64_C(0),
751 UINT64_C(0),
752 UINT64_C(0),
753 UINT64_C(0),
754 UINT64_C(0),
755 UINT64_C(0),
756 UINT64_C(0),
757 UINT64_C(0),
758 UINT64_C(0),
759 UINT64_C(0),
760 UINT64_C(0),
761 UINT64_C(0),
762 UINT64_C(0),
763 UINT64_C(0),
764 UINT64_C(0),
765 UINT64_C(0),
766 UINT64_C(0),
767 UINT64_C(0),
768 UINT64_C(0),
769 UINT64_C(0),
770 UINT64_C(0),
771 UINT64_C(0),
772 UINT64_C(0),
773 UINT64_C(0),
774 UINT64_C(0),
775 UINT64_C(0),
776 UINT64_C(0),
777 UINT64_C(0),
778 UINT64_C(0),
779 UINT64_C(0),
780 UINT64_C(0),
781 UINT64_C(0),
782 UINT64_C(0),
783 UINT64_C(0),
784 UINT64_C(0),
785 UINT64_C(0),
786 UINT64_C(0),
787 UINT64_C(0),
788 UINT64_C(0),
789 UINT64_C(0),
790 UINT64_C(0),
791 UINT64_C(0),
792 UINT64_C(0),
793 UINT64_C(0),
794 UINT64_C(0),
795 UINT64_C(0),
796 UINT64_C(0),
797 UINT64_C(0),
798 UINT64_C(0),
799 UINT64_C(0),
800 UINT64_C(0),
801 UINT64_C(0),
802 UINT64_C(0),
803 UINT64_C(0),
804 UINT64_C(0),
805 UINT64_C(0),
806 UINT64_C(0),
807 UINT64_C(0),
808 UINT64_C(0),
809 UINT64_C(0),
810 UINT64_C(0),
811 UINT64_C(0),
812 UINT64_C(0),
813 UINT64_C(0),
814 UINT64_C(0),
815 UINT64_C(0),
816 UINT64_C(0),
817 UINT64_C(0),
818 UINT64_C(0),
819 UINT64_C(0),
820 UINT64_C(0),
821 UINT64_C(0),
822 UINT64_C(0),
823 UINT64_C(0),
824 UINT64_C(0),
825 UINT64_C(0),
826 UINT64_C(0),
827 UINT64_C(0),
828 UINT64_C(0),
829 UINT64_C(0),
830 UINT64_C(0),
831 UINT64_C(0),
832 UINT64_C(2357198976), // A2_abs
833 UINT64_C(2155872448), // A2_absp
834 UINT64_C(2357199008), // A2_abssat
835 UINT64_C(4076863488), // A2_add
836 UINT64_C(3577741408), // A2_addh_h16_hh
837 UINT64_C(3577741376), // A2_addh_h16_hl
838 UINT64_C(3577741344), // A2_addh_h16_lh
839 UINT64_C(3577741312), // A2_addh_h16_ll
840 UINT64_C(3577741536), // A2_addh_h16_sat_hh
841 UINT64_C(3577741504), // A2_addh_h16_sat_hl
842 UINT64_C(3577741472), // A2_addh_h16_sat_lh
843 UINT64_C(3577741440), // A2_addh_h16_sat_ll
844 UINT64_C(3573547072), // A2_addh_l16_hl
845 UINT64_C(3573547008), // A2_addh_l16_ll
846 UINT64_C(3573547200), // A2_addh_l16_sat_hl
847 UINT64_C(3573547136), // A2_addh_l16_sat_ll
848 UINT64_C(2952790016), // A2_addi
849 UINT64_C(3539992800), // A2_addp
850 UINT64_C(3546284192), // A2_addpsat
851 UINT64_C(4131389440), // A2_addsat
852 UINT64_C(3546284256), // A2_addsph
853 UINT64_C(3546284224), // A2_addspl
854 UINT64_C(4043309056), // A2_and
855 UINT64_C(1979711488), // A2_andir
856 UINT64_C(3554672640), // A2_andp
857 UINT64_C(1879048192), // A2_aslh
858 UINT64_C(1881145344), // A2_asrh
859 UINT64_C(4085252096), // A2_combine_hh
860 UINT64_C(4087349248), // A2_combine_hl
861 UINT64_C(4089446400), // A2_combine_lh
862 UINT64_C(4091543552), // A2_combine_ll
863 UINT64_C(2080374784), // A2_combineii
864 UINT64_C(4110417920), // A2_combinew
865 UINT64_C(3586129920), // A2_max
866 UINT64_C(3552575616), // A2_maxp
867 UINT64_C(3586130048), // A2_maxu
868 UINT64_C(3552575648), // A2_maxup
869 UINT64_C(3584032768), // A2_min
870 UINT64_C(3550478528), // A2_minp
871 UINT64_C(3584032896), // A2_minu
872 UINT64_C(3550478560), // A2_minup
873 UINT64_C(2155872416), // A2_negp
874 UINT64_C(2357199040), // A2_negsat
875 UINT64_C(2130706432), // A2_nop
876 UINT64_C(2155872384), // A2_notp
877 UINT64_C(4045406208), // A2_or
878 UINT64_C(1988100096), // A2_orir
879 UINT64_C(3554672704), // A2_orp
880 UINT64_C(4211081344), // A2_paddf
881 UINT64_C(4211089536), // A2_paddfnew
882 UINT64_C(1954545664), // A2_paddif
883 UINT64_C(1954553856), // A2_paddifnew
884 UINT64_C(1946157056), // A2_paddit
885 UINT64_C(1946165248), // A2_padditnew
886 UINT64_C(4211081216), // A2_paddt
887 UINT64_C(4211089408), // A2_paddtnew
888 UINT64_C(4177526912), // A2_pandf
889 UINT64_C(4177535104), // A2_pandfnew
890 UINT64_C(4177526784), // A2_pandt
891 UINT64_C(4177534976), // A2_pandtnew
892 UINT64_C(4179624064), // A2_porf
893 UINT64_C(4179632256), // A2_porfnew
894 UINT64_C(4179623936), // A2_port
895 UINT64_C(4179632128), // A2_portnew
896 UINT64_C(4213178496), // A2_psubf
897 UINT64_C(4213186688), // A2_psubfnew
898 UINT64_C(4213178368), // A2_psubt
899 UINT64_C(4213186560), // A2_psubtnew
900 UINT64_C(4183818368), // A2_pxorf
901 UINT64_C(4183826560), // A2_pxorfnew
902 UINT64_C(4183818240), // A2_pxort
903 UINT64_C(4183826432), // A2_pxortnew
904 UINT64_C(2294284320), // A2_roundsat
905 UINT64_C(2294284288), // A2_sat
906 UINT64_C(2361393376), // A2_satb
907 UINT64_C(2361393280), // A2_sath
908 UINT64_C(2361393344), // A2_satub
909 UINT64_C(2361393312), // A2_satuh
910 UINT64_C(4078960640), // A2_sub
911 UINT64_C(3579838560), // A2_subh_h16_hh
912 UINT64_C(3579838528), // A2_subh_h16_hl
913 UINT64_C(3579838496), // A2_subh_h16_lh
914 UINT64_C(3579838464), // A2_subh_h16_ll
915 UINT64_C(3579838688), // A2_subh_h16_sat_hh
916 UINT64_C(3579838656), // A2_subh_h16_sat_hl
917 UINT64_C(3579838624), // A2_subh_h16_sat_lh
918 UINT64_C(3579838592), // A2_subh_h16_sat_ll
919 UINT64_C(3575644224), // A2_subh_l16_hl
920 UINT64_C(3575644160), // A2_subh_l16_ll
921 UINT64_C(3575644352), // A2_subh_l16_sat_hl
922 UINT64_C(3575644288), // A2_subh_l16_sat_ll
923 UINT64_C(3542089952), // A2_subp
924 UINT64_C(1983905792), // A2_subri
925 UINT64_C(4139778048), // A2_subsat
926 UINT64_C(4127195136), // A2_svaddh
927 UINT64_C(4129292288), // A2_svaddhs
928 UINT64_C(4133486592), // A2_svadduhs
929 UINT64_C(4143972352), // A2_svavgh
930 UINT64_C(4146069504), // A2_svavghs
931 UINT64_C(4150263808), // A2_svnavgh
932 UINT64_C(4135583744), // A2_svsubh
933 UINT64_C(4137680896), // A2_svsubhs
934 UINT64_C(4141875200), // A2_svsubuhs
935 UINT64_C(2357199072), // A2_swiz
936 UINT64_C(1889533952), // A2_sxtb
937 UINT64_C(1893728256), // A2_sxth
938 UINT64_C(2218786816), // A2_sxtw
939 UINT64_C(1885339648), // A2_tfr
940 UINT64_C(1778384896), // A2_tfrcrr
941 UINT64_C(1914699776), // A2_tfrih
942 UINT64_C(1897922560), // A2_tfril
943 UINT64_C(1646264320), // A2_tfrrcr
944 UINT64_C(2013265920), // A2_tfrsi
945 UINT64_C(2151678080), // A2_vabsh
946 UINT64_C(2151678112), // A2_vabshsat
947 UINT64_C(2151678144), // A2_vabsw
948 UINT64_C(2151678176), // A2_vabswsat
949 UINT64_C(3539992640), // A2_vaddh
950 UINT64_C(3539992672), // A2_vaddhs
951 UINT64_C(3539992576), // A2_vaddub
952 UINT64_C(3539992608), // A2_vaddubs
953 UINT64_C(3539992704), // A2_vadduhs
954 UINT64_C(3539992736), // A2_vaddw
955 UINT64_C(3539992768), // A2_vaddws
956 UINT64_C(3544186944), // A2_vavgh
957 UINT64_C(3544187008), // A2_vavghcr
958 UINT64_C(3544186976), // A2_vavghr
959 UINT64_C(3544186880), // A2_vavgub
960 UINT64_C(3544186912), // A2_vavgubr
961 UINT64_C(3544187040), // A2_vavguh
962 UINT64_C(3544187072), // A2_vavguhr
963 UINT64_C(3546284128), // A2_vavguw
964 UINT64_C(3546284160), // A2_vavguwr
965 UINT64_C(3546284032), // A2_vavgw
966 UINT64_C(3546284096), // A2_vavgwcr
967 UINT64_C(3546284064), // A2_vavgwr
968 UINT64_C(3523215552), // A2_vcmpbeq
969 UINT64_C(3523215584), // A2_vcmpbgtu
970 UINT64_C(3523215456), // A2_vcmpheq
971 UINT64_C(3523215488), // A2_vcmphgt
972 UINT64_C(3523215520), // A2_vcmphgtu
973 UINT64_C(3523215360), // A2_vcmpweq
974 UINT64_C(3523215392), // A2_vcmpwgt
975 UINT64_C(3523215424), // A2_vcmpwgtu
976 UINT64_C(2155872480), // A2_vconj
977 UINT64_C(3552575680), // A2_vmaxb
978 UINT64_C(3552575520), // A2_vmaxh
979 UINT64_C(3552575488), // A2_vmaxub
980 UINT64_C(3552575552), // A2_vmaxuh
981 UINT64_C(3550478496), // A2_vmaxuw
982 UINT64_C(3552575584), // A2_vmaxw
983 UINT64_C(3552575712), // A2_vminb
984 UINT64_C(3550478368), // A2_vminh
985 UINT64_C(3550478336), // A2_vminub
986 UINT64_C(3550478400), // A2_vminuh
987 UINT64_C(3550478464), // A2_vminuw
988 UINT64_C(3550478432), // A2_vminw
989 UINT64_C(3548381184), // A2_vnavgh
990 UINT64_C(3548381248), // A2_vnavghcr
991 UINT64_C(3548381216), // A2_vnavghr
992 UINT64_C(3548381280), // A2_vnavgw
993 UINT64_C(3548381376), // A2_vnavgwcr
994 UINT64_C(3548381312), // A2_vnavgwr
995 UINT64_C(3896508448), // A2_vraddub
996 UINT64_C(3930062880), // A2_vraddub_acc
997 UINT64_C(3896508480), // A2_vrsadub
998 UINT64_C(3930062912), // A2_vrsadub_acc
999 UINT64_C(3542089792), // A2_vsubh
1000 UINT64_C(3542089824), // A2_vsubhs
1001 UINT64_C(3542089728), // A2_vsubub
1002 UINT64_C(3542089760), // A2_vsububs
1003 UINT64_C(3542089856), // A2_vsubuhs
1004 UINT64_C(3542089888), // A2_vsubw
1005 UINT64_C(3542089920), // A2_vsubws
1006 UINT64_C(4049600512), // A2_xor
1007 UINT64_C(3554672768), // A2_xorp
1008 UINT64_C(1891631104), // A2_zxth
1009 UINT64_C(3267362816), // A4_addp_c
1010 UINT64_C(4051697664), // A4_andn
1011 UINT64_C(3554672672), // A4_andnp
1012 UINT64_C(3558866944), // A4_bitsplit
1013 UINT64_C(2294284416), // A4_bitspliti
1014 UINT64_C(3523223712), // A4_boundscheck_hi
1015 UINT64_C(3523223680), // A4_boundscheck_lo
1016 UINT64_C(3351249088), // A4_cmpbeq
1017 UINT64_C(3707764736), // A4_cmpbeqi
1018 UINT64_C(3351248960), // A4_cmpbgt
1019 UINT64_C(3709861888), // A4_cmpbgti
1020 UINT64_C(3351249120), // A4_cmpbgtu
1021 UINT64_C(3711959040), // A4_cmpbgtui
1022 UINT64_C(3351248992), // A4_cmpheq
1023 UINT64_C(3707764744), // A4_cmpheqi
1024 UINT64_C(3351249024), // A4_cmphgt
1025 UINT64_C(3709861896), // A4_cmphgti
1026 UINT64_C(3351249056), // A4_cmphgtu
1027 UINT64_C(3711959048), // A4_cmphgtui
1028 UINT64_C(2088763392), // A4_combineii
1029 UINT64_C(1931485184), // A4_combineir
1030 UINT64_C(1929388032), // A4_combineri
1031 UINT64_C(2363490304), // A4_cround_ri
1032 UINT64_C(3334471680), // A4_cround_rr
1033 UINT64_C(0), // A4_ext
1034 UINT64_C(3554672864), // A4_modwrapu
1035 UINT64_C(4053794816), // A4_orn
1036 UINT64_C(3554672736), // A4_ornp
1037 UINT64_C(1879058432), // A4_paslhf
1038 UINT64_C(1879059456), // A4_paslhfnew
1039 UINT64_C(1879056384), // A4_paslht
1040 UINT64_C(1879057408), // A4_paslhtnew
1041 UINT64_C(1881155584), // A4_pasrhf
1042 UINT64_C(1881156608), // A4_pasrhfnew
1043 UINT64_C(1881153536), // A4_pasrht
1044 UINT64_C(1881154560), // A4_pasrhtnew
1045 UINT64_C(1889544192), // A4_psxtbf
1046 UINT64_C(1889545216), // A4_psxtbfnew
1047 UINT64_C(1889542144), // A4_psxtbt
1048 UINT64_C(1889543168), // A4_psxtbtnew
1049 UINT64_C(1893738496), // A4_psxthf
1050 UINT64_C(1893739520), // A4_psxthfnew
1051 UINT64_C(1893736448), // A4_psxtht
1052 UINT64_C(1893737472), // A4_psxthtnew
1053 UINT64_C(1887447040), // A4_pzxtbf
1054 UINT64_C(1887448064), // A4_pzxtbfnew
1055 UINT64_C(1887444992), // A4_pzxtbt
1056 UINT64_C(1887446016), // A4_pzxtbtnew
1057 UINT64_C(1891641344), // A4_pzxthf
1058 UINT64_C(1891642368), // A4_pzxthfnew
1059 UINT64_C(1891639296), // A4_pzxtht
1060 UINT64_C(1891640320), // A4_pzxthtnew
1061 UINT64_C(4081057792), // A4_rcmpeq
1062 UINT64_C(1933582336), // A4_rcmpeqi
1063 UINT64_C(4083154944), // A4_rcmpneq
1064 UINT64_C(1935679488), // A4_rcmpneqi
1065 UINT64_C(2363490432), // A4_round_ri
1066 UINT64_C(2363490496), // A4_round_ri_sat
1067 UINT64_C(3334471808), // A4_round_rr
1068 UINT64_C(3334471872), // A4_round_rr_sat
1069 UINT64_C(3269459968), // A4_subp_c
1070 UINT64_C(1744830464), // A4_tfrcpp
1071 UINT64_C(1663041536), // A4_tfrpcp
1072 UINT64_C(3523223648), // A4_tlbmatch
1073 UINT64_C(3523223552), // A4_vcmpbeq_any
1074 UINT64_C(3690987520), // A4_vcmpbeqi
1075 UINT64_C(3523223616), // A4_vcmpbgt
1076 UINT64_C(3693084672), // A4_vcmpbgti
1077 UINT64_C(3695181824), // A4_vcmpbgtui
1078 UINT64_C(3690987528), // A4_vcmpheqi
1079 UINT64_C(3693084680), // A4_vcmphgti
1080 UINT64_C(3695181832), // A4_vcmphgtui
1081 UINT64_C(3690987536), // A4_vcmpweqi
1082 UINT64_C(3693084688), // A4_vcmpwgti
1083 UINT64_C(3695181840), // A4_vcmpwgtui
1084 UINT64_C(3407872032), // A4_vrmaxh
1085 UINT64_C(3407880224), // A4_vrmaxuh
1086 UINT64_C(3407880256), // A4_vrmaxuw
1087 UINT64_C(3407872064), // A4_vrmaxw
1088 UINT64_C(3407872160), // A4_vrminh
1089 UINT64_C(3407880352), // A4_vrminuh
1090 UINT64_C(3407880384), // A4_vrminuw
1091 UINT64_C(3407872192), // A4_vrminw
1092 UINT64_C(3936354304), // A5_ACS
1093 UINT64_C(3242197024), // A5_vaddhubs
1094 UINT64_C(3523223584), // A6_vcmpbeq_notany
1095 UINT64_C(3940548608), // A6_vminub_RdP
1096 UINT64_C(2294284448), // A7_clip
1097 UINT64_C(2363490368), // A7_croundd_ri
1098 UINT64_C(3334471744), // A7_croundd_rr
1099 UINT64_C(2294284480), // A7_vclip
1100 UINT64_C(1805647872), // C2_all8
1101 UINT64_C(1795162112), // C2_and
1102 UINT64_C(1801453568), // C2_andn
1103 UINT64_C(1803550720), // C2_any8
1104 UINT64_C(3347054592), // C2_bitsclr
1105 UINT64_C(2239758336), // C2_bitsclri
1106 UINT64_C(3342860288), // C2_bitsset
1107 UINT64_C(4244635776), // C2_ccombinewf
1108 UINT64_C(4244643968), // C2_ccombinewnewf
1109 UINT64_C(4244643840), // C2_ccombinewnewt
1110 UINT64_C(4244635648), // C2_ccombinewt
1111 UINT64_C(2122317824), // C2_cmoveif
1112 UINT64_C(2113929216), // C2_cmoveit
1113 UINT64_C(2122326016), // C2_cmovenewif
1114 UINT64_C(2113937408), // C2_cmovenewit
1115 UINT64_C(4060086272), // C2_cmpeq
1116 UINT64_C(1962934272), // C2_cmpeqi
1117 UINT64_C(3531603968), // C2_cmpeqp
1118 UINT64_C(4064280576), // C2_cmpgt
1119 UINT64_C(1967128576), // C2_cmpgti
1120 UINT64_C(3531604032), // C2_cmpgtp
1121 UINT64_C(4066377728), // C2_cmpgtu
1122 UINT64_C(1971322880), // C2_cmpgtui
1123 UINT64_C(3531604096), // C2_cmpgtup
1124 UINT64_C(2248146944), // C2_mask
1125 UINT64_C(4093640704), // C2_mux
1126 UINT64_C(2046820352), // C2_muxii
1127 UINT64_C(1929379840), // C2_muxir
1128 UINT64_C(1937768448), // C2_muxri
1129 UINT64_C(1807745024), // C2_not
1130 UINT64_C(1797259264), // C2_or
1131 UINT64_C(1809842176), // C2_orn
1132 UINT64_C(2302672896), // C2_tfrpr
1133 UINT64_C(2235564032), // C2_tfrrp
1134 UINT64_C(2298478592), // C2_vitpack
1135 UINT64_C(3506438144), // C2_vmux
1136 UINT64_C(1799356416), // C2_xor
1137 UINT64_C(1783169024), // C4_addipc
1138 UINT64_C(1796210688), // C4_and_and
1139 UINT64_C(1804599296), // C4_and_andn
1140 UINT64_C(1798307840), // C4_and_or
1141 UINT64_C(1806696448), // C4_and_orn
1142 UINT64_C(4064280592), // C4_cmplte
1143 UINT64_C(1967128592), // C4_cmpltei
1144 UINT64_C(4066377744), // C4_cmplteu
1145 UINT64_C(1971322896), // C4_cmplteui
1146 UINT64_C(4060086288), // C4_cmpneq
1147 UINT64_C(1962934288), // C4_cmpneqi
1148 UINT64_C(1795170448), // C4_fastcorner9
1149 UINT64_C(1796219024), // C4_fastcorner9_not
1150 UINT64_C(3349151744), // C4_nbitsclr
1151 UINT64_C(2241855488), // C4_nbitsclri
1152 UINT64_C(3344957440), // C4_nbitsset
1153 UINT64_C(1800404992), // C4_or_and
1154 UINT64_C(1808793600), // C4_or_andn
1155 UINT64_C(1802502144), // C4_or_or
1156 UINT64_C(1810890752), // C4_or_orn
1157 UINT64_C(1509949440), // CALLProfile
1158 UINT64_C(0), // CONST32
1159 UINT64_C(0), // CONST64
1160 UINT64_C(0), // DuplexIClass0
1161 UINT64_C(8192), // DuplexIClass1
1162 UINT64_C(536870912), // DuplexIClass2
1163 UINT64_C(536879104), // DuplexIClass3
1164 UINT64_C(1073741824), // DuplexIClass4
1165 UINT64_C(1073750016), // DuplexIClass5
1166 UINT64_C(1610612736), // DuplexIClass6
1167 UINT64_C(1610620928), // DuplexIClass7
1168 UINT64_C(2147483648), // DuplexIClass8
1169 UINT64_C(2147491840), // DuplexIClass9
1170 UINT64_C(2684354560), // DuplexIClassA
1171 UINT64_C(2684362752), // DuplexIClassB
1172 UINT64_C(3221225472), // DuplexIClassC
1173 UINT64_C(3221233664), // DuplexIClassD
1174 UINT64_C(3758096384), // DuplexIClassE
1175 UINT64_C(3758104576), // DuplexIClassF
1176 UINT64_C(1384120320), // EH_RETURN_JMPR
1177 UINT64_C(2162163808), // F2_conv_d2df
1178 UINT64_C(2285895712), // F2_conv_d2sf
1179 UINT64_C(2162163712), // F2_conv_df2d
1180 UINT64_C(2162163904), // F2_conv_df2d_chop
1181 UINT64_C(2281701408), // F2_conv_df2sf
1182 UINT64_C(2162163744), // F2_conv_df2ud
1183 UINT64_C(2162163936), // F2_conv_df2ud_chop
1184 UINT64_C(2287992864), // F2_conv_df2uw
1185 UINT64_C(2292187168), // F2_conv_df2uw_chop
1186 UINT64_C(2290090016), // F2_conv_df2w
1187 UINT64_C(2296381472), // F2_conv_df2w_chop
1188 UINT64_C(2222981248), // F2_conv_sf2d
1189 UINT64_C(2222981312), // F2_conv_sf2d_chop
1190 UINT64_C(2222981120), // F2_conv_sf2df
1191 UINT64_C(2222981216), // F2_conv_sf2ud
1192 UINT64_C(2222981280), // F2_conv_sf2ud_chop
1193 UINT64_C(2338324480), // F2_conv_sf2uw
1194 UINT64_C(2338324512), // F2_conv_sf2uw_chop
1195 UINT64_C(2340421632), // F2_conv_sf2w
1196 UINT64_C(2340421664), // F2_conv_sf2w_chop
1197 UINT64_C(2162163776), // F2_conv_ud2df
1198 UINT64_C(2283798560), // F2_conv_ud2sf
1199 UINT64_C(2222981152), // F2_conv_uw2df
1200 UINT64_C(2334130176), // F2_conv_uw2sf
1201 UINT64_C(2222981184), // F2_conv_w2df
1202 UINT64_C(2336227328), // F2_conv_w2sf
1203 UINT64_C(3892314208), // F2_dfadd
1204 UINT64_C(3699376144), // F2_dfclass
1205 UINT64_C(3537895424), // F2_dfcmpeq
1206 UINT64_C(3537895488), // F2_dfcmpge
1207 UINT64_C(3537895456), // F2_dfcmpgt
1208 UINT64_C(3537895520), // F2_dfcmpuo
1209 UINT64_C(3644850176), // F2_dfimm_n
1210 UINT64_C(3640655872), // F2_dfimm_p
1211 UINT64_C(3894411360), // F2_dfmax
1212 UINT64_C(3904897120), // F2_dfmin
1213 UINT64_C(3896508512), // F2_dfmpyfix
1214 UINT64_C(3934257248), // F2_dfmpyhh
1215 UINT64_C(3925868640), // F2_dfmpylh
1216 UINT64_C(3902799968), // F2_dfmpyll
1217 UINT64_C(3900702816), // F2_dfsub
1218 UINT64_C(3942645760), // F2_sfadd
1219 UINT64_C(2246049792), // F2_sfclass
1220 UINT64_C(3353346144), // F2_sfcmpeq
1221 UINT64_C(3353346048), // F2_sfcmpge
1222 UINT64_C(3353346176), // F2_sfcmpgt
1223 UINT64_C(3353346080), // F2_sfcmpuo
1224 UINT64_C(3955228704), // F2_sffixupd
1225 UINT64_C(3955228672), // F2_sffixupn
1226 UINT64_C(2342518784), // F2_sffixupr
1227 UINT64_C(4009754752), // F2_sffma
1228 UINT64_C(4009754816), // F2_sffma_lib
1229 UINT64_C(4016046208), // F2_sffma_sc
1230 UINT64_C(4009754784), // F2_sffms
1231 UINT64_C(4009754848), // F2_sffms_lib
1232 UINT64_C(3594518528), // F2_sfimm_n
1233 UINT64_C(3590324224), // F2_sfimm_p
1234 UINT64_C(2346713088), // F2_sfinvsqrta
1235 UINT64_C(3951034368), // F2_sfmax
1236 UINT64_C(3951034400), // F2_sfmin
1237 UINT64_C(3946840064), // F2_sfmpy
1238 UINT64_C(3957325952), // F2_sfrecipa
1239 UINT64_C(3942645792), // F2_sfsub
1240 UINT64_C(1746927616), // G4_tfrgcpp
1241 UINT64_C(1780482048), // G4_tfrgcrr
1242 UINT64_C(1660944384), // G4_tfrgpcp
1243 UINT64_C(1644167168), // G4_tfrgrcr
1244 UINT64_C(35651584), // HI
1245 UINT64_C(1509949440), // J2_call
1246 UINT64_C(1562378240), // J2_callf
1247 UINT64_C(1352663040), // J2_callr
1248 UINT64_C(1361051648), // J2_callrf
1249 UINT64_C(1358954496), // J2_callrt
1250 UINT64_C(1560281088), // J2_callt
1251 UINT64_C(1476395008), // J2_jump
1252 UINT64_C(1545601024), // J2_jumpf
1253 UINT64_C(1545603072), // J2_jumpfnew
1254 UINT64_C(1545607168), // J2_jumpfnewpt
1255 UINT64_C(1545605120), // J2_jumpfpt
1256 UINT64_C(1384120320), // J2_jumpr
1257 UINT64_C(1398800384), // J2_jumprf
1258 UINT64_C(1398802432), // J2_jumprfnew
1259 UINT64_C(1398806528), // J2_jumprfnewpt
1260 UINT64_C(1398804480), // J2_jumprfpt
1261 UINT64_C(1631584256), // J2_jumprgtez
1262 UINT64_C(1631588352), // J2_jumprgtezpt
1263 UINT64_C(1639972864), // J2_jumprltez
1264 UINT64_C(1639976960), // J2_jumprltezpt
1265 UINT64_C(1635778560), // J2_jumprnz
1266 UINT64_C(1635782656), // J2_jumprnzpt
1267 UINT64_C(1396703232), // J2_jumprt
1268 UINT64_C(1396705280), // J2_jumprtnew
1269 UINT64_C(1396709376), // J2_jumprtnewpt
1270 UINT64_C(1396707328), // J2_jumprtpt
1271 UINT64_C(1627389952), // J2_jumprz
1272 UINT64_C(1627394048), // J2_jumprzpt
1273 UINT64_C(1543503872), // J2_jumpt
1274 UINT64_C(1543505920), // J2_jumptnew
1275 UINT64_C(1543510016), // J2_jumptnewpt
1276 UINT64_C(1543507968), // J2_jumptpt
1277 UINT64_C(1761607680), // J2_loop0i
1278 UINT64_C(1761607680), // J2_loop0iext
1279 UINT64_C(1610612736), // J2_loop0r
1280 UINT64_C(1610612736), // J2_loop0rext
1281 UINT64_C(1763704832), // J2_loop1i
1282 UINT64_C(1763704832), // J2_loop1iext
1283 UINT64_C(1612709888), // J2_loop1r
1284 UINT64_C(1612709888), // J2_loop1rext
1285 UINT64_C(1413480448), // J2_pause
1286 UINT64_C(1772093440), // J2_ploop1si
1287 UINT64_C(1621098496), // J2_ploop1sr
1288 UINT64_C(1774190592), // J2_ploop2si
1289 UINT64_C(1623195648), // J2_ploop2sr
1290 UINT64_C(1776287744), // J2_ploop3si
1291 UINT64_C(1625292800), // J2_ploop3sr
1292 UINT64_C(1409286144), // J2_trap0
1293 UINT64_C(1417674752), // J2_trap1
1294 UINT64_C(541065216), // J4_cmpeq_f_jumpnv_nt
1295 UINT64_C(541073408), // J4_cmpeq_f_jumpnv_t
1296 UINT64_C(339738624), // J4_cmpeq_fp0_jump_nt
1297 UINT64_C(339746816), // J4_cmpeq_fp0_jump_t
1298 UINT64_C(339742720), // J4_cmpeq_fp1_jump_nt
1299 UINT64_C(339750912), // J4_cmpeq_fp1_jump_t
1300 UINT64_C(536870912), // J4_cmpeq_t_jumpnv_nt
1301 UINT64_C(536879104), // J4_cmpeq_t_jumpnv_t
1302 UINT64_C(335544320), // J4_cmpeq_tp0_jump_nt
1303 UINT64_C(335552512), // J4_cmpeq_tp0_jump_t
1304 UINT64_C(335548416), // J4_cmpeq_tp1_jump_nt
1305 UINT64_C(335556608), // J4_cmpeq_tp1_jump_t
1306 UINT64_C(608174080), // J4_cmpeqi_f_jumpnv_nt
1307 UINT64_C(608182272), // J4_cmpeqi_f_jumpnv_t
1308 UINT64_C(272629760), // J4_cmpeqi_fp0_jump_nt
1309 UINT64_C(272637952), // J4_cmpeqi_fp0_jump_t
1310 UINT64_C(306184192), // J4_cmpeqi_fp1_jump_nt
1311 UINT64_C(306192384), // J4_cmpeqi_fp1_jump_t
1312 UINT64_C(603979776), // J4_cmpeqi_t_jumpnv_nt
1313 UINT64_C(603987968), // J4_cmpeqi_t_jumpnv_t
1314 UINT64_C(268435456), // J4_cmpeqi_tp0_jump_nt
1315 UINT64_C(268443648), // J4_cmpeqi_tp0_jump_t
1316 UINT64_C(301989888), // J4_cmpeqi_tp1_jump_nt
1317 UINT64_C(301998080), // J4_cmpeqi_tp1_jump_t
1318 UINT64_C(641728512), // J4_cmpeqn1_f_jumpnv_nt
1319 UINT64_C(641736704), // J4_cmpeqn1_f_jumpnv_t
1320 UINT64_C(297795584), // J4_cmpeqn1_fp0_jump_nt
1321 UINT64_C(297803776), // J4_cmpeqn1_fp0_jump_t
1322 UINT64_C(331350016), // J4_cmpeqn1_fp1_jump_nt
1323 UINT64_C(331358208), // J4_cmpeqn1_fp1_jump_t
1324 UINT64_C(637534208), // J4_cmpeqn1_t_jumpnv_nt
1325 UINT64_C(637542400), // J4_cmpeqn1_t_jumpnv_t
1326 UINT64_C(293601280), // J4_cmpeqn1_tp0_jump_nt
1327 UINT64_C(293609472), // J4_cmpeqn1_tp0_jump_t
1328 UINT64_C(327155712), // J4_cmpeqn1_tp1_jump_nt
1329 UINT64_C(327163904), // J4_cmpeqn1_tp1_jump_t
1330 UINT64_C(549453824), // J4_cmpgt_f_jumpnv_nt
1331 UINT64_C(549462016), // J4_cmpgt_f_jumpnv_t
1332 UINT64_C(348127232), // J4_cmpgt_fp0_jump_nt
1333 UINT64_C(348135424), // J4_cmpgt_fp0_jump_t
1334 UINT64_C(348131328), // J4_cmpgt_fp1_jump_nt
1335 UINT64_C(348139520), // J4_cmpgt_fp1_jump_t
1336 UINT64_C(545259520), // J4_cmpgt_t_jumpnv_nt
1337 UINT64_C(545267712), // J4_cmpgt_t_jumpnv_t
1338 UINT64_C(343932928), // J4_cmpgt_tp0_jump_nt
1339 UINT64_C(343941120), // J4_cmpgt_tp0_jump_t
1340 UINT64_C(343937024), // J4_cmpgt_tp1_jump_nt
1341 UINT64_C(343945216), // J4_cmpgt_tp1_jump_t
1342 UINT64_C(616562688), // J4_cmpgti_f_jumpnv_nt
1343 UINT64_C(616570880), // J4_cmpgti_f_jumpnv_t
1344 UINT64_C(281018368), // J4_cmpgti_fp0_jump_nt
1345 UINT64_C(281026560), // J4_cmpgti_fp0_jump_t
1346 UINT64_C(314572800), // J4_cmpgti_fp1_jump_nt
1347 UINT64_C(314580992), // J4_cmpgti_fp1_jump_t
1348 UINT64_C(612368384), // J4_cmpgti_t_jumpnv_nt
1349 UINT64_C(612376576), // J4_cmpgti_t_jumpnv_t
1350 UINT64_C(276824064), // J4_cmpgti_tp0_jump_nt
1351 UINT64_C(276832256), // J4_cmpgti_tp0_jump_t
1352 UINT64_C(310378496), // J4_cmpgti_tp1_jump_nt
1353 UINT64_C(310386688), // J4_cmpgti_tp1_jump_t
1354 UINT64_C(650117120), // J4_cmpgtn1_f_jumpnv_nt
1355 UINT64_C(650125312), // J4_cmpgtn1_f_jumpnv_t
1356 UINT64_C(297795840), // J4_cmpgtn1_fp0_jump_nt
1357 UINT64_C(297804032), // J4_cmpgtn1_fp0_jump_t
1358 UINT64_C(331350272), // J4_cmpgtn1_fp1_jump_nt
1359 UINT64_C(331358464), // J4_cmpgtn1_fp1_jump_t
1360 UINT64_C(645922816), // J4_cmpgtn1_t_jumpnv_nt
1361 UINT64_C(645931008), // J4_cmpgtn1_t_jumpnv_t
1362 UINT64_C(293601536), // J4_cmpgtn1_tp0_jump_nt
1363 UINT64_C(293609728), // J4_cmpgtn1_tp0_jump_t
1364 UINT64_C(327155968), // J4_cmpgtn1_tp1_jump_nt
1365 UINT64_C(327164160), // J4_cmpgtn1_tp1_jump_t
1366 UINT64_C(557842432), // J4_cmpgtu_f_jumpnv_nt
1367 UINT64_C(557850624), // J4_cmpgtu_f_jumpnv_t
1368 UINT64_C(356515840), // J4_cmpgtu_fp0_jump_nt
1369 UINT64_C(356524032), // J4_cmpgtu_fp0_jump_t
1370 UINT64_C(356519936), // J4_cmpgtu_fp1_jump_nt
1371 UINT64_C(356528128), // J4_cmpgtu_fp1_jump_t
1372 UINT64_C(553648128), // J4_cmpgtu_t_jumpnv_nt
1373 UINT64_C(553656320), // J4_cmpgtu_t_jumpnv_t
1374 UINT64_C(352321536), // J4_cmpgtu_tp0_jump_nt
1375 UINT64_C(352329728), // J4_cmpgtu_tp0_jump_t
1376 UINT64_C(352325632), // J4_cmpgtu_tp1_jump_nt
1377 UINT64_C(352333824), // J4_cmpgtu_tp1_jump_t
1378 UINT64_C(624951296), // J4_cmpgtui_f_jumpnv_nt
1379 UINT64_C(624959488), // J4_cmpgtui_f_jumpnv_t
1380 UINT64_C(289406976), // J4_cmpgtui_fp0_jump_nt
1381 UINT64_C(289415168), // J4_cmpgtui_fp0_jump_t
1382 UINT64_C(322961408), // J4_cmpgtui_fp1_jump_nt
1383 UINT64_C(322969600), // J4_cmpgtui_fp1_jump_t
1384 UINT64_C(620756992), // J4_cmpgtui_t_jumpnv_nt
1385 UINT64_C(620765184), // J4_cmpgtui_t_jumpnv_t
1386 UINT64_C(285212672), // J4_cmpgtui_tp0_jump_nt
1387 UINT64_C(285220864), // J4_cmpgtui_tp0_jump_t
1388 UINT64_C(318767104), // J4_cmpgtui_tp1_jump_nt
1389 UINT64_C(318775296), // J4_cmpgtui_tp1_jump_t
1390 UINT64_C(566231040), // J4_cmplt_f_jumpnv_nt
1391 UINT64_C(566239232), // J4_cmplt_f_jumpnv_t
1392 UINT64_C(562036736), // J4_cmplt_t_jumpnv_nt
1393 UINT64_C(562044928), // J4_cmplt_t_jumpnv_t
1394 UINT64_C(574619648), // J4_cmpltu_f_jumpnv_nt
1395 UINT64_C(574627840), // J4_cmpltu_f_jumpnv_t
1396 UINT64_C(570425344), // J4_cmpltu_t_jumpnv_nt
1397 UINT64_C(570433536), // J4_cmpltu_t_jumpnv_t
1398 UINT64_C(1386217472), // J4_hintjumpr
1399 UINT64_C(369098752), // J4_jumpseti
1400 UINT64_C(385875968), // J4_jumpsetr
1401 UINT64_C(633339904), // J4_tstbit0_f_jumpnv_nt
1402 UINT64_C(633348096), // J4_tstbit0_f_jumpnv_t
1403 UINT64_C(297796352), // J4_tstbit0_fp0_jump_nt
1404 UINT64_C(297804544), // J4_tstbit0_fp0_jump_t
1405 UINT64_C(331350784), // J4_tstbit0_fp1_jump_nt
1406 UINT64_C(331358976), // J4_tstbit0_fp1_jump_t
1407 UINT64_C(629145600), // J4_tstbit0_t_jumpnv_nt
1408 UINT64_C(629153792), // J4_tstbit0_t_jumpnv_t
1409 UINT64_C(293602048), // J4_tstbit0_tp0_jump_nt
1410 UINT64_C(293610240), // J4_tstbit0_tp0_jump_t
1411 UINT64_C(327156480), // J4_tstbit0_tp1_jump_nt
1412 UINT64_C(327164672), // J4_tstbit0_tp1_jump_t
1413 UINT64_C(2415919104), // L2_deallocframe
1414 UINT64_C(2424307712), // L2_loadalignb_io
1415 UINT64_C(2659188736), // L2_loadalignb_pbr
1416 UINT64_C(2558525440), // L2_loadalignb_pci
1417 UINT64_C(2558525952), // L2_loadalignb_pcr
1418 UINT64_C(2592079872), // L2_loadalignb_pi
1419 UINT64_C(2625634304), // L2_loadalignb_pr
1420 UINT64_C(2420113408), // L2_loadalignh_io
1421 UINT64_C(2654994432), // L2_loadalignh_pbr
1422 UINT64_C(2554331136), // L2_loadalignh_pci
1423 UINT64_C(2554331648), // L2_loadalignh_pcr
1424 UINT64_C(2587885568), // L2_loadalignh_pi
1425 UINT64_C(2621440000), // L2_loadalignh_pr
1426 UINT64_C(2418016256), // L2_loadbsw2_io
1427 UINT64_C(2652897280), // L2_loadbsw2_pbr
1428 UINT64_C(2552233984), // L2_loadbsw2_pci
1429 UINT64_C(2552234496), // L2_loadbsw2_pcr
1430 UINT64_C(2585788416), // L2_loadbsw2_pi
1431 UINT64_C(2619342848), // L2_loadbsw2_pr
1432 UINT64_C(2430599168), // L2_loadbsw4_io
1433 UINT64_C(2665480192), // L2_loadbsw4_pbr
1434 UINT64_C(2564816896), // L2_loadbsw4_pci
1435 UINT64_C(2564817408), // L2_loadbsw4_pcr
1436 UINT64_C(2598371328), // L2_loadbsw4_pi
1437 UINT64_C(2631925760), // L2_loadbsw4_pr
1438 UINT64_C(2422210560), // L2_loadbzw2_io
1439 UINT64_C(2657091584), // L2_loadbzw2_pbr
1440 UINT64_C(2556428288), // L2_loadbzw2_pci
1441 UINT64_C(2556428800), // L2_loadbzw2_pcr
1442 UINT64_C(2589982720), // L2_loadbzw2_pi
1443 UINT64_C(2623537152), // L2_loadbzw2_pr
1444 UINT64_C(2426404864), // L2_loadbzw4_io
1445 UINT64_C(2661285888), // L2_loadbzw4_pbr
1446 UINT64_C(2560622592), // L2_loadbzw4_pci
1447 UINT64_C(2560623104), // L2_loadbzw4_pcr
1448 UINT64_C(2594177024), // L2_loadbzw4_pi
1449 UINT64_C(2627731456), // L2_loadbzw4_pr
1450 UINT64_C(2432696320), // L2_loadrb_io
1451 UINT64_C(2667577344), // L2_loadrb_pbr
1452 UINT64_C(2566914048), // L2_loadrb_pci
1453 UINT64_C(2566914560), // L2_loadrb_pcr
1454 UINT64_C(2600468480), // L2_loadrb_pi
1455 UINT64_C(2634022912), // L2_loadrb_pr
1456 UINT64_C(1224736768), // L2_loadrbgp
1457 UINT64_C(2445279232), // L2_loadrd_io
1458 UINT64_C(2680160256), // L2_loadrd_pbr
1459 UINT64_C(2579496960), // L2_loadrd_pci
1460 UINT64_C(2579497472), // L2_loadrd_pcr
1461 UINT64_C(2613051392), // L2_loadrd_pi
1462 UINT64_C(2646605824), // L2_loadrd_pr
1463 UINT64_C(1237319680), // L2_loadrdgp
1464 UINT64_C(2436890624), // L2_loadrh_io
1465 UINT64_C(2671771648), // L2_loadrh_pbr
1466 UINT64_C(2571108352), // L2_loadrh_pci
1467 UINT64_C(2571108864), // L2_loadrh_pcr
1468 UINT64_C(2604662784), // L2_loadrh_pi
1469 UINT64_C(2638217216), // L2_loadrh_pr
1470 UINT64_C(1228931072), // L2_loadrhgp
1471 UINT64_C(2441084928), // L2_loadri_io
1472 UINT64_C(2675965952), // L2_loadri_pbr
1473 UINT64_C(2575302656), // L2_loadri_pci
1474 UINT64_C(2575303168), // L2_loadri_pcr
1475 UINT64_C(2608857088), // L2_loadri_pi
1476 UINT64_C(2642411520), // L2_loadri_pr
1477 UINT64_C(1233125376), // L2_loadrigp
1478 UINT64_C(2434793472), // L2_loadrub_io
1479 UINT64_C(2669674496), // L2_loadrub_pbr
1480 UINT64_C(2569011200), // L2_loadrub_pci
1481 UINT64_C(2569011712), // L2_loadrub_pcr
1482 UINT64_C(2602565632), // L2_loadrub_pi
1483 UINT64_C(2636120064), // L2_loadrub_pr
1484 UINT64_C(1226833920), // L2_loadrubgp
1485 UINT64_C(2438987776), // L2_loadruh_io
1486 UINT64_C(2673868800), // L2_loadruh_pbr
1487 UINT64_C(2573205504), // L2_loadruh_pci
1488 UINT64_C(2573206016), // L2_loadruh_pcr
1489 UINT64_C(2606759936), // L2_loadruh_pi
1490 UINT64_C(2640314368), // L2_loadruh_pr
1491 UINT64_C(1231028224), // L2_loadruhgp
1492 UINT64_C(2449473536), // L2_loadw_locked
1493 UINT64_C(1157627904), // L2_ploadrbf_io
1494 UINT64_C(2600478720), // L2_ploadrbf_pi
1495 UINT64_C(1191182336), // L2_ploadrbfnew_io
1496 UINT64_C(2600482816), // L2_ploadrbfnew_pi
1497 UINT64_C(1090519040), // L2_ploadrbt_io
1498 UINT64_C(2600476672), // L2_ploadrbt_pi
1499 UINT64_C(1124073472), // L2_ploadrbtnew_io
1500 UINT64_C(2600480768), // L2_ploadrbtnew_pi
1501 UINT64_C(1170210816), // L2_ploadrdf_io
1502 UINT64_C(2613061632), // L2_ploadrdf_pi
1503 UINT64_C(1203765248), // L2_ploadrdfnew_io
1504 UINT64_C(2613065728), // L2_ploadrdfnew_pi
1505 UINT64_C(1103101952), // L2_ploadrdt_io
1506 UINT64_C(2613059584), // L2_ploadrdt_pi
1507 UINT64_C(1136656384), // L2_ploadrdtnew_io
1508 UINT64_C(2613063680), // L2_ploadrdtnew_pi
1509 UINT64_C(1161822208), // L2_ploadrhf_io
1510 UINT64_C(2604673024), // L2_ploadrhf_pi
1511 UINT64_C(1195376640), // L2_ploadrhfnew_io
1512 UINT64_C(2604677120), // L2_ploadrhfnew_pi
1513 UINT64_C(1094713344), // L2_ploadrht_io
1514 UINT64_C(2604670976), // L2_ploadrht_pi
1515 UINT64_C(1128267776), // L2_ploadrhtnew_io
1516 UINT64_C(2604675072), // L2_ploadrhtnew_pi
1517 UINT64_C(1166016512), // L2_ploadrif_io
1518 UINT64_C(2608867328), // L2_ploadrif_pi
1519 UINT64_C(1199570944), // L2_ploadrifnew_io
1520 UINT64_C(2608871424), // L2_ploadrifnew_pi
1521 UINT64_C(1098907648), // L2_ploadrit_io
1522 UINT64_C(2608865280), // L2_ploadrit_pi
1523 UINT64_C(1132462080), // L2_ploadritnew_io
1524 UINT64_C(2608869376), // L2_ploadritnew_pi
1525 UINT64_C(1159725056), // L2_ploadrubf_io
1526 UINT64_C(2602575872), // L2_ploadrubf_pi
1527 UINT64_C(1193279488), // L2_ploadrubfnew_io
1528 UINT64_C(2602579968), // L2_ploadrubfnew_pi
1529 UINT64_C(1092616192), // L2_ploadrubt_io
1530 UINT64_C(2602573824), // L2_ploadrubt_pi
1531 UINT64_C(1126170624), // L2_ploadrubtnew_io
1532 UINT64_C(2602577920), // L2_ploadrubtnew_pi
1533 UINT64_C(1163919360), // L2_ploadruhf_io
1534 UINT64_C(2606770176), // L2_ploadruhf_pi
1535 UINT64_C(1197473792), // L2_ploadruhfnew_io
1536 UINT64_C(2606774272), // L2_ploadruhfnew_pi
1537 UINT64_C(1096810496), // L2_ploadruht_io
1538 UINT64_C(2606768128), // L2_ploadruht_pi
1539 UINT64_C(1130364928), // L2_ploadruhtnew_io
1540 UINT64_C(2606772224), // L2_ploadruhtnew_pi
1541 UINT64_C(1040187392), // L4_add_memopb_io
1542 UINT64_C(1042284544), // L4_add_memoph_io
1543 UINT64_C(1044381696), // L4_add_memopw_io
1544 UINT64_C(1040187456), // L4_and_memopb_io
1545 UINT64_C(1042284608), // L4_and_memoph_io
1546 UINT64_C(1044381760), // L4_and_memopw_io
1547 UINT64_C(1056964608), // L4_iadd_memopb_io
1548 UINT64_C(1059061760), // L4_iadd_memoph_io
1549 UINT64_C(1061158912), // L4_iadd_memopw_io
1550 UINT64_C(1056964672), // L4_iand_memopb_io
1551 UINT64_C(1059061824), // L4_iand_memoph_io
1552 UINT64_C(1061158976), // L4_iand_memopw_io
1553 UINT64_C(1056964704), // L4_ior_memopb_io
1554 UINT64_C(1059061856), // L4_ior_memoph_io
1555 UINT64_C(1061159008), // L4_ior_memopw_io
1556 UINT64_C(1056964640), // L4_isub_memopb_io
1557 UINT64_C(1059061792), // L4_isub_memoph_io
1558 UINT64_C(1061158944), // L4_isub_memopw_io
1559 UINT64_C(2592083968), // L4_loadalignb_ap
1560 UINT64_C(2625638400), // L4_loadalignb_ur
1561 UINT64_C(2587889664), // L4_loadalignh_ap
1562 UINT64_C(2621444096), // L4_loadalignh_ur
1563 UINT64_C(2585792512), // L4_loadbsw2_ap
1564 UINT64_C(2619346944), // L4_loadbsw2_ur
1565 UINT64_C(2598375424), // L4_loadbsw4_ap
1566 UINT64_C(2631929856), // L4_loadbsw4_ur
1567 UINT64_C(2589986816), // L4_loadbzw2_ap
1568 UINT64_C(2623541248), // L4_loadbzw2_ur
1569 UINT64_C(2594181120), // L4_loadbzw4_ap
1570 UINT64_C(2627735552), // L4_loadbzw4_ur
1571 UINT64_C(2449477632), // L4_loadd_locked
1572 UINT64_C(2600472576), // L4_loadrb_ap
1573 UINT64_C(973078528), // L4_loadrb_rr
1574 UINT64_C(2634027008), // L4_loadrb_ur
1575 UINT64_C(2613055488), // L4_loadrd_ap
1576 UINT64_C(985661440), // L4_loadrd_rr
1577 UINT64_C(2646609920), // L4_loadrd_ur
1578 UINT64_C(2604666880), // L4_loadrh_ap
1579 UINT64_C(977272832), // L4_loadrh_rr
1580 UINT64_C(2638221312), // L4_loadrh_ur
1581 UINT64_C(2608861184), // L4_loadri_ap
1582 UINT64_C(981467136), // L4_loadri_rr
1583 UINT64_C(2642415616), // L4_loadri_ur
1584 UINT64_C(2602569728), // L4_loadrub_ap
1585 UINT64_C(975175680), // L4_loadrub_rr
1586 UINT64_C(2636124160), // L4_loadrub_ur
1587 UINT64_C(2606764032), // L4_loadruh_ap
1588 UINT64_C(979369984), // L4_loadruh_rr
1589 UINT64_C(2640318464), // L4_loadruh_ur
1590 UINT64_C(1040187488), // L4_or_memopb_io
1591 UINT64_C(1042284640), // L4_or_memoph_io
1592 UINT64_C(1044381792), // L4_or_memopw_io
1593 UINT64_C(2667587712), // L4_ploadrbf_abs
1594 UINT64_C(822083584), // L4_ploadrbf_rr
1595 UINT64_C(2667591808), // L4_ploadrbfnew_abs
1596 UINT64_C(855638016), // L4_ploadrbfnew_rr
1597 UINT64_C(2667585664), // L4_ploadrbt_abs
1598 UINT64_C(805306368), // L4_ploadrbt_rr
1599 UINT64_C(2667589760), // L4_ploadrbtnew_abs
1600 UINT64_C(838860800), // L4_ploadrbtnew_rr
1601 UINT64_C(2680170624), // L4_ploadrdf_abs
1602 UINT64_C(834666496), // L4_ploadrdf_rr
1603 UINT64_C(2680174720), // L4_ploadrdfnew_abs
1604 UINT64_C(868220928), // L4_ploadrdfnew_rr
1605 UINT64_C(2680168576), // L4_ploadrdt_abs
1606 UINT64_C(817889280), // L4_ploadrdt_rr
1607 UINT64_C(2680172672), // L4_ploadrdtnew_abs
1608 UINT64_C(851443712), // L4_ploadrdtnew_rr
1609 UINT64_C(2671782016), // L4_ploadrhf_abs
1610 UINT64_C(826277888), // L4_ploadrhf_rr
1611 UINT64_C(2671786112), // L4_ploadrhfnew_abs
1612 UINT64_C(859832320), // L4_ploadrhfnew_rr
1613 UINT64_C(2671779968), // L4_ploadrht_abs
1614 UINT64_C(809500672), // L4_ploadrht_rr
1615 UINT64_C(2671784064), // L4_ploadrhtnew_abs
1616 UINT64_C(843055104), // L4_ploadrhtnew_rr
1617 UINT64_C(2675976320), // L4_ploadrif_abs
1618 UINT64_C(830472192), // L4_ploadrif_rr
1619 UINT64_C(2675980416), // L4_ploadrifnew_abs
1620 UINT64_C(864026624), // L4_ploadrifnew_rr
1621 UINT64_C(2675974272), // L4_ploadrit_abs
1622 UINT64_C(813694976), // L4_ploadrit_rr
1623 UINT64_C(2675978368), // L4_ploadritnew_abs
1624 UINT64_C(847249408), // L4_ploadritnew_rr
1625 UINT64_C(2669684864), // L4_ploadrubf_abs
1626 UINT64_C(824180736), // L4_ploadrubf_rr
1627 UINT64_C(2669688960), // L4_ploadrubfnew_abs
1628 UINT64_C(857735168), // L4_ploadrubfnew_rr
1629 UINT64_C(2669682816), // L4_ploadrubt_abs
1630 UINT64_C(807403520), // L4_ploadrubt_rr
1631 UINT64_C(2669686912), // L4_ploadrubtnew_abs
1632 UINT64_C(840957952), // L4_ploadrubtnew_rr
1633 UINT64_C(2673879168), // L4_ploadruhf_abs
1634 UINT64_C(828375040), // L4_ploadruhf_rr
1635 UINT64_C(2673883264), // L4_ploadruhfnew_abs
1636 UINT64_C(861929472), // L4_ploadruhfnew_rr
1637 UINT64_C(2673877120), // L4_ploadruht_abs
1638 UINT64_C(811597824), // L4_ploadruht_rr
1639 UINT64_C(2673881216), // L4_ploadruhtnew_abs
1640 UINT64_C(845152256), // L4_ploadruhtnew_rr
1641 UINT64_C(2516582400), // L4_return
1642 UINT64_C(2516594688), // L4_return_f
1643 UINT64_C(2516592640), // L4_return_fnew_pnt
1644 UINT64_C(2516596736), // L4_return_fnew_pt
1645 UINT64_C(2516586496), // L4_return_t
1646 UINT64_C(2516584448), // L4_return_tnew_pnt
1647 UINT64_C(2516588544), // L4_return_tnew_pt
1648 UINT64_C(1040187424), // L4_sub_memopb_io
1649 UINT64_C(1042284576), // L4_sub_memoph_io
1650 UINT64_C(1044381728), // L4_sub_memopw_io
1651 UINT64_C(2449473600), // L6_memcpy
1652 UINT64_C(18874368), // LO
1653 UINT64_C(4009754656), // M2_acci
1654 UINT64_C(3791650816), // M2_accii
1655 UINT64_C(3875536928), // M2_cmaci_s0
1656 UINT64_C(3875536960), // M2_cmacr_s0
1657 UINT64_C(3875537088), // M2_cmacs_s0
1658 UINT64_C(3883925696), // M2_cmacs_s1
1659 UINT64_C(3879731392), // M2_cmacsc_s0
1660 UINT64_C(3888120000), // M2_cmacsc_s1
1661 UINT64_C(3841982496), // M2_cmpyi_s0
1662 UINT64_C(3841982528), // M2_cmpyr_s0
1663 UINT64_C(3978297536), // M2_cmpyrs_s0
1664 UINT64_C(3986686144), // M2_cmpyrs_s1
1665 UINT64_C(3982491840), // M2_cmpyrsc_s0
1666 UINT64_C(3990880448), // M2_cmpyrsc_s1
1667 UINT64_C(3841982656), // M2_cmpys_s0
1668 UINT64_C(3850371264), // M2_cmpys_s1
1669 UINT64_C(3846176960), // M2_cmpysc_s0
1670 UINT64_C(3854565568), // M2_cmpysc_s1
1671 UINT64_C(3875537120), // M2_cnacs_s0
1672 UINT64_C(3883925728), // M2_cnacs_s1
1673 UINT64_C(3879731424), // M2_cnacsc_s0
1674 UINT64_C(3888120032), // M2_cnacsc_s1
1675 UINT64_C(3875536896), // M2_dpmpyss_acc_s0
1676 UINT64_C(3877634048), // M2_dpmpyss_nac_s0
1677 UINT64_C(3978297376), // M2_dpmpyss_rnd_s0
1678 UINT64_C(3841982464), // M2_dpmpyss_s0
1679 UINT64_C(3879731200), // M2_dpmpyuu_acc_s0
1680 UINT64_C(3881828352), // M2_dpmpyuu_nac_s0
1681 UINT64_C(3846176768), // M2_dpmpyuu_s0
1682 UINT64_C(3986686080), // M2_hmmpyh_rs1
1683 UINT64_C(3986685952), // M2_hmmpyh_s1
1684 UINT64_C(3990880384), // M2_hmmpyl_rs1
1685 UINT64_C(3986685984), // M2_hmmpyl_s1
1686 UINT64_C(4009754624), // M2_maci
1687 UINT64_C(3783262208), // M2_macsin
1688 UINT64_C(3774873600), // M2_macsip
1689 UINT64_C(3927965920), // M2_mmachs_rs0
1690 UINT64_C(3936354528), // M2_mmachs_rs1
1691 UINT64_C(3925868768), // M2_mmachs_s0
1692 UINT64_C(3934257376), // M2_mmachs_s1
1693 UINT64_C(3927965856), // M2_mmacls_rs0
1694 UINT64_C(3936354464), // M2_mmacls_rs1
1695 UINT64_C(3925868704), // M2_mmacls_s0
1696 UINT64_C(3934257312), // M2_mmacls_s1
1697 UINT64_C(3932160224), // M2_mmacuhs_rs0
1698 UINT64_C(3940548832), // M2_mmacuhs_rs1
1699 UINT64_C(3930063072), // M2_mmacuhs_s0
1700 UINT64_C(3938451680), // M2_mmacuhs_s1
1701 UINT64_C(3932160160), // M2_mmaculs_rs0
1702 UINT64_C(3940548768), // M2_mmaculs_rs1
1703 UINT64_C(3930063008), // M2_mmaculs_s0
1704 UINT64_C(3938451616), // M2_mmaculs_s1
1705 UINT64_C(3894411488), // M2_mmpyh_rs0
1706 UINT64_C(3902800096), // M2_mmpyh_rs1
1707 UINT64_C(3892314336), // M2_mmpyh_s0
1708 UINT64_C(3900702944), // M2_mmpyh_s1
1709 UINT64_C(3894411424), // M2_mmpyl_rs0
1710 UINT64_C(3902800032), // M2_mmpyl_rs1
1711 UINT64_C(3892314272), // M2_mmpyl_s0
1712 UINT64_C(3900702880), // M2_mmpyl_s1
1713 UINT64_C(3898605792), // M2_mmpyuh_rs0
1714 UINT64_C(3906994400), // M2_mmpyuh_rs1
1715 UINT64_C(3896508640), // M2_mmpyuh_s0
1716 UINT64_C(3904897248), // M2_mmpyuh_s1
1717 UINT64_C(3898605728), // M2_mmpyul_rs0
1718 UINT64_C(3906994336), // M2_mmpyul_rs1
1719 UINT64_C(3896508576), // M2_mmpyul_s0
1720 UINT64_C(3904897184), // M2_mmpyul_s1
1721 UINT64_C(4018143232), // M2_mnaci
1722 UINT64_C(3992977504), // M2_mpy_acc_hh_s0
1723 UINT64_C(4001366112), // M2_mpy_acc_hh_s1
1724 UINT64_C(3992977472), // M2_mpy_acc_hl_s0
1725 UINT64_C(4001366080), // M2_mpy_acc_hl_s1
1726 UINT64_C(3992977440), // M2_mpy_acc_lh_s0
1727 UINT64_C(4001366048), // M2_mpy_acc_lh_s1
1728 UINT64_C(3992977408), // M2_mpy_acc_ll_s0
1729 UINT64_C(4001366016), // M2_mpy_acc_ll_s1
1730 UINT64_C(3992977632), // M2_mpy_acc_sat_hh_s0
1731 UINT64_C(4001366240), // M2_mpy_acc_sat_hh_s1
1732 UINT64_C(3992977600), // M2_mpy_acc_sat_hl_s0
1733 UINT64_C(4001366208), // M2_mpy_acc_sat_hl_s1
1734 UINT64_C(3992977568), // M2_mpy_acc_sat_lh_s0
1735 UINT64_C(4001366176), // M2_mpy_acc_sat_lh_s1
1736 UINT64_C(3992977536), // M2_mpy_acc_sat_ll_s0
1737 UINT64_C(4001366144), // M2_mpy_acc_sat_ll_s1
1738 UINT64_C(3959423072), // M2_mpy_hh_s0
1739 UINT64_C(3967811680), // M2_mpy_hh_s1
1740 UINT64_C(3959423040), // M2_mpy_hl_s0
1741 UINT64_C(3967811648), // M2_mpy_hl_s1
1742 UINT64_C(3959423008), // M2_mpy_lh_s0
1743 UINT64_C(3967811616), // M2_mpy_lh_s1
1744 UINT64_C(3959422976), // M2_mpy_ll_s0
1745 UINT64_C(3967811584), // M2_mpy_ll_s1
1746 UINT64_C(3995074656), // M2_mpy_nac_hh_s0
1747 UINT64_C(4003463264), // M2_mpy_nac_hh_s1
1748 UINT64_C(3995074624), // M2_mpy_nac_hl_s0
1749 UINT64_C(4003463232), // M2_mpy_nac_hl_s1
1750 UINT64_C(3995074592), // M2_mpy_nac_lh_s0
1751 UINT64_C(4003463200), // M2_mpy_nac_lh_s1
1752 UINT64_C(3995074560), // M2_mpy_nac_ll_s0
1753 UINT64_C(4003463168), // M2_mpy_nac_ll_s1
1754 UINT64_C(3995074784), // M2_mpy_nac_sat_hh_s0
1755 UINT64_C(4003463392), // M2_mpy_nac_sat_hh_s1
1756 UINT64_C(3995074752), // M2_mpy_nac_sat_hl_s0
1757 UINT64_C(4003463360), // M2_mpy_nac_sat_hl_s1
1758 UINT64_C(3995074720), // M2_mpy_nac_sat_lh_s0
1759 UINT64_C(4003463328), // M2_mpy_nac_sat_lh_s1
1760 UINT64_C(3995074688), // M2_mpy_nac_sat_ll_s0
1761 UINT64_C(4003463296), // M2_mpy_nac_sat_ll_s1
1762 UINT64_C(3961520224), // M2_mpy_rnd_hh_s0
1763 UINT64_C(3969908832), // M2_mpy_rnd_hh_s1
1764 UINT64_C(3961520192), // M2_mpy_rnd_hl_s0
1765 UINT64_C(3969908800), // M2_mpy_rnd_hl_s1
1766 UINT64_C(3961520160), // M2_mpy_rnd_lh_s0
1767 UINT64_C(3969908768), // M2_mpy_rnd_lh_s1
1768 UINT64_C(3961520128), // M2_mpy_rnd_ll_s0
1769 UINT64_C(3969908736), // M2_mpy_rnd_ll_s1
1770 UINT64_C(3959423200), // M2_mpy_sat_hh_s0
1771 UINT64_C(3967811808), // M2_mpy_sat_hh_s1
1772 UINT64_C(3959423168), // M2_mpy_sat_hl_s0
1773 UINT64_C(3967811776), // M2_mpy_sat_hl_s1
1774 UINT64_C(3959423136), // M2_mpy_sat_lh_s0
1775 UINT64_C(3967811744), // M2_mpy_sat_lh_s1
1776 UINT64_C(3959423104), // M2_mpy_sat_ll_s0
1777 UINT64_C(3967811712), // M2_mpy_sat_ll_s1
1778 UINT64_C(3961520352), // M2_mpy_sat_rnd_hh_s0
1779 UINT64_C(3969908960), // M2_mpy_sat_rnd_hh_s1
1780 UINT64_C(3961520320), // M2_mpy_sat_rnd_hl_s0
1781 UINT64_C(3969908928), // M2_mpy_sat_rnd_hl_s1
1782 UINT64_C(3961520288), // M2_mpy_sat_rnd_lh_s0
1783 UINT64_C(3969908896), // M2_mpy_sat_rnd_lh_s1
1784 UINT64_C(3961520256), // M2_mpy_sat_rnd_ll_s0
1785 UINT64_C(3969908864), // M2_mpy_sat_rnd_ll_s1
1786 UINT64_C(3976200224), // M2_mpy_up
1787 UINT64_C(3986686016), // M2_mpy_up_s1
1788 UINT64_C(3990880256), // M2_mpy_up_s1_sat
1789 UINT64_C(3858759776), // M2_mpyd_acc_hh_s0
1790 UINT64_C(3867148384), // M2_mpyd_acc_hh_s1
1791 UINT64_C(3858759744), // M2_mpyd_acc_hl_s0
1792 UINT64_C(3867148352), // M2_mpyd_acc_hl_s1
1793 UINT64_C(3858759712), // M2_mpyd_acc_lh_s0
1794 UINT64_C(3867148320), // M2_mpyd_acc_lh_s1
1795 UINT64_C(3858759680), // M2_mpyd_acc_ll_s0
1796 UINT64_C(3867148288), // M2_mpyd_acc_ll_s1
1797 UINT64_C(3825205344), // M2_mpyd_hh_s0
1798 UINT64_C(3833593952), // M2_mpyd_hh_s1
1799 UINT64_C(3825205312), // M2_mpyd_hl_s0
1800 UINT64_C(3833593920), // M2_mpyd_hl_s1
1801 UINT64_C(3825205280), // M2_mpyd_lh_s0
1802 UINT64_C(3833593888), // M2_mpyd_lh_s1
1803 UINT64_C(3825205248), // M2_mpyd_ll_s0
1804 UINT64_C(3833593856), // M2_mpyd_ll_s1
1805 UINT64_C(3860856928), // M2_mpyd_nac_hh_s0
1806 UINT64_C(3869245536), // M2_mpyd_nac_hh_s1
1807 UINT64_C(3860856896), // M2_mpyd_nac_hl_s0
1808 UINT64_C(3869245504), // M2_mpyd_nac_hl_s1
1809 UINT64_C(3860856864), // M2_mpyd_nac_lh_s0
1810 UINT64_C(3869245472), // M2_mpyd_nac_lh_s1
1811 UINT64_C(3860856832), // M2_mpyd_nac_ll_s0
1812 UINT64_C(3869245440), // M2_mpyd_nac_ll_s1
1813 UINT64_C(3827302496), // M2_mpyd_rnd_hh_s0
1814 UINT64_C(3835691104), // M2_mpyd_rnd_hh_s1
1815 UINT64_C(3827302464), // M2_mpyd_rnd_hl_s0
1816 UINT64_C(3835691072), // M2_mpyd_rnd_hl_s1
1817 UINT64_C(3827302432), // M2_mpyd_rnd_lh_s0
1818 UINT64_C(3835691040), // M2_mpyd_rnd_lh_s1
1819 UINT64_C(3827302400), // M2_mpyd_rnd_ll_s0
1820 UINT64_C(3835691008), // M2_mpyd_rnd_ll_s1
1821 UINT64_C(3976200192), // M2_mpyi
1822 UINT64_C(3766484992), // M2_mpysin
1823 UINT64_C(3758096384), // M2_mpysip
1824 UINT64_C(3982491680), // M2_mpysu_up
1825 UINT64_C(3997171808), // M2_mpyu_acc_hh_s0
1826 UINT64_C(4005560416), // M2_mpyu_acc_hh_s1
1827 UINT64_C(3997171776), // M2_mpyu_acc_hl_s0
1828 UINT64_C(4005560384), // M2_mpyu_acc_hl_s1
1829 UINT64_C(3997171744), // M2_mpyu_acc_lh_s0
1830 UINT64_C(4005560352), // M2_mpyu_acc_lh_s1
1831 UINT64_C(3997171712), // M2_mpyu_acc_ll_s0
1832 UINT64_C(4005560320), // M2_mpyu_acc_ll_s1
1833 UINT64_C(3963617376), // M2_mpyu_hh_s0
1834 UINT64_C(3972005984), // M2_mpyu_hh_s1
1835 UINT64_C(3963617344), // M2_mpyu_hl_s0
1836 UINT64_C(3972005952), // M2_mpyu_hl_s1
1837 UINT64_C(3963617312), // M2_mpyu_lh_s0
1838 UINT64_C(3972005920), // M2_mpyu_lh_s1
1839 UINT64_C(3963617280), // M2_mpyu_ll_s0
1840 UINT64_C(3972005888), // M2_mpyu_ll_s1
1841 UINT64_C(3999268960), // M2_mpyu_nac_hh_s0
1842 UINT64_C(4007657568), // M2_mpyu_nac_hh_s1
1843 UINT64_C(3999268928), // M2_mpyu_nac_hl_s0
1844 UINT64_C(4007657536), // M2_mpyu_nac_hl_s1
1845 UINT64_C(3999268896), // M2_mpyu_nac_lh_s0
1846 UINT64_C(4007657504), // M2_mpyu_nac_lh_s1
1847 UINT64_C(3999268864), // M2_mpyu_nac_ll_s0
1848 UINT64_C(4007657472), // M2_mpyu_nac_ll_s1
1849 UINT64_C(3980394528), // M2_mpyu_up
1850 UINT64_C(3862954080), // M2_mpyud_acc_hh_s0
1851 UINT64_C(3871342688), // M2_mpyud_acc_hh_s1
1852 UINT64_C(3862954048), // M2_mpyud_acc_hl_s0
1853 UINT64_C(3871342656), // M2_mpyud_acc_hl_s1
1854 UINT64_C(3862954016), // M2_mpyud_acc_lh_s0
1855 UINT64_C(3871342624), // M2_mpyud_acc_lh_s1
1856 UINT64_C(3862953984), // M2_mpyud_acc_ll_s0
1857 UINT64_C(3871342592), // M2_mpyud_acc_ll_s1
1858 UINT64_C(3829399648), // M2_mpyud_hh_s0
1859 UINT64_C(3837788256), // M2_mpyud_hh_s1
1860 UINT64_C(3829399616), // M2_mpyud_hl_s0
1861 UINT64_C(3837788224), // M2_mpyud_hl_s1
1862 UINT64_C(3829399584), // M2_mpyud_lh_s0
1863 UINT64_C(3837788192), // M2_mpyud_lh_s1
1864 UINT64_C(3829399552), // M2_mpyud_ll_s0
1865 UINT64_C(3837788160), // M2_mpyud_ll_s1
1866 UINT64_C(3865051232), // M2_mpyud_nac_hh_s0
1867 UINT64_C(3873439840), // M2_mpyud_nac_hh_s1
1868 UINT64_C(3865051200), // M2_mpyud_nac_hl_s0
1869 UINT64_C(3873439808), // M2_mpyud_nac_hl_s1
1870 UINT64_C(3865051168), // M2_mpyud_nac_lh_s0
1871 UINT64_C(3873439776), // M2_mpyud_nac_lh_s1
1872 UINT64_C(3865051136), // M2_mpyud_nac_ll_s0
1873 UINT64_C(3873439744), // M2_mpyud_nac_ll_s1
1874 UINT64_C(4018143264), // M2_nacci
1875 UINT64_C(3800039424), // M2_naccii
1876 UINT64_C(4009754720), // M2_subacc
1877 UINT64_C(3898605568), // M2_vabsdiffh
1878 UINT64_C(3894411264), // M2_vabsdiffw
1879 UINT64_C(3930062976), // M2_vcmac_s0_sat_i
1880 UINT64_C(3927965824), // M2_vcmac_s0_sat_r
1881 UINT64_C(3896508608), // M2_vcmpy_s0_sat_i
1882 UINT64_C(3894411456), // M2_vcmpy_s0_sat_r
1883 UINT64_C(3904897216), // M2_vcmpy_s1_sat_i
1884 UINT64_C(3902800064), // M2_vcmpy_s1_sat_r
1885 UINT64_C(3925868672), // M2_vdmacs_s0
1886 UINT64_C(3934257280), // M2_vdmacs_s1
1887 UINT64_C(3909091328), // M2_vdmpyrs_s0
1888 UINT64_C(3917479936), // M2_vdmpyrs_s1
1889 UINT64_C(3892314240), // M2_vdmpys_s0
1890 UINT64_C(3900702848), // M2_vdmpys_s1
1891 UINT64_C(3877634080), // M2_vmac2
1892 UINT64_C(3927965760), // M2_vmac2es
1893 UINT64_C(3925868736), // M2_vmac2es_s0
1894 UINT64_C(3934257344), // M2_vmac2es_s1
1895 UINT64_C(3875537056), // M2_vmac2s_s0
1896 UINT64_C(3883925664), // M2_vmac2s_s1
1897 UINT64_C(3881828512), // M2_vmac2su_s0
1898 UINT64_C(3890217120), // M2_vmac2su_s1
1899 UINT64_C(3892314304), // M2_vmpy2es_s0
1900 UINT64_C(3900702912), // M2_vmpy2es_s1
1901 UINT64_C(3841982624), // M2_vmpy2s_s0
1902 UINT64_C(3978297568), // M2_vmpy2s_s0pack
1903 UINT64_C(3850371232), // M2_vmpy2s_s1
1904 UINT64_C(3986686176), // M2_vmpy2s_s1pack
1905 UINT64_C(3841982688), // M2_vmpy2su_s0
1906 UINT64_C(3850371296), // M2_vmpy2su_s1
1907 UINT64_C(3911188704), // M2_vraddh
1908 UINT64_C(3909091360), // M2_vradduh
1909 UINT64_C(3925868544), // M2_vrcmaci_s0
1910 UINT64_C(3930062848), // M2_vrcmaci_s0c
1911 UINT64_C(3925868576), // M2_vrcmacr_s0
1912 UINT64_C(3932160032), // M2_vrcmacr_s0c
1913 UINT64_C(3892314112), // M2_vrcmpyi_s0
1914 UINT64_C(3896508416), // M2_vrcmpyi_s0c
1915 UINT64_C(3892314144), // M2_vrcmpyr_s0
1916 UINT64_C(3898605600), // M2_vrcmpyr_s0c
1917 UINT64_C(3936354432), // M2_vrcmpys_acc_s1_h
1918 UINT64_C(3940548736), // M2_vrcmpys_acc_s1_l
1919 UINT64_C(3902800000), // M2_vrcmpys_s1_h
1920 UINT64_C(3906994304), // M2_vrcmpys_s1_l
1921 UINT64_C(3919577280), // M2_vrcmpys_s1rp_h
1922 UINT64_C(3919577312), // M2_vrcmpys_s1rp_l
1923 UINT64_C(3925868608), // M2_vrmac_s0
1924 UINT64_C(3892314176), // M2_vrmpy_s0
1925 UINT64_C(4018143328), // M2_xor_xacc
1926 UINT64_C(4013948928), // M4_and_and
1927 UINT64_C(4011851808), // M4_and_andn
1928 UINT64_C(4013948960), // M4_and_or
1929 UINT64_C(4013948992), // M4_and_xor
1930 UINT64_C(3305111680), // M4_cmpyi_wh
1931 UINT64_C(3305111712), // M4_cmpyi_whc
1932 UINT64_C(3305111744), // M4_cmpyr_wh
1933 UINT64_C(3305111776), // M4_cmpyr_whc
1934 UINT64_C(4016046080), // M4_mac_up_s1_sat
1935 UINT64_C(3623878656), // M4_mpyri_addi
1936 UINT64_C(3749707776), // M4_mpyri_addr
1937 UINT64_C(3741319168), // M4_mpyri_addr_u2
1938 UINT64_C(3607101440), // M4_mpyrr_addi
1939 UINT64_C(3808428032), // M4_mpyrr_addr
1940 UINT64_C(4016046112), // M4_nac_up_s1_sat
1941 UINT64_C(4013949024), // M4_or_and
1942 UINT64_C(4011851776), // M4_or_andn
1943 UINT64_C(4022337536), // M4_or_or
1944 UINT64_C(4022337568), // M4_or_xor
1945 UINT64_C(3846176992), // M4_pmpyw
1946 UINT64_C(3877634272), // M4_pmpyw_acc
1947 UINT64_C(3854565600), // M4_vpmpyh
1948 UINT64_C(3886022880), // M4_vpmpyh_acc
1949 UINT64_C(3927965888), // M4_vrmpyeh_acc_s0
1950 UINT64_C(3936354496), // M4_vrmpyeh_acc_s1
1951 UINT64_C(3896508544), // M4_vrmpyeh_s0
1952 UINT64_C(3904897152), // M4_vrmpyeh_s1
1953 UINT64_C(3932160192), // M4_vrmpyoh_acc_s0
1954 UINT64_C(3940548800), // M4_vrmpyoh_acc_s1
1955 UINT64_C(3894411328), // M4_vrmpyoh_s0
1956 UINT64_C(3902799936), // M4_vrmpyoh_s1
1957 UINT64_C(4022337600), // M4_xor_and
1958 UINT64_C(4011851840), // M4_xor_andn
1959 UINT64_C(4022337632), // M4_xor_or
1960 UINT64_C(3397386240), // M4_xor_xacc
1961 UINT64_C(3927965728), // M5_vdmacbsu
1962 UINT64_C(3902799904), // M5_vdmpybsu
1963 UINT64_C(3888119840), // M5_vmacbsu
1964 UINT64_C(3883925536), // M5_vmacbuu
1965 UINT64_C(3846176800), // M5_vmpybsu
1966 UINT64_C(3850371104), // M5_vmpybuu
1967 UINT64_C(3938451488), // M5_vrmacbsu
1968 UINT64_C(3934257184), // M5_vrmacbuu
1969 UINT64_C(3904897056), // M5_vrmpybsu
1970 UINT64_C(3900702752), // M5_vrmpybuu
1971 UINT64_C(3906994176), // M6_vabsdiffb
1972 UINT64_C(3902799872), // M6_vabsdiffub
1973 UINT64_C(3898605632), // M7_dcmpyiw
1974 UINT64_C(3932160064), // M7_dcmpyiw_acc
1975 UINT64_C(3906994240), // M7_dcmpyiwc
1976 UINT64_C(3930063040), // M7_dcmpyiwc_acc
1977 UINT64_C(3900702784), // M7_dcmpyrw
1978 UINT64_C(3934257216), // M7_dcmpyrw_acc
1979 UINT64_C(3904897088), // M7_dcmpyrwc
1980 UINT64_C(3938451520), // M7_dcmpyrwc_acc
1981 UINT64_C(3911188480), // M7_wcmpyiw
1982 UINT64_C(3919577088), // M7_wcmpyiw_rnd
1983 UINT64_C(3909091456), // M7_wcmpyiwc
1984 UINT64_C(3917480064), // M7_wcmpyiwc_rnd
1985 UINT64_C(3913285632), // M7_wcmpyrw
1986 UINT64_C(3921674240), // M7_wcmpyrw_rnd
1987 UINT64_C(3915382784), // M7_wcmpyrwc
1988 UINT64_C(3923771392), // M7_wcmpyrwc_rnd
1989 UINT64_C(1509949440), // PS_call_stk
1990 UINT64_C(1352663040), // PS_callr_nr
1991 UINT64_C(1384120320), // PS_jmpret
1992 UINT64_C(1398800384), // PS_jmpretf
1993 UINT64_C(1398802432), // PS_jmpretfnew
1994 UINT64_C(1398806528), // PS_jmpretfnewpt
1995 UINT64_C(1396703232), // PS_jmprett
1996 UINT64_C(1396705280), // PS_jmprettnew
1997 UINT64_C(1396709376), // PS_jmprettnewpt
1998 UINT64_C(1224736768), // PS_loadrbabs
1999 UINT64_C(1237319680), // PS_loadrdabs
2000 UINT64_C(1228931072), // PS_loadrhabs
2001 UINT64_C(1233125376), // PS_loadriabs
2002 UINT64_C(1226833920), // PS_loadrubabs
2003 UINT64_C(1231028224), // PS_loadruhabs
2004 UINT64_C(1207959552), // PS_storerbabs
2005 UINT64_C(1218445312), // PS_storerbnewabs
2006 UINT64_C(1220542464), // PS_storerdabs
2007 UINT64_C(1214251008), // PS_storerfabs
2008 UINT64_C(1212153856), // PS_storerhabs
2009 UINT64_C(1218447360), // PS_storerhnewabs
2010 UINT64_C(1216348160), // PS_storeriabs
2011 UINT64_C(1218449408), // PS_storerinewabs
2012 UINT64_C(1417674752), // PS_trap1
2013 UINT64_C(1509949440), // RESTORE_DEALLOC_BEFORE_TAILCALL_V4
2014 UINT64_C(1509949440), // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT
2015 UINT64_C(1509949440), // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC
2016 UINT64_C(1509949440), // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC
2017 UINT64_C(1476395008), // RESTORE_DEALLOC_RET_JMP_V4
2018 UINT64_C(1476395008), // RESTORE_DEALLOC_RET_JMP_V4_EXT
2019 UINT64_C(1476395008), // RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC
2020 UINT64_C(1476395008), // RESTORE_DEALLOC_RET_JMP_V4_PIC
2021 UINT64_C(3288334336), // S2_addasl_rrri
2022 UINT64_C(2692743168), // S2_allocframe
2023 UINT64_C(2147483712), // S2_asl_i_p
2024 UINT64_C(2181038272), // S2_asl_i_p_acc
2025 UINT64_C(2185232448), // S2_asl_i_p_and
2026 UINT64_C(2181038144), // S2_asl_i_p_nac
2027 UINT64_C(2185232576), // S2_asl_i_p_or
2028 UINT64_C(2189426752), // S2_asl_i_p_xacc
2029 UINT64_C(2348810304), // S2_asl_i_r
2030 UINT64_C(2382364864), // S2_asl_i_r_acc
2031 UINT64_C(2386559040), // S2_asl_i_r_and
2032 UINT64_C(2382364736), // S2_asl_i_r_nac
2033 UINT64_C(2386559168), // S2_asl_i_r_or
2034 UINT64_C(2353004608), // S2_asl_i_r_sat
2035 UINT64_C(2390753344), // S2_asl_i_r_xacc
2036 UINT64_C(2155872320), // S2_asl_i_vh
2037 UINT64_C(2151678016), // S2_asl_i_vw
2038 UINT64_C(3279945856), // S2_asl_r_p
2039 UINT64_C(3418357888), // S2_asl_r_p_acc
2040 UINT64_C(3409969280), // S2_asl_r_p_and
2041 UINT64_C(3414163584), // S2_asl_r_p_nac
2042 UINT64_C(3405774976), // S2_asl_r_p_or
2043 UINT64_C(3412066432), // S2_asl_r_p_xor
2044 UINT64_C(3326083200), // S2_asl_r_r
2045 UINT64_C(3435135104), // S2_asl_r_r_acc
2046 UINT64_C(3426746496), // S2_asl_r_r_and
2047 UINT64_C(3430940800), // S2_asl_r_r_nac
2048 UINT64_C(3422552192), // S2_asl_r_r_or
2049 UINT64_C(3321888896), // S2_asl_r_r_sat
2050 UINT64_C(3275751552), // S2_asl_r_vh
2051 UINT64_C(3271557248), // S2_asl_r_vw
2052 UINT64_C(2147483648), // S2_asr_i_p
2053 UINT64_C(2181038208), // S2_asr_i_p_acc
2054 UINT64_C(2185232384), // S2_asr_i_p_and
2055 UINT64_C(2181038080), // S2_asr_i_p_nac
2056 UINT64_C(2185232512), // S2_asr_i_p_or
2057 UINT64_C(2160066784), // S2_asr_i_p_rnd
2058 UINT64_C(2348810240), // S2_asr_i_r
2059 UINT64_C(2382364800), // S2_asr_i_r_acc
2060 UINT64_C(2386558976), // S2_asr_i_r_and
2061 UINT64_C(2382364672), // S2_asr_i_r_nac
2062 UINT64_C(2386559104), // S2_asr_i_r_or
2063 UINT64_C(2353004544), // S2_asr_i_r_rnd
2064 UINT64_C(2294284352), // S2_asr_i_svw_trun
2065 UINT64_C(2155872256), // S2_asr_i_vh
2066 UINT64_C(2151677952), // S2_asr_i_vw
2067 UINT64_C(3279945728), // S2_asr_r_p
2068 UINT64_C(3418357760), // S2_asr_r_p_acc
2069 UINT64_C(3409969152), // S2_asr_r_p_and
2070 UINT64_C(3414163456), // S2_asr_r_p_nac
2071 UINT64_C(3405774848), // S2_asr_r_p_or
2072 UINT64_C(3412066304), // S2_asr_r_p_xor
2073 UINT64_C(3326083072), // S2_asr_r_r
2074 UINT64_C(3435134976), // S2_asr_r_r_acc
2075 UINT64_C(3426746368), // S2_asr_r_r_and
2076 UINT64_C(3430940672), // S2_asr_r_r_nac
2077 UINT64_C(3422552064), // S2_asr_r_r_or
2078 UINT64_C(3321888768), // S2_asr_r_r_sat
2079 UINT64_C(3305111616), // S2_asr_r_svw_trun
2080 UINT64_C(3275751424), // S2_asr_r_vh
2081 UINT64_C(3271557120), // S2_asr_r_vw
2082 UINT64_C(2353004736), // S2_brev
2083 UINT64_C(2160066752), // S2_brevp
2084 UINT64_C(3250585792), // S2_cabacdecbin
2085 UINT64_C(2348810400), // S2_cl0
2086 UINT64_C(2285895744), // S2_cl0p
2087 UINT64_C(2348810432), // S2_cl1
2088 UINT64_C(2285895808), // S2_cl1p
2089 UINT64_C(2348810368), // S2_clb
2090 UINT64_C(2348810464), // S2_clbnorm
2091 UINT64_C(2285895680), // S2_clbp
2092 UINT64_C(2361393184), // S2_clrbit_i
2093 UINT64_C(3330277440), // S2_clrbit_r
2094 UINT64_C(2353004672), // S2_ct0
2095 UINT64_C(2296381504), // S2_ct0p
2096 UINT64_C(2353004704), // S2_ct1
2097 UINT64_C(2296381568), // S2_ct1p
2098 UINT64_C(2160066688), // S2_deinterleave
2099 UINT64_C(2365587456), // S2_extractu
2100 UINT64_C(3372220416), // S2_extractu_rp
2101 UINT64_C(2164260864), // S2_extractup
2102 UINT64_C(3238002688), // S2_extractup_rp
2103 UINT64_C(2399141888), // S2_insert
2104 UINT64_C(3355443200), // S2_insert_rp
2105 UINT64_C(2197815296), // S2_insertp
2106 UINT64_C(3388997632), // S2_insertp_rp
2107 UINT64_C(2160066720), // S2_interleave
2108 UINT64_C(3246391488), // S2_lfsp
2109 UINT64_C(3279945920), // S2_lsl_r_p
2110 UINT64_C(3418357952), // S2_lsl_r_p_acc
2111 UINT64_C(3409969344), // S2_lsl_r_p_and
2112 UINT64_C(3414163648), // S2_lsl_r_p_nac
2113 UINT64_C(3405775040), // S2_lsl_r_p_or
2114 UINT64_C(3412066496), // S2_lsl_r_p_xor
2115 UINT64_C(3326083264), // S2_lsl_r_r
2116 UINT64_C(3435135168), // S2_lsl_r_r_acc
2117 UINT64_C(3426746560), // S2_lsl_r_r_and
2118 UINT64_C(3430940864), // S2_lsl_r_r_nac
2119 UINT64_C(3422552256), // S2_lsl_r_r_or
2120 UINT64_C(3275751616), // S2_lsl_r_vh
2121 UINT64_C(3271557312), // S2_lsl_r_vw
2122 UINT64_C(2147483680), // S2_lsr_i_p
2123 UINT64_C(2181038240), // S2_lsr_i_p_acc
2124 UINT64_C(2185232416), // S2_lsr_i_p_and
2125 UINT64_C(2181038112), // S2_lsr_i_p_nac
2126 UINT64_C(2185232544), // S2_lsr_i_p_or
2127 UINT64_C(2189426720), // S2_lsr_i_p_xacc
2128 UINT64_C(2348810272), // S2_lsr_i_r
2129 UINT64_C(2382364832), // S2_lsr_i_r_acc
2130 UINT64_C(2386559008), // S2_lsr_i_r_and
2131 UINT64_C(2382364704), // S2_lsr_i_r_nac
2132 UINT64_C(2386559136), // S2_lsr_i_r_or
2133 UINT64_C(2390753312), // S2_lsr_i_r_xacc
2134 UINT64_C(2155872288), // S2_lsr_i_vh
2135 UINT64_C(2151677984), // S2_lsr_i_vw
2136 UINT64_C(3279945792), // S2_lsr_r_p
2137 UINT64_C(3418357824), // S2_lsr_r_p_acc
2138 UINT64_C(3409969216), // S2_lsr_r_p_and
2139 UINT64_C(3414163520), // S2_lsr_r_p_nac
2140 UINT64_C(3405774912), // S2_lsr_r_p_or
2141 UINT64_C(3412066368), // S2_lsr_r_p_xor
2142 UINT64_C(3326083136), // S2_lsr_r_r
2143 UINT64_C(3435135040), // S2_lsr_r_r_acc
2144 UINT64_C(3426746432), // S2_lsr_r_r_and
2145 UINT64_C(3430940736), // S2_lsr_r_r_nac
2146 UINT64_C(3422552128), // S2_lsr_r_r_or
2147 UINT64_C(3275751488), // S2_lsr_r_vh
2148 UINT64_C(3271557184), // S2_lsr_r_vw
2149 UINT64_C(2365595648), // S2_mask
2150 UINT64_C(4118806528), // S2_packhl
2151 UINT64_C(3489660928), // S2_parityp
2152 UINT64_C(1140850688), // S2_pstorerbf_io
2153 UINT64_C(2868912132), // S2_pstorerbf_pi
2154 UINT64_C(2868912260), // S2_pstorerbfnew_pi
2155 UINT64_C(1151336448), // S2_pstorerbnewf_io
2156 UINT64_C(2879397892), // S2_pstorerbnewf_pi
2157 UINT64_C(2879398020), // S2_pstorerbnewfnew_pi
2158 UINT64_C(1084227584), // S2_pstorerbnewt_io
2159 UINT64_C(2879397888), // S2_pstorerbnewt_pi
2160 UINT64_C(2879398016), // S2_pstorerbnewtnew_pi
2161 UINT64_C(1073741824), // S2_pstorerbt_io
2162 UINT64_C(2868912128), // S2_pstorerbt_pi
2163 UINT64_C(2868912256), // S2_pstorerbtnew_pi
2164 UINT64_C(1153433600), // S2_pstorerdf_io
2165 UINT64_C(2881495044), // S2_pstorerdf_pi
2166 UINT64_C(2881495172), // S2_pstorerdfnew_pi
2167 UINT64_C(1086324736), // S2_pstorerdt_io
2168 UINT64_C(2881495040), // S2_pstorerdt_pi
2169 UINT64_C(2881495168), // S2_pstorerdtnew_pi
2170 UINT64_C(1147142144), // S2_pstorerff_io
2171 UINT64_C(2875203588), // S2_pstorerff_pi
2172 UINT64_C(2875203716), // S2_pstorerffnew_pi
2173 UINT64_C(1080033280), // S2_pstorerft_io
2174 UINT64_C(2875203584), // S2_pstorerft_pi
2175 UINT64_C(2875203712), // S2_pstorerftnew_pi
2176 UINT64_C(1145044992), // S2_pstorerhf_io
2177 UINT64_C(2873106436), // S2_pstorerhf_pi
2178 UINT64_C(2873106564), // S2_pstorerhfnew_pi
2179 UINT64_C(1151338496), // S2_pstorerhnewf_io
2180 UINT64_C(2879399940), // S2_pstorerhnewf_pi
2181 UINT64_C(2879400068), // S2_pstorerhnewfnew_pi
2182 UINT64_C(1084229632), // S2_pstorerhnewt_io
2183 UINT64_C(2879399936), // S2_pstorerhnewt_pi
2184 UINT64_C(2879400064), // S2_pstorerhnewtnew_pi
2185 UINT64_C(1077936128), // S2_pstorerht_io
2186 UINT64_C(2873106432), // S2_pstorerht_pi
2187 UINT64_C(2873106560), // S2_pstorerhtnew_pi
2188 UINT64_C(1149239296), // S2_pstorerif_io
2189 UINT64_C(2877300740), // S2_pstorerif_pi
2190 UINT64_C(2877300868), // S2_pstorerifnew_pi
2191 UINT64_C(1151340544), // S2_pstorerinewf_io
2192 UINT64_C(2879401988), // S2_pstorerinewf_pi
2193 UINT64_C(2879402116), // S2_pstorerinewfnew_pi
2194 UINT64_C(1084231680), // S2_pstorerinewt_io
2195 UINT64_C(2879401984), // S2_pstorerinewt_pi
2196 UINT64_C(2879402112), // S2_pstorerinewtnew_pi
2197 UINT64_C(1082130432), // S2_pstorerit_io
2198 UINT64_C(2877300736), // S2_pstorerit_pi
2199 UINT64_C(2877300864), // S2_pstoreritnew_pi
2200 UINT64_C(2361393152), // S2_setbit_i
2201 UINT64_C(3330277376), // S2_setbit_r
2202 UINT64_C(3238002752), // S2_shuffeb
2203 UINT64_C(3238002880), // S2_shuffeh
2204 UINT64_C(3238002816), // S2_shuffob
2205 UINT64_C(3246391296), // S2_shuffoh
2206 UINT64_C(2701131776), // S2_storerb_io
2207 UINT64_C(2936012800), // S2_storerb_pbr
2208 UINT64_C(2835349504), // S2_storerb_pci
2209 UINT64_C(2835349506), // S2_storerb_pcr
2210 UINT64_C(2868903936), // S2_storerb_pi
2211 UINT64_C(2902458368), // S2_storerb_pr
2212 UINT64_C(1207959552), // S2_storerbgp
2213 UINT64_C(2711617536), // S2_storerbnew_io
2214 UINT64_C(2946498560), // S2_storerbnew_pbr
2215 UINT64_C(2845835264), // S2_storerbnew_pci
2216 UINT64_C(2845835266), // S2_storerbnew_pcr
2217 UINT64_C(2879389696), // S2_storerbnew_pi
2218 UINT64_C(2912944128), // S2_storerbnew_pr
2219 UINT64_C(1218445312), // S2_storerbnewgp
2220 UINT64_C(2713714688), // S2_storerd_io
2221 UINT64_C(2948595712), // S2_storerd_pbr
2222 UINT64_C(2847932416), // S2_storerd_pci
2223 UINT64_C(2847932418), // S2_storerd_pcr
2224 UINT64_C(2881486848), // S2_storerd_pi
2225 UINT64_C(2915041280), // S2_storerd_pr
2226 UINT64_C(1220542464), // S2_storerdgp
2227 UINT64_C(2707423232), // S2_storerf_io
2228 UINT64_C(2942304256), // S2_storerf_pbr
2229 UINT64_C(2841640960), // S2_storerf_pci
2230 UINT64_C(2841640962), // S2_storerf_pcr
2231 UINT64_C(2875195392), // S2_storerf_pi
2232 UINT64_C(2908749824), // S2_storerf_pr
2233 UINT64_C(1214251008), // S2_storerfgp
2234 UINT64_C(2705326080), // S2_storerh_io
2235 UINT64_C(2940207104), // S2_storerh_pbr
2236 UINT64_C(2839543808), // S2_storerh_pci
2237 UINT64_C(2839543810), // S2_storerh_pcr
2238 UINT64_C(2873098240), // S2_storerh_pi
2239 UINT64_C(2906652672), // S2_storerh_pr
2240 UINT64_C(1212153856), // S2_storerhgp
2241 UINT64_C(2711619584), // S2_storerhnew_io
2242 UINT64_C(2946500608), // S2_storerhnew_pbr
2243 UINT64_C(2845837312), // S2_storerhnew_pci
2244 UINT64_C(2845837314), // S2_storerhnew_pcr
2245 UINT64_C(2879391744), // S2_storerhnew_pi
2246 UINT64_C(2912946176), // S2_storerhnew_pr
2247 UINT64_C(1218447360), // S2_storerhnewgp
2248 UINT64_C(2709520384), // S2_storeri_io
2249 UINT64_C(2944401408), // S2_storeri_pbr
2250 UINT64_C(2843738112), // S2_storeri_pci
2251 UINT64_C(2843738114), // S2_storeri_pcr
2252 UINT64_C(2877292544), // S2_storeri_pi
2253 UINT64_C(2910846976), // S2_storeri_pr
2254 UINT64_C(1216348160), // S2_storerigp
2255 UINT64_C(2711621632), // S2_storerinew_io
2256 UINT64_C(2946502656), // S2_storerinew_pbr
2257 UINT64_C(2845839360), // S2_storerinew_pci
2258 UINT64_C(2845839362), // S2_storerinew_pcr
2259 UINT64_C(2879393792), // S2_storerinew_pi
2260 UINT64_C(2912948224), // S2_storerinew_pr
2261 UINT64_C(1218449408), // S2_storerinewgp
2262 UINT64_C(2694840320), // S2_storew_locked
2263 UINT64_C(2357198848), // S2_svsathb
2264 UINT64_C(2357198912), // S2_svsathub
2265 UINT64_C(2264924160), // S2_tableidxb
2266 UINT64_C(2277507072), // S2_tableidxd
2267 UINT64_C(2269118464), // S2_tableidxh
2268 UINT64_C(2273312768), // S2_tableidxw
2269 UINT64_C(2361393216), // S2_togglebit_i
2270 UINT64_C(3330277504), // S2_togglebit_r
2271 UINT64_C(2231369728), // S2_tstbit_i
2272 UINT64_C(3338665984), // S2_tstbit_r
2273 UINT64_C(3221225472), // S2_valignib
2274 UINT64_C(3254779904), // S2_valignrb
2275 UINT64_C(3284140096), // S2_vcnegh
2276 UINT64_C(3284140032), // S2_vcrotate
2277 UINT64_C(3407880416), // S2_vrcnegh
2278 UINT64_C(2290090112), // S2_vrndpackwh
2279 UINT64_C(2290090176), // S2_vrndpackwhs
2280 UINT64_C(2281701568), // S2_vsathb
2281 UINT64_C(2147483872), // S2_vsathb_nopack
2282 UINT64_C(2281701376), // S2_vsathub
2283 UINT64_C(2147483776), // S2_vsathub_nopack
2284 UINT64_C(2281701440), // S2_vsatwh
2285 UINT64_C(2147483840), // S2_vsatwh_nopack
2286 UINT64_C(2281701504), // S2_vsatwuh
2287 UINT64_C(2147483808), // S2_vsatwuh_nopack
2288 UINT64_C(2353004768), // S2_vsplatrb
2289 UINT64_C(2218786880), // S2_vsplatrh
2290 UINT64_C(3229614080), // S2_vspliceib
2291 UINT64_C(3263168512), // S2_vsplicerb
2292 UINT64_C(2214592512), // S2_vsxtbh
2293 UINT64_C(2214592640), // S2_vsxthw
2294 UINT64_C(2290090048), // S2_vtrunehb
2295 UINT64_C(3246391360), // S2_vtrunewh
2296 UINT64_C(2290089984), // S2_vtrunohb
2297 UINT64_C(3246391424), // S2_vtrunowh
2298 UINT64_C(2214592576), // S2_vzxtbh
2299 UINT64_C(2214592704), // S2_vzxthw
2300 UINT64_C(3674210304), // S4_addaddi
2301 UINT64_C(3724541956), // S4_addi_asl_ri
2302 UINT64_C(3724541972), // S4_addi_lsr_ri
2303 UINT64_C(3724541952), // S4_andi_asl_ri
2304 UINT64_C(3724541968), // S4_andi_lsr_ri
2305 UINT64_C(2350907392), // S4_clbaddi
2306 UINT64_C(2287992896), // S4_clbpaddi
2307 UINT64_C(2287992832), // S4_clbpnorm
2308 UINT64_C(2373976064), // S4_extract
2309 UINT64_C(3372220480), // S4_extract_rp
2310 UINT64_C(2315255808), // S4_extractp
2311 UINT64_C(3250585728), // S4_extractp_rp
2312 UINT64_C(3330277568), // S4_lsli
2313 UINT64_C(2233466880), // S4_ntstbit_i
2314 UINT64_C(3340763136), // S4_ntstbit_r
2315 UINT64_C(3657433088), // S4_or_andi
2316 UINT64_C(3661627392), // S4_or_andix
2317 UINT64_C(3665821696), // S4_or_ori
2318 UINT64_C(3724541954), // S4_ori_asl_ri
2319 UINT64_C(3724541970), // S4_ori_lsr_ri
2320 UINT64_C(3588227072), // S4_parity
2321 UINT64_C(2936012932), // S4_pstorerbf_abs
2322 UINT64_C(889192448), // S4_pstorerbf_rr
2323 UINT64_C(2936021124), // S4_pstorerbfnew_abs
2324 UINT64_C(1174405120), // S4_pstorerbfnew_io
2325 UINT64_C(922746880), // S4_pstorerbfnew_rr
2326 UINT64_C(2946498692), // S4_pstorerbnewf_abs
2327 UINT64_C(899678208), // S4_pstorerbnewf_rr
2328 UINT64_C(2946506884), // S4_pstorerbnewfnew_abs
2329 UINT64_C(1184890880), // S4_pstorerbnewfnew_io
2330 UINT64_C(933232640), // S4_pstorerbnewfnew_rr
2331 UINT64_C(2946498688), // S4_pstorerbnewt_abs
2332 UINT64_C(882900992), // S4_pstorerbnewt_rr
2333 UINT64_C(2946506880), // S4_pstorerbnewtnew_abs
2334 UINT64_C(1117782016), // S4_pstorerbnewtnew_io
2335 UINT64_C(916455424), // S4_pstorerbnewtnew_rr
2336 UINT64_C(2936012928), // S4_pstorerbt_abs
2337 UINT64_C(872415232), // S4_pstorerbt_rr
2338 UINT64_C(2936021120), // S4_pstorerbtnew_abs
2339 UINT64_C(1107296256), // S4_pstorerbtnew_io
2340 UINT64_C(905969664), // S4_pstorerbtnew_rr
2341 UINT64_C(2948595844), // S4_pstorerdf_abs
2342 UINT64_C(901775360), // S4_pstorerdf_rr
2343 UINT64_C(2948604036), // S4_pstorerdfnew_abs
2344 UINT64_C(1186988032), // S4_pstorerdfnew_io
2345 UINT64_C(935329792), // S4_pstorerdfnew_rr
2346 UINT64_C(2948595840), // S4_pstorerdt_abs
2347 UINT64_C(884998144), // S4_pstorerdt_rr
2348 UINT64_C(2948604032), // S4_pstorerdtnew_abs
2349 UINT64_C(1119879168), // S4_pstorerdtnew_io
2350 UINT64_C(918552576), // S4_pstorerdtnew_rr
2351 UINT64_C(2942304388), // S4_pstorerff_abs
2352 UINT64_C(895483904), // S4_pstorerff_rr
2353 UINT64_C(2942312580), // S4_pstorerffnew_abs
2354 UINT64_C(1180696576), // S4_pstorerffnew_io
2355 UINT64_C(929038336), // S4_pstorerffnew_rr
2356 UINT64_C(2942304384), // S4_pstorerft_abs
2357 UINT64_C(878706688), // S4_pstorerft_rr
2358 UINT64_C(2942312576), // S4_pstorerftnew_abs
2359 UINT64_C(1113587712), // S4_pstorerftnew_io
2360 UINT64_C(912261120), // S4_pstorerftnew_rr
2361 UINT64_C(2940207236), // S4_pstorerhf_abs
2362 UINT64_C(893386752), // S4_pstorerhf_rr
2363 UINT64_C(2940215428), // S4_pstorerhfnew_abs
2364 UINT64_C(1178599424), // S4_pstorerhfnew_io
2365 UINT64_C(926941184), // S4_pstorerhfnew_rr
2366 UINT64_C(2946500740), // S4_pstorerhnewf_abs
2367 UINT64_C(899678216), // S4_pstorerhnewf_rr
2368 UINT64_C(2946508932), // S4_pstorerhnewfnew_abs
2369 UINT64_C(1184892928), // S4_pstorerhnewfnew_io
2370 UINT64_C(933232648), // S4_pstorerhnewfnew_rr
2371 UINT64_C(2946500736), // S4_pstorerhnewt_abs
2372 UINT64_C(882901000), // S4_pstorerhnewt_rr
2373 UINT64_C(2946508928), // S4_pstorerhnewtnew_abs
2374 UINT64_C(1117784064), // S4_pstorerhnewtnew_io
2375 UINT64_C(916455432), // S4_pstorerhnewtnew_rr
2376 UINT64_C(2940207232), // S4_pstorerht_abs
2377 UINT64_C(876609536), // S4_pstorerht_rr
2378 UINT64_C(2940215424), // S4_pstorerhtnew_abs
2379 UINT64_C(1111490560), // S4_pstorerhtnew_io
2380 UINT64_C(910163968), // S4_pstorerhtnew_rr
2381 UINT64_C(2944401540), // S4_pstorerif_abs
2382 UINT64_C(897581056), // S4_pstorerif_rr
2383 UINT64_C(2944409732), // S4_pstorerifnew_abs
2384 UINT64_C(1182793728), // S4_pstorerifnew_io
2385 UINT64_C(931135488), // S4_pstorerifnew_rr
2386 UINT64_C(2946502788), // S4_pstorerinewf_abs
2387 UINT64_C(899678224), // S4_pstorerinewf_rr
2388 UINT64_C(2946510980), // S4_pstorerinewfnew_abs
2389 UINT64_C(1184894976), // S4_pstorerinewfnew_io
2390 UINT64_C(933232656), // S4_pstorerinewfnew_rr
2391 UINT64_C(2946502784), // S4_pstorerinewt_abs
2392 UINT64_C(882901008), // S4_pstorerinewt_rr
2393 UINT64_C(2946510976), // S4_pstorerinewtnew_abs
2394 UINT64_C(1117786112), // S4_pstorerinewtnew_io
2395 UINT64_C(916455440), // S4_pstorerinewtnew_rr
2396 UINT64_C(2944401536), // S4_pstorerit_abs
2397 UINT64_C(880803840), // S4_pstorerit_rr
2398 UINT64_C(2944409728), // S4_pstoreritnew_abs
2399 UINT64_C(1115684864), // S4_pstoreritnew_io
2400 UINT64_C(914358272), // S4_pstoreritnew_rr
2401 UINT64_C(2699034624), // S4_stored_locked
2402 UINT64_C(1006632960), // S4_storeirb_io
2403 UINT64_C(947912704), // S4_storeirbf_io
2404 UINT64_C(964689920), // S4_storeirbfnew_io
2405 UINT64_C(939524096), // S4_storeirbt_io
2406 UINT64_C(956301312), // S4_storeirbtnew_io
2407 UINT64_C(1008730112), // S4_storeirh_io
2408 UINT64_C(950009856), // S4_storeirhf_io
2409 UINT64_C(966787072), // S4_storeirhfnew_io
2410 UINT64_C(941621248), // S4_storeirht_io
2411 UINT64_C(958398464), // S4_storeirhtnew_io
2412 UINT64_C(1010827264), // S4_storeiri_io
2413 UINT64_C(952107008), // S4_storeirif_io
2414 UINT64_C(968884224), // S4_storeirifnew_io
2415 UINT64_C(943718400), // S4_storeirit_io
2416 UINT64_C(960495616), // S4_storeiritnew_io
2417 UINT64_C(2868904064), // S4_storerb_ap
2418 UINT64_C(989855744), // S4_storerb_rr
2419 UINT64_C(2902458496), // S4_storerb_ur
2420 UINT64_C(2879389824), // S4_storerbnew_ap
2421 UINT64_C(1000341504), // S4_storerbnew_rr
2422 UINT64_C(2912944256), // S4_storerbnew_ur
2423 UINT64_C(2881486976), // S4_storerd_ap
2424 UINT64_C(1002438656), // S4_storerd_rr
2425 UINT64_C(2915041408), // S4_storerd_ur
2426 UINT64_C(2875195520), // S4_storerf_ap
2427 UINT64_C(996147200), // S4_storerf_rr
2428 UINT64_C(2908749952), // S4_storerf_ur
2429 UINT64_C(2873098368), // S4_storerh_ap
2430 UINT64_C(994050048), // S4_storerh_rr
2431 UINT64_C(2906652800), // S4_storerh_ur
2432 UINT64_C(2879391872), // S4_storerhnew_ap
2433 UINT64_C(1000341512), // S4_storerhnew_rr
2434 UINT64_C(2912946304), // S4_storerhnew_ur
2435 UINT64_C(2877292672), // S4_storeri_ap
2436 UINT64_C(998244352), // S4_storeri_rr
2437 UINT64_C(2910847104), // S4_storeri_ur
2438 UINT64_C(2879393920), // S4_storerinew_ap
2439 UINT64_C(1000341520), // S4_storerinew_rr
2440 UINT64_C(2912948352), // S4_storerinew_ur
2441 UINT64_C(3682598912), // S4_subaddi
2442 UINT64_C(3724541958), // S4_subi_asl_ri
2443 UINT64_C(3724541974), // S4_subi_lsr_ri
2444 UINT64_C(3284140224), // S4_vrcrotate
2445 UINT64_C(3416260608), // S4_vrcrotate_acc
2446 UINT64_C(3242197120), // S4_vxaddsubh
2447 UINT64_C(3250585600), // S4_vxaddsubhr
2448 UINT64_C(3242196992), // S4_vxaddsubw
2449 UINT64_C(3242197184), // S4_vxsubaddh
2450 UINT64_C(3250585664), // S4_vxsubaddhr
2451 UINT64_C(3242197056), // S4_vxsubaddw
2452 UINT64_C(2287992960), // S5_asrhub_rnd_sat
2453 UINT64_C(2287992992), // S5_asrhub_sat
2454 UINT64_C(2287992928), // S5_popcountp
2455 UINT64_C(2149580800), // S5_vasrhrnd
2456 UINT64_C(2147483744), // S6_rol_i_p
2457 UINT64_C(2181038304), // S6_rol_i_p_acc
2458 UINT64_C(2185232480), // S6_rol_i_p_and
2459 UINT64_C(2181038176), // S6_rol_i_p_nac
2460 UINT64_C(2185232608), // S6_rol_i_p_or
2461 UINT64_C(2189426784), // S6_rol_i_p_xacc
2462 UINT64_C(2348810336), // S6_rol_i_r
2463 UINT64_C(2382364896), // S6_rol_i_r_acc
2464 UINT64_C(2386559072), // S6_rol_i_r_and
2465 UINT64_C(2382364768), // S6_rol_i_r_nac
2466 UINT64_C(2386559200), // S6_rol_i_r_or
2467 UINT64_C(2390753376), // S6_rol_i_r_xacc
2468 UINT64_C(2218786944), // S6_vsplatrbp
2469 UINT64_C(3246391392), // S6_vtrunehb_ppp
2470 UINT64_C(3246391456), // S6_vtrunohb_ppp
2471 UINT64_C(0), // SA1_addi
2472 UINT64_C(6144), // SA1_addrx
2473 UINT64_C(3072), // SA1_addsp
2474 UINT64_C(4608), // SA1_and1
2475 UINT64_C(6768), // SA1_clrf
2476 UINT64_C(6736), // SA1_clrfnew
2477 UINT64_C(6752), // SA1_clrt
2478 UINT64_C(6720), // SA1_clrtnew
2479 UINT64_C(6400), // SA1_cmpeqi
2480 UINT64_C(7168), // SA1_combine0i
2481 UINT64_C(7176), // SA1_combine1i
2482 UINT64_C(7184), // SA1_combine2i
2483 UINT64_C(7192), // SA1_combine3i
2484 UINT64_C(7432), // SA1_combinerz
2485 UINT64_C(7424), // SA1_combinezr
2486 UINT64_C(4864), // SA1_dec
2487 UINT64_C(4352), // SA1_inc
2488 UINT64_C(2048), // SA1_seti
2489 UINT64_C(6656), // SA1_setin1
2490 UINT64_C(5376), // SA1_sxtb
2491 UINT64_C(5120), // SA1_sxth
2492 UINT64_C(4096), // SA1_tfr
2493 UINT64_C(5888), // SA1_zxtb
2494 UINT64_C(5632), // SA1_zxth
2495 UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4
2496 UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4STK
2497 UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4STK_EXT
2498 UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4STK_EXT_PIC
2499 UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4STK_PIC
2500 UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4_EXT
2501 UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4_EXT_PIC
2502 UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4_PIC
2503 UINT64_C(0), // SL1_loadri_io
2504 UINT64_C(4096), // SL1_loadrub_io
2505 UINT64_C(7936), // SL2_deallocframe
2506 UINT64_C(8128), // SL2_jumpr31
2507 UINT64_C(8133), // SL2_jumpr31_f
2508 UINT64_C(8135), // SL2_jumpr31_fnew
2509 UINT64_C(8132), // SL2_jumpr31_t
2510 UINT64_C(8134), // SL2_jumpr31_tnew
2511 UINT64_C(4096), // SL2_loadrb_io
2512 UINT64_C(7680), // SL2_loadrd_sp
2513 UINT64_C(0), // SL2_loadrh_io
2514 UINT64_C(7168), // SL2_loadri_sp
2515 UINT64_C(2048), // SL2_loadruh_io
2516 UINT64_C(8000), // SL2_return
2517 UINT64_C(8005), // SL2_return_f
2518 UINT64_C(8007), // SL2_return_fnew
2519 UINT64_C(8004), // SL2_return_t
2520 UINT64_C(8006), // SL2_return_tnew
2521 UINT64_C(4096), // SS1_storeb_io
2522 UINT64_C(0), // SS1_storew_io
2523 UINT64_C(7168), // SS2_allocframe
2524 UINT64_C(4608), // SS2_storebi0
2525 UINT64_C(4864), // SS2_storebi1
2526 UINT64_C(2560), // SS2_stored_sp
2527 UINT64_C(0), // SS2_storeh_io
2528 UINT64_C(2048), // SS2_storew_sp
2529 UINT64_C(4096), // SS2_storewi0
2530 UINT64_C(4352), // SS2_storewi1
2531 UINT64_C(0), // TFRI64_V2_ext
2532 UINT64_C(0), // TFRI64_V4
2533 UINT64_C(2449473568), // V6_extractw
2534 UINT64_C(432013376), // V6_lvsplatb
2535 UINT64_C(432013344), // V6_lvsplath
2536 UINT64_C(429916192), // V6_lvsplatw
2537 UINT64_C(503513088), // V6_pred_and
2538 UINT64_C(503513108), // V6_pred_and_n
2539 UINT64_C(503513096), // V6_pred_not
2540 UINT64_C(503513092), // V6_pred_or
2541 UINT64_C(503513104), // V6_pred_or_n
2542 UINT64_C(429916228), // V6_pred_scalar2
2543 UINT64_C(429916236), // V6_pred_scalar2v2
2544 UINT64_C(503513100), // V6_pred_xor
2545 UINT64_C(503513112), // V6_shuffeqh
2546 UINT64_C(503513116), // V6_shuffeqw
2547 UINT64_C(671088864), // V6_vL32Ub_ai
2548 UINT64_C(687866080), // V6_vL32Ub_pi
2549 UINT64_C(721420512), // V6_vL32Ub_ppu
2550 UINT64_C(671088640), // V6_vL32b_ai
2551 UINT64_C(671088672), // V6_vL32b_cur_ai
2552 UINT64_C(679477408), // V6_vL32b_cur_npred_ai
2553 UINT64_C(696254624), // V6_vL32b_cur_npred_pi
2554 UINT64_C(729809056), // V6_vL32b_cur_npred_ppu
2555 UINT64_C(687865888), // V6_vL32b_cur_pi
2556 UINT64_C(721420320), // V6_vL32b_cur_ppu
2557 UINT64_C(679477376), // V6_vL32b_cur_pred_ai
2558 UINT64_C(696254592), // V6_vL32b_cur_pred_pi
2559 UINT64_C(729809024), // V6_vL32b_cur_pred_ppu
2560 UINT64_C(679477344), // V6_vL32b_npred_ai
2561 UINT64_C(696254560), // V6_vL32b_npred_pi
2562 UINT64_C(729808992), // V6_vL32b_npred_ppu
2563 UINT64_C(675282944), // V6_vL32b_nt_ai
2564 UINT64_C(675282976), // V6_vL32b_nt_cur_ai
2565 UINT64_C(683671712), // V6_vL32b_nt_cur_npred_ai
2566 UINT64_C(700448928), // V6_vL32b_nt_cur_npred_pi
2567 UINT64_C(734003360), // V6_vL32b_nt_cur_npred_ppu
2568 UINT64_C(692060192), // V6_vL32b_nt_cur_pi
2569 UINT64_C(725614624), // V6_vL32b_nt_cur_ppu
2570 UINT64_C(683671680), // V6_vL32b_nt_cur_pred_ai
2571 UINT64_C(700448896), // V6_vL32b_nt_cur_pred_pi
2572 UINT64_C(734003328), // V6_vL32b_nt_cur_pred_ppu
2573 UINT64_C(683671648), // V6_vL32b_nt_npred_ai
2574 UINT64_C(700448864), // V6_vL32b_nt_npred_pi
2575 UINT64_C(734003296), // V6_vL32b_nt_npred_ppu
2576 UINT64_C(692060160), // V6_vL32b_nt_pi
2577 UINT64_C(725614592), // V6_vL32b_nt_ppu
2578 UINT64_C(683671616), // V6_vL32b_nt_pred_ai
2579 UINT64_C(700448832), // V6_vL32b_nt_pred_pi
2580 UINT64_C(734003264), // V6_vL32b_nt_pred_ppu
2581 UINT64_C(675283008), // V6_vL32b_nt_tmp_ai
2582 UINT64_C(683671776), // V6_vL32b_nt_tmp_npred_ai
2583 UINT64_C(700448992), // V6_vL32b_nt_tmp_npred_pi
2584 UINT64_C(734003424), // V6_vL32b_nt_tmp_npred_ppu
2585 UINT64_C(692060224), // V6_vL32b_nt_tmp_pi
2586 UINT64_C(725614656), // V6_vL32b_nt_tmp_ppu
2587 UINT64_C(683671744), // V6_vL32b_nt_tmp_pred_ai
2588 UINT64_C(700448960), // V6_vL32b_nt_tmp_pred_pi
2589 UINT64_C(734003392), // V6_vL32b_nt_tmp_pred_ppu
2590 UINT64_C(687865856), // V6_vL32b_pi
2591 UINT64_C(721420288), // V6_vL32b_ppu
2592 UINT64_C(679477312), // V6_vL32b_pred_ai
2593 UINT64_C(696254528), // V6_vL32b_pred_pi
2594 UINT64_C(729808960), // V6_vL32b_pred_ppu
2595 UINT64_C(671088704), // V6_vL32b_tmp_ai
2596 UINT64_C(679477472), // V6_vL32b_tmp_npred_ai
2597 UINT64_C(696254688), // V6_vL32b_tmp_npred_pi
2598 UINT64_C(729809120), // V6_vL32b_tmp_npred_ppu
2599 UINT64_C(687865920), // V6_vL32b_tmp_pi
2600 UINT64_C(721420352), // V6_vL32b_tmp_ppu
2601 UINT64_C(679477440), // V6_vL32b_tmp_pred_ai
2602 UINT64_C(696254656), // V6_vL32b_tmp_pred_pi
2603 UINT64_C(729809088), // V6_vL32b_tmp_pred_ppu
2604 UINT64_C(673186016), // V6_vS32Ub_ai
2605 UINT64_C(681574624), // V6_vS32Ub_npred_ai
2606 UINT64_C(698351840), // V6_vS32Ub_npred_pi
2607 UINT64_C(731906272), // V6_vS32Ub_npred_ppu
2608 UINT64_C(689963232), // V6_vS32Ub_pi
2609 UINT64_C(723517664), // V6_vS32Ub_ppu
2610 UINT64_C(681574592), // V6_vS32Ub_pred_ai
2611 UINT64_C(698351808), // V6_vS32Ub_pred_pi
2612 UINT64_C(731906240), // V6_vS32Ub_pred_ppu
2613 UINT64_C(673185792), // V6_vS32b_ai
2614 UINT64_C(673185824), // V6_vS32b_new_ai
2615 UINT64_C(681574504), // V6_vS32b_new_npred_ai
2616 UINT64_C(698351720), // V6_vS32b_new_npred_pi
2617 UINT64_C(731906152), // V6_vS32b_new_npred_ppu
2618 UINT64_C(689963040), // V6_vS32b_new_pi
2619 UINT64_C(723517472), // V6_vS32b_new_ppu
2620 UINT64_C(681574464), // V6_vS32b_new_pred_ai
2621 UINT64_C(698351680), // V6_vS32b_new_pred_pi
2622 UINT64_C(731906112), // V6_vS32b_new_pred_ppu
2623 UINT64_C(681574432), // V6_vS32b_npred_ai
2624 UINT64_C(698351648), // V6_vS32b_npred_pi
2625 UINT64_C(731906080), // V6_vS32b_npred_ppu
2626 UINT64_C(679477280), // V6_vS32b_nqpred_ai
2627 UINT64_C(696254496), // V6_vS32b_nqpred_pi
2628 UINT64_C(729808928), // V6_vS32b_nqpred_ppu
2629 UINT64_C(677380096), // V6_vS32b_nt_ai
2630 UINT64_C(677380128), // V6_vS32b_nt_new_ai
2631 UINT64_C(685768824), // V6_vS32b_nt_new_npred_ai
2632 UINT64_C(702546040), // V6_vS32b_nt_new_npred_pi
2633 UINT64_C(736100472), // V6_vS32b_nt_new_npred_ppu
2634 UINT64_C(694157344), // V6_vS32b_nt_new_pi
2635 UINT64_C(727711776), // V6_vS32b_nt_new_ppu
2636 UINT64_C(685768784), // V6_vS32b_nt_new_pred_ai
2637 UINT64_C(702546000), // V6_vS32b_nt_new_pred_pi
2638 UINT64_C(736100432), // V6_vS32b_nt_new_pred_ppu
2639 UINT64_C(685768736), // V6_vS32b_nt_npred_ai
2640 UINT64_C(702545952), // V6_vS32b_nt_npred_pi
2641 UINT64_C(736100384), // V6_vS32b_nt_npred_ppu
2642 UINT64_C(683671584), // V6_vS32b_nt_nqpred_ai
2643 UINT64_C(700448800), // V6_vS32b_nt_nqpred_pi
2644 UINT64_C(734003232), // V6_vS32b_nt_nqpred_ppu
2645 UINT64_C(694157312), // V6_vS32b_nt_pi
2646 UINT64_C(727711744), // V6_vS32b_nt_ppu
2647 UINT64_C(685768704), // V6_vS32b_nt_pred_ai
2648 UINT64_C(702545920), // V6_vS32b_nt_pred_pi
2649 UINT64_C(736100352), // V6_vS32b_nt_pred_ppu
2650 UINT64_C(683671552), // V6_vS32b_nt_qpred_ai
2651 UINT64_C(700448768), // V6_vS32b_nt_qpred_pi
2652 UINT64_C(734003200), // V6_vS32b_nt_qpred_ppu
2653 UINT64_C(689963008), // V6_vS32b_pi
2654 UINT64_C(723517440), // V6_vS32b_ppu
2655 UINT64_C(681574400), // V6_vS32b_pred_ai
2656 UINT64_C(698351616), // V6_vS32b_pred_pi
2657 UINT64_C(731906048), // V6_vS32b_pred_ppu
2658 UINT64_C(679477248), // V6_vS32b_qpred_ai
2659 UINT64_C(696254464), // V6_vS32b_qpred_pi
2660 UINT64_C(729808896), // V6_vS32b_qpred_ppu
2661 UINT64_C(673185832), // V6_vS32b_srls_ai
2662 UINT64_C(689963048), // V6_vS32b_srls_pi
2663 UINT64_C(723517480), // V6_vS32b_srls_ppu
2664 UINT64_C(503382144), // V6_vabsb
2665 UINT64_C(503382176), // V6_vabsb_sat
2666 UINT64_C(482344992), // V6_vabsdiffh
2667 UINT64_C(482344960), // V6_vabsdiffub
2668 UINT64_C(482345024), // V6_vabsdiffuh
2669 UINT64_C(482345056), // V6_vabsdiffw
2670 UINT64_C(503316480), // V6_vabsh
2671 UINT64_C(503316512), // V6_vabsh_sat
2672 UINT64_C(503316544), // V6_vabsw
2673 UINT64_C(503316576), // V6_vabsw_sat
2674 UINT64_C(530579648), // V6_vaddb
2675 UINT64_C(476053632), // V6_vaddb_dv
2676 UINT64_C(503390304), // V6_vaddbnq
2677 UINT64_C(503390208), // V6_vaddbq
2678 UINT64_C(520093696), // V6_vaddbsat
2679 UINT64_C(513802240), // V6_vaddbsat_dv
2680 UINT64_C(480256000), // V6_vaddcarry
2681 UINT64_C(497033216), // V6_vaddcarryo
2682 UINT64_C(494936064), // V6_vaddcarrysat
2683 UINT64_C(520101888), // V6_vaddclbh
2684 UINT64_C(520101920), // V6_vaddclbw
2685 UINT64_C(530579680), // V6_vaddh
2686 UINT64_C(476053664), // V6_vaddh_dv
2687 UINT64_C(503390336), // V6_vaddhnq
2688 UINT64_C(503390240), // V6_vaddhq
2689 UINT64_C(473956448), // V6_vaddhsat
2690 UINT64_C(478150688), // V6_vaddhsat_dv
2691 UINT64_C(480247936), // V6_vaddhw
2692 UINT64_C(471867456), // V6_vaddhw_acc
2693 UINT64_C(480247872), // V6_vaddubh
2694 UINT64_C(473964704), // V6_vaddubh_acc
2695 UINT64_C(473956384), // V6_vaddubsat
2696 UINT64_C(476053728), // V6_vaddubsat_dv
2697 UINT64_C(513802368), // V6_vaddububb_sat
2698 UINT64_C(473956416), // V6_vadduhsat
2699 UINT64_C(478150656), // V6_vadduhsat_dv
2700 UINT64_C(480247904), // V6_vadduhw
2701 UINT64_C(473964672), // V6_vadduhw_acc
2702 UINT64_C(526385184), // V6_vadduwsat
2703 UINT64_C(513802304), // V6_vadduwsat_dv
2704 UINT64_C(473956352), // V6_vaddw
2705 UINT64_C(476053696), // V6_vaddw_dv
2706 UINT64_C(503390368), // V6_vaddwnq
2707 UINT64_C(503390272), // V6_vaddwq
2708 UINT64_C(473956480), // V6_vaddwsat
2709 UINT64_C(478150720), // V6_vaddwsat_dv
2710 UINT64_C(452984832), // V6_valignb
2711 UINT64_C(505421824), // V6_valignbi
2712 UINT64_C(471859360), // V6_vand
2713 UINT64_C(429917344), // V6_vandnqrt
2714 UINT64_C(425731168), // V6_vandnqrt_acc
2715 UINT64_C(429916320), // V6_vandqrt
2716 UINT64_C(425730144), // V6_vandqrt_acc
2717 UINT64_C(503521312), // V6_vandvnqv
2718 UINT64_C(503521280), // V6_vandvqv
2719 UINT64_C(429916232), // V6_vandvrt
2720 UINT64_C(425730176), // V6_vandvrt_acc
2721 UINT64_C(427819008), // V6_vaslh
2722 UINT64_C(429924512), // V6_vaslh_acc
2723 UINT64_C(530579616), // V6_vaslhv
2724 UINT64_C(425722080), // V6_vaslw
2725 UINT64_C(425730112), // V6_vaslw_acc
2726 UINT64_C(530579584), // V6_vaslwv
2727 UINT64_C(446701792), // V6_vasr_into
2728 UINT64_C(425722048), // V6_vasrh
2729 UINT64_C(427827424), // V6_vasrh_acc
2730 UINT64_C(452993024), // V6_vasrhbrndsat
2731 UINT64_C(402653184), // V6_vasrhbsat
2732 UINT64_C(452985056), // V6_vasrhubrndsat
2733 UINT64_C(452985024), // V6_vasrhubsat
2734 UINT64_C(530579552), // V6_vasrhv
2735 UINT64_C(402653408), // V6_vasruhubrndsat
2736 UINT64_C(402661536), // V6_vasruhubsat
2737 UINT64_C(402653216), // V6_vasruwuhrndsat
2738 UINT64_C(402661504), // V6_vasruwuhsat
2739 UINT64_C(425722016), // V6_vasrw
2740 UINT64_C(425730208), // V6_vasrw_acc
2741 UINT64_C(452984896), // V6_vasrwh
2742 UINT64_C(452984960), // V6_vasrwhrndsat
2743 UINT64_C(452984928), // V6_vasrwhsat
2744 UINT64_C(402653248), // V6_vasrwuhrndsat
2745 UINT64_C(452984992), // V6_vasrwuhsat
2746 UINT64_C(530579456), // V6_vasrwv
2747 UINT64_C(503521504), // V6_vassign
2748 UINT64_C(520102016), // V6_vavgb
2749 UINT64_C(520102048), // V6_vavgbrnd
2750 UINT64_C(482345152), // V6_vavgh
2751 UINT64_C(484442272), // V6_vavghrnd
2752 UINT64_C(482345088), // V6_vavgub
2753 UINT64_C(484442208), // V6_vavgubrnd
2754 UINT64_C(482345120), // V6_vavguh
2755 UINT64_C(484442240), // V6_vavguhrnd
2756 UINT64_C(520101952), // V6_vavguw
2757 UINT64_C(520101984), // V6_vavguwrnd
2758 UINT64_C(482345184), // V6_vavgw
2759 UINT64_C(484442304), // V6_vavgwrnd
2760 UINT64_C(442499072), // V6_vccombine
2761 UINT64_C(503447776), // V6_vcl0h
2762 UINT64_C(503447712), // V6_vcl0w
2763 UINT64_C(436207616), // V6_vcmov
2764 UINT64_C(524288224), // V6_vcombine
2765 UINT64_C(434118720), // V6_vdeal
2766 UINT64_C(503316704), // V6_vdealb
2767 UINT64_C(522191072), // V6_vdealb4w
2768 UINT64_C(503316672), // V6_vdealh
2769 UINT64_C(452993152), // V6_vdealvdd
2770 UINT64_C(522190880), // V6_vdelta
2771 UINT64_C(419430592), // V6_vdmpybus
2772 UINT64_C(419438784), // V6_vdmpybus_acc
2773 UINT64_C(419430624), // V6_vdmpybus_dv
2774 UINT64_C(419438816), // V6_vdmpybus_dv_acc
2775 UINT64_C(419430464), // V6_vdmpyhb
2776 UINT64_C(419438688), // V6_vdmpyhb_acc
2777 UINT64_C(421527680), // V6_vdmpyhb_dv
2778 UINT64_C(421535872), // V6_vdmpyhb_dv_acc
2779 UINT64_C(421527648), // V6_vdmpyhisat
2780 UINT64_C(421535808), // V6_vdmpyhisat_acc
2781 UINT64_C(421527616), // V6_vdmpyhsat
2782 UINT64_C(421535840), // V6_vdmpyhsat_acc
2783 UINT64_C(421527584), // V6_vdmpyhsuisat
2784 UINT64_C(421535776), // V6_vdmpyhsuisat_acc
2785 UINT64_C(421527552), // V6_vdmpyhsusat
2786 UINT64_C(421535744), // V6_vdmpyhsusat_acc
2787 UINT64_C(469762144), // V6_vdmpyhvsat
2788 UINT64_C(469770336), // V6_vdmpyhvsat_acc
2789 UINT64_C(419430560), // V6_vdsaduh
2790 UINT64_C(425730048), // V6_vdsaduh_acc
2791 UINT64_C(528482304), // V6_veqb
2792 UINT64_C(478158848), // V6_veqb_and
2793 UINT64_C(478158912), // V6_veqb_or
2794 UINT64_C(478158976), // V6_veqb_xor
2795 UINT64_C(528482308), // V6_veqh
2796 UINT64_C(478158852), // V6_veqh_and
2797 UINT64_C(478158916), // V6_veqh_or
2798 UINT64_C(478158980), // V6_veqh_xor
2799 UINT64_C(528482312), // V6_veqw
2800 UINT64_C(478158856), // V6_veqw_and
2801 UINT64_C(478158920), // V6_veqw_or
2802 UINT64_C(478158984), // V6_veqw_xor
2803 UINT64_C(788529408), // V6_vgathermh
2804 UINT64_C(788530432), // V6_vgathermhq
2805 UINT64_C(788529664), // V6_vgathermhw
2806 UINT64_C(788530688), // V6_vgathermhwq
2807 UINT64_C(788529152), // V6_vgathermw
2808 UINT64_C(788530176), // V6_vgathermwq
2809 UINT64_C(528482320), // V6_vgtb
2810 UINT64_C(478158864), // V6_vgtb_and
2811 UINT64_C(478158928), // V6_vgtb_or
2812 UINT64_C(478158992), // V6_vgtb_xor
2813 UINT64_C(528482324), // V6_vgth
2814 UINT64_C(478158868), // V6_vgth_and
2815 UINT64_C(478158932), // V6_vgth_or
2816 UINT64_C(478158996), // V6_vgth_xor
2817 UINT64_C(528482336), // V6_vgtub
2818 UINT64_C(478158880), // V6_vgtub_and
2819 UINT64_C(478158944), // V6_vgtub_or
2820 UINT64_C(478159008), // V6_vgtub_xor
2821 UINT64_C(528482340), // V6_vgtuh
2822 UINT64_C(478158884), // V6_vgtuh_and
2823 UINT64_C(478158948), // V6_vgtuh_or
2824 UINT64_C(478159012), // V6_vgtuh_xor
2825 UINT64_C(528482344), // V6_vgtuw
2826 UINT64_C(478158888), // V6_vgtuw_and
2827 UINT64_C(478158952), // V6_vgtuw_or
2828 UINT64_C(478159016), // V6_vgtuw_xor
2829 UINT64_C(528482328), // V6_vgtw
2830 UINT64_C(478158872), // V6_vgtw_and
2831 UINT64_C(478158936), // V6_vgtw_or
2832 UINT64_C(478159000), // V6_vgtw_xor
2833 UINT64_C(503324800), // V6_vhist
2834 UINT64_C(503455872), // V6_vhistq
2835 UINT64_C(429924384), // V6_vinsertwr
2836 UINT64_C(452984864), // V6_vlalignb
2837 UINT64_C(509616128), // V6_vlalignbi
2838 UINT64_C(427819104), // V6_vlsrb
2839 UINT64_C(427819072), // V6_vlsrh
2840 UINT64_C(530579520), // V6_vlsrhv
2841 UINT64_C(427819040), // V6_vlsrw
2842 UINT64_C(530579488), // V6_vlsrwv
2843 UINT64_C(425721984), // V6_vlut4
2844 UINT64_C(452993056), // V6_vlutvvb
2845 UINT64_C(402653280), // V6_vlutvvb_nm
2846 UINT64_C(452993184), // V6_vlutvvb_oracc
2847 UINT64_C(482353152), // V6_vlutvvb_oracci
2848 UINT64_C(505413632), // V6_vlutvvbi
2849 UINT64_C(452993216), // V6_vlutvwh
2850 UINT64_C(402653312), // V6_vlutvwh_nm
2851 UINT64_C(452993248), // V6_vlutvwh_oracc
2852 UINT64_C(484450304), // V6_vlutvwh_oracci
2853 UINT64_C(509607936), // V6_vlutvwhi
2854 UINT64_C(522191008), // V6_vmaxb
2855 UINT64_C(520093920), // V6_vmaxh
2856 UINT64_C(520093856), // V6_vmaxub
2857 UINT64_C(520093888), // V6_vmaxuh
2858 UINT64_C(522190848), // V6_vmaxw
2859 UINT64_C(522190976), // V6_vminb
2860 UINT64_C(520093792), // V6_vminh
2861 UINT64_C(520093728), // V6_vminub
2862 UINT64_C(520093760), // V6_vminuh
2863 UINT64_C(520093824), // V6_vminw
2864 UINT64_C(421527744), // V6_vmpabus
2865 UINT64_C(421535936), // V6_vmpabus_acc
2866 UINT64_C(471859296), // V6_vmpabusv
2867 UINT64_C(425721952), // V6_vmpabuu
2868 UINT64_C(429924480), // V6_vmpabuu_acc
2869 UINT64_C(484442336), // V6_vmpabuuv
2870 UINT64_C(421527776), // V6_vmpahb
2871 UINT64_C(421535968), // V6_vmpahb_acc
2872 UINT64_C(427827328), // V6_vmpahhsat
2873 UINT64_C(427819168), // V6_vmpauhb
2874 UINT64_C(427827264), // V6_vmpauhb_acc
2875 UINT64_C(427827360), // V6_vmpauhuhsat
2876 UINT64_C(427827392), // V6_vmpsuhuhsat
2877 UINT64_C(421527712), // V6_vmpybus
2878 UINT64_C(421535904), // V6_vmpybus_acc
2879 UINT64_C(469762240), // V6_vmpybusv
2880 UINT64_C(469770432), // V6_vmpybusv_acc
2881 UINT64_C(469762176), // V6_vmpybv
2882 UINT64_C(469770368), // V6_vmpybv_acc
2883 UINT64_C(534773920), // V6_vmpyewuh
2884 UINT64_C(513802432), // V6_vmpyewuh_64
2885 UINT64_C(423624704), // V6_vmpyh
2886 UINT64_C(429924544), // V6_vmpyh_acc
2887 UINT64_C(423632896), // V6_vmpyhsat_acc
2888 UINT64_C(423624768), // V6_vmpyhsrs
2889 UINT64_C(423624736), // V6_vmpyhss
2890 UINT64_C(471859264), // V6_vmpyhus
2891 UINT64_C(471867424), // V6_vmpyhus_acc
2892 UINT64_C(469762272), // V6_vmpyhv
2893 UINT64_C(469770464), // V6_vmpyhv_acc
2894 UINT64_C(471859232), // V6_vmpyhvsrs
2895 UINT64_C(526385152), // V6_vmpyieoh
2896 UINT64_C(473964544), // V6_vmpyiewh_acc
2897 UINT64_C(532676608), // V6_vmpyiewuh
2898 UINT64_C(471867552), // V6_vmpyiewuh_acc
2899 UINT64_C(471859328), // V6_vmpyih
2900 UINT64_C(471867520), // V6_vmpyih_acc
2901 UINT64_C(425721856), // V6_vmpyihb
2902 UINT64_C(425730080), // V6_vmpyihb_acc
2903 UINT64_C(532676640), // V6_vmpyiowh
2904 UINT64_C(429916160), // V6_vmpyiwb
2905 UINT64_C(423632960), // V6_vmpyiwb_acc
2906 UINT64_C(427819232), // V6_vmpyiwh
2907 UINT64_C(423632992), // V6_vmpyiwh_acc
2908 UINT64_C(427819200), // V6_vmpyiwub
2909 UINT64_C(427827232), // V6_vmpyiwub_acc
2910 UINT64_C(534773984), // V6_vmpyowh
2911 UINT64_C(471867488), // V6_vmpyowh_64_acc
2912 UINT64_C(524288000), // V6_vmpyowh_rnd
2913 UINT64_C(471867616), // V6_vmpyowh_rnd_sacc
2914 UINT64_C(471867584), // V6_vmpyowh_sacc
2915 UINT64_C(432013312), // V6_vmpyub
2916 UINT64_C(427827200), // V6_vmpyub_acc
2917 UINT64_C(469762208), // V6_vmpyubv
2918 UINT64_C(469770400), // V6_vmpyubv_acc
2919 UINT64_C(423624800), // V6_vmpyuh
2920 UINT64_C(423632928), // V6_vmpyuh_acc
2921 UINT64_C(425721920), // V6_vmpyuhe
2922 UINT64_C(427827296), // V6_vmpyuhe_acc
2923 UINT64_C(471859200), // V6_vmpyuhv
2924 UINT64_C(471867392), // V6_vmpyuhv_acc
2925 UINT64_C(518004736), // V6_vmux
2926 UINT64_C(520102080), // V6_vnavgb
2927 UINT64_C(484442144), // V6_vnavgh
2928 UINT64_C(484442112), // V6_vnavgub
2929 UINT64_C(484442176), // V6_vnavgw
2930 UINT64_C(440401920), // V6_vnccombine
2931 UINT64_C(438304768), // V6_vncmov
2932 UINT64_C(503513248), // V6_vnormamth
2933 UINT64_C(503513216), // V6_vnormamtw
2934 UINT64_C(503316608), // V6_vnot
2935 UINT64_C(471859392), // V6_vor
2936 UINT64_C(532676672), // V6_vpackeb
2937 UINT64_C(532676704), // V6_vpackeh
2938 UINT64_C(532676800), // V6_vpackhb_sat
2939 UINT64_C(532676768), // V6_vpackhub_sat
2940 UINT64_C(534773792), // V6_vpackob
2941 UINT64_C(534773824), // V6_vpackoh
2942 UINT64_C(534773760), // V6_vpackwh_sat
2943 UINT64_C(532676832), // V6_vpackwuh_sat
2944 UINT64_C(503447744), // V6_vpopcounth
2945 UINT64_C(503521344), // V6_vprefixqb
2946 UINT64_C(503521600), // V6_vprefixqh
2947 UINT64_C(503521856), // V6_vprefixqw
2948 UINT64_C(522190944), // V6_vrdelta
2949 UINT64_C(432013472), // V6_vrmpybub_rtt
2950 UINT64_C(429924352), // V6_vrmpybub_rtt_acc
2951 UINT64_C(419430528), // V6_vrmpybus
2952 UINT64_C(419438752), // V6_vrmpybus_acc
2953 UINT64_C(423624832), // V6_vrmpybusi
2954 UINT64_C(423633024), // V6_vrmpybusi_acc
2955 UINT64_C(469762112), // V6_vrmpybusv
2956 UINT64_C(469770304), // V6_vrmpybusv_acc
2957 UINT64_C(469762080), // V6_vrmpybv
2958 UINT64_C(469770272), // V6_vrmpybv_acc
2959 UINT64_C(419430496), // V6_vrmpyub
2960 UINT64_C(419438720), // V6_vrmpyub_acc
2961 UINT64_C(432013440), // V6_vrmpyub_rtt
2962 UINT64_C(429924576), // V6_vrmpyub_rtt_acc
2963 UINT64_C(429916352), // V6_vrmpyubi
2964 UINT64_C(425730240), // V6_vrmpyubi_acc
2965 UINT64_C(469762048), // V6_vrmpyubv
2966 UINT64_C(469770240), // V6_vrmpyubv_acc
2967 UINT64_C(434634752), // V6_vrmpyzbb_rt
2968 UINT64_C(432021568), // V6_vrmpyzbb_rt_acc
2969 UINT64_C(434110464), // V6_vrmpyzbb_rx
2970 UINT64_C(432545856), // V6_vrmpyzbb_rx_acc
2971 UINT64_C(435683392), // V6_vrmpyzbub_rt
2972 UINT64_C(433070112), // V6_vrmpyzbub_rt_acc
2973 UINT64_C(435159104), // V6_vrmpyzbub_rx
2974 UINT64_C(433594400), // V6_vrmpyzbub_rx_acc
2975 UINT64_C(434634784), // V6_vrmpyzcb_rt
2976 UINT64_C(432021600), // V6_vrmpyzcb_rt_acc
2977 UINT64_C(434110496), // V6_vrmpyzcb_rx
2978 UINT64_C(432545888), // V6_vrmpyzcb_rx_acc
2979 UINT64_C(434634816), // V6_vrmpyzcbs_rt
2980 UINT64_C(432021536), // V6_vrmpyzcbs_rt_acc
2981 UINT64_C(434110528), // V6_vrmpyzcbs_rx
2982 UINT64_C(432545824), // V6_vrmpyzcbs_rx_acc
2983 UINT64_C(435683328), // V6_vrmpyznb_rt
2984 UINT64_C(433070144), // V6_vrmpyznb_rt_acc
2985 UINT64_C(435159040), // V6_vrmpyznb_rx
2986 UINT64_C(433594432), // V6_vrmpyznb_rx_acc
2987 UINT64_C(425721888), // V6_vror
2988 UINT64_C(444604640), // V6_vrotr
2989 UINT64_C(526385344), // V6_vroundhb
2990 UINT64_C(526385376), // V6_vroundhub
2991 UINT64_C(534773856), // V6_vrounduhub
2992 UINT64_C(534773888), // V6_vrounduwuh
2993 UINT64_C(526385280), // V6_vroundwh
2994 UINT64_C(526385312), // V6_vroundwuh
2995 UINT64_C(423624896), // V6_vrsadubi
2996 UINT64_C(423633088), // V6_vrsadubi_acc
2997 UINT64_C(494936288), // V6_vsatdw
2998 UINT64_C(526385216), // V6_vsathub
2999 UINT64_C(522191040), // V6_vsatuwuh
3000 UINT64_C(526385248), // V6_vsatwh
3001 UINT64_C(503447648), // V6_vsb
3002 UINT64_C(790626336), // V6_vscattermh
3003 UINT64_C(790626464), // V6_vscattermh_add
3004 UINT64_C(796917888), // V6_vscattermhq
3005 UINT64_C(790626368), // V6_vscattermhw
3006 UINT64_C(790626496), // V6_vscattermhw_add
3007 UINT64_C(799014912), // V6_vscattermhwq
3008 UINT64_C(790626304), // V6_vscattermw
3009 UINT64_C(790626432), // V6_vscattermw_add
3010 UINT64_C(796917760), // V6_vscattermwq
3011 UINT64_C(503447680), // V6_vsh
3012 UINT64_C(524288096), // V6_vshufeh
3013 UINT64_C(434118688), // V6_vshuff
3014 UINT64_C(503447552), // V6_vshuffb
3015 UINT64_C(524288032), // V6_vshuffeb
3016 UINT64_C(503382240), // V6_vshuffh
3017 UINT64_C(524288064), // V6_vshuffob
3018 UINT64_C(452993120), // V6_vshuffvdd
3019 UINT64_C(524288192), // V6_vshufoeb
3020 UINT64_C(524288160), // V6_vshufoeh
3021 UINT64_C(524288128), // V6_vshufoh
3022 UINT64_C(473956512), // V6_vsubb
3023 UINT64_C(478150752), // V6_vsubb_dv
3024 UINT64_C(503455776), // V6_vsubbnq
3025 UINT64_C(503390400), // V6_vsubbq
3026 UINT64_C(522190912), // V6_vsubbsat
3027 UINT64_C(513802272), // V6_vsubbsat_dv
3028 UINT64_C(480256128), // V6_vsubcarry
3029 UINT64_C(497033344), // V6_vsubcarryo
3030 UINT64_C(473956544), // V6_vsubh
3031 UINT64_C(478150784), // V6_vsubh_dv
3032 UINT64_C(503455808), // V6_vsubhnq
3033 UINT64_C(503390432), // V6_vsubhq
3034 UINT64_C(476053568), // V6_vsubhsat
3035 UINT64_C(480247808), // V6_vsubhsat_dv
3036 UINT64_C(480248032), // V6_vsubhw
3037 UINT64_C(480247968), // V6_vsububh
3038 UINT64_C(476053504), // V6_vsububsat
3039 UINT64_C(478150848), // V6_vsububsat_dv
3040 UINT64_C(513802400), // V6_vsubububb_sat
3041 UINT64_C(476053536), // V6_vsubuhsat
3042 UINT64_C(478150880), // V6_vsubuhsat_dv
3043 UINT64_C(480248000), // V6_vsubuhw
3044 UINT64_C(532676736), // V6_vsubuwsat
3045 UINT64_C(513802336), // V6_vsubuwsat_dv
3046 UINT64_C(473956576), // V6_vsubw
3047 UINT64_C(478150816), // V6_vsubw_dv
3048 UINT64_C(503455840), // V6_vsubwnq
3049 UINT64_C(503455744), // V6_vsubwq
3050 UINT64_C(476053600), // V6_vsubwsat
3051 UINT64_C(480247840), // V6_vsubwsat_dv
3052 UINT64_C(513810432), // V6_vswap
3053 UINT64_C(419430400), // V6_vtmpyb
3054 UINT64_C(419438592), // V6_vtmpyb_acc
3055 UINT64_C(419430432), // V6_vtmpybus
3056 UINT64_C(419438624), // V6_vtmpybus_acc
3057 UINT64_C(429916288), // V6_vtmpyhb
3058 UINT64_C(419438656), // V6_vtmpyhb_acc
3059 UINT64_C(503382080), // V6_vunpackb
3060 UINT64_C(503382112), // V6_vunpackh
3061 UINT64_C(503324672), // V6_vunpackob
3062 UINT64_C(503324704), // V6_vunpackoh
3063 UINT64_C(503382016), // V6_vunpackub
3064 UINT64_C(503382048), // V6_vunpackuh
3065 UINT64_C(503325824), // V6_vwhist128
3066 UINT64_C(503326336), // V6_vwhist128m
3067 UINT64_C(503456896), // V6_vwhist128q
3068 UINT64_C(503457408), // V6_vwhist128qm
3069 UINT64_C(503325312), // V6_vwhist256
3070 UINT64_C(503325568), // V6_vwhist256_sat
3071 UINT64_C(503456384), // V6_vwhist256q
3072 UINT64_C(503456640), // V6_vwhist256q_sat
3073 UINT64_C(471859424), // V6_vxor
3074 UINT64_C(503447584), // V6_vzb
3075 UINT64_C(503447616), // V6_vzh
3076 UINT64_C(738197504), // V6_zLd_ai
3077 UINT64_C(754974720), // V6_zLd_pi
3078 UINT64_C(754974721), // V6_zLd_ppu
3079 UINT64_C(746586112), // V6_zLd_pred_ai
3080 UINT64_C(763363328), // V6_zLd_pred_pi
3081 UINT64_C(763363329), // V6_zLd_pred_ppu
3082 UINT64_C(429916448), // V6_zextract
3083 UINT64_C(2818572288), // Y2_barrier
3084 UINT64_C(1814036480), // Y2_break
3085 UINT64_C(2684354560), // Y2_dccleana
3086 UINT64_C(2688548864), // Y2_dccleaninva
3087 UINT64_C(2483027968), // Y2_dcfetchbo
3088 UINT64_C(2686451712), // Y2_dcinva
3089 UINT64_C(2696937472), // Y2_dczeroa
3090 UINT64_C(1455423488), // Y2_icinva
3091 UINT64_C(1472200706), // Y2_isync
3092 UINT64_C(2822766592), // Y2_syncht
3093 UINT64_C(1681915904), // Y2_wait
3094 UINT64_C(2785017856), // Y4_l2fetch
3095 UINT64_C(1648361472), // Y4_trace
3096 UINT64_C(2793406464), // Y5_l2fetch
3097 UINT64_C(1648361504), // Y6_diag
3098 UINT64_C(1648361536), // Y6_diag0
3099 UINT64_C(1648361568), // Y6_diag1
3100 UINT64_C(3581935616), // dep_A2_addsat
3101 UINT64_C(3581935744), // dep_A2_subsat
3102 UINT64_C(3556769792), // dep_S2_packhl
3103 UINT64_C(0), // invalid_decode
3104 UINT64_C(0)
3105 };
3106 const unsigned opcode = MI.getOpcode();
3107 uint64_t Value = InstBits[opcode];
3108 uint64_t op = 0;
3109 (void)op; // suppress warning
3110 switch (opcode) {
3111 case Hexagon::A2_nop:
3112 case Hexagon::CONST32:
3113 case Hexagon::CONST64:
3114 case Hexagon::DuplexIClass0:
3115 case Hexagon::DuplexIClass1:
3116 case Hexagon::DuplexIClass2:
3117 case Hexagon::DuplexIClass3:
3118 case Hexagon::DuplexIClass4:
3119 case Hexagon::DuplexIClass5:
3120 case Hexagon::DuplexIClass6:
3121 case Hexagon::DuplexIClass7:
3122 case Hexagon::DuplexIClass8:
3123 case Hexagon::DuplexIClass9:
3124 case Hexagon::DuplexIClassA:
3125 case Hexagon::DuplexIClassB:
3126 case Hexagon::DuplexIClassC:
3127 case Hexagon::DuplexIClassD:
3128 case Hexagon::DuplexIClassE:
3129 case Hexagon::DuplexIClassF:
3130 case Hexagon::SL2_deallocframe:
3131 case Hexagon::SL2_jumpr31:
3132 case Hexagon::SL2_jumpr31_f:
3133 case Hexagon::SL2_jumpr31_fnew:
3134 case Hexagon::SL2_jumpr31_t:
3135 case Hexagon::SL2_jumpr31_tnew:
3136 case Hexagon::SL2_return:
3137 case Hexagon::SL2_return_f:
3138 case Hexagon::SL2_return_fnew:
3139 case Hexagon::SL2_return_t:
3140 case Hexagon::SL2_return_tnew:
3141 case Hexagon::TFRI64_V2_ext:
3142 case Hexagon::TFRI64_V4:
3143 case Hexagon::V6_vhist:
3144 case Hexagon::V6_vwhist128:
3145 case Hexagon::V6_vwhist256:
3146 case Hexagon::V6_vwhist256_sat:
3147 case Hexagon::Y2_barrier:
3148 case Hexagon::Y2_break:
3149 case Hexagon::Y2_isync:
3150 case Hexagon::Y2_syncht:
3151 case Hexagon::invalid_decode: {
3152 break;
3153 }
3154 case Hexagon::A2_tfrcrr: {
3155 // op: Cs32
3156 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3157 op &= UINT64_C(31);
3158 op <<= 16;
3159 Value |= op;
3160 // op: Rd32
3161 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3162 op &= UINT64_C(31);
3163 Value |= op;
3164 break;
3165 }
3166 case Hexagon::A4_tfrcpp: {
3167 // op: Css32
3168 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3169 op &= UINT64_C(31);
3170 op <<= 16;
3171 Value |= op;
3172 // op: Rdd32
3173 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3174 op &= UINT64_C(31);
3175 Value |= op;
3176 break;
3177 }
3178 case Hexagon::G4_tfrgcrr: {
3179 // op: Gs32
3180 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3181 op &= UINT64_C(31);
3182 op <<= 16;
3183 Value |= op;
3184 // op: Rd32
3185 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3186 op &= UINT64_C(31);
3187 Value |= op;
3188 break;
3189 }
3190 case Hexagon::G4_tfrgcpp: {
3191 // op: Gss32
3192 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3193 op &= UINT64_C(31);
3194 op <<= 16;
3195 Value |= op;
3196 // op: Rdd32
3197 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3198 op &= UINT64_C(31);
3199 Value |= op;
3200 break;
3201 }
3202 case Hexagon::J4_cmpeqi_f_jumpnv_nt:
3203 case Hexagon::J4_cmpeqi_f_jumpnv_t:
3204 case Hexagon::J4_cmpeqi_t_jumpnv_nt:
3205 case Hexagon::J4_cmpeqi_t_jumpnv_t:
3206 case Hexagon::J4_cmpgti_f_jumpnv_nt:
3207 case Hexagon::J4_cmpgti_f_jumpnv_t:
3208 case Hexagon::J4_cmpgti_t_jumpnv_nt:
3209 case Hexagon::J4_cmpgti_t_jumpnv_t:
3210 case Hexagon::J4_cmpgtui_f_jumpnv_nt:
3211 case Hexagon::J4_cmpgtui_f_jumpnv_t:
3212 case Hexagon::J4_cmpgtui_t_jumpnv_nt:
3213 case Hexagon::J4_cmpgtui_t_jumpnv_t: {
3214 // op: II
3215 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3216 op &= UINT64_C(31);
3217 op <<= 8;
3218 Value |= op;
3219 // op: Ii
3220 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3221 Value |= (op & UINT64_C(1536)) << 11;
3222 Value |= (op & UINT64_C(508)) >> 1;
3223 // op: Ns8
3224 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3225 op &= UINT64_C(7);
3226 op <<= 16;
3227 Value |= op;
3228 break;
3229 }
3230 case Hexagon::J4_cmpeqi_fp0_jump_nt:
3231 case Hexagon::J4_cmpeqi_fp0_jump_t:
3232 case Hexagon::J4_cmpeqi_fp1_jump_nt:
3233 case Hexagon::J4_cmpeqi_fp1_jump_t:
3234 case Hexagon::J4_cmpeqi_tp0_jump_nt:
3235 case Hexagon::J4_cmpeqi_tp0_jump_t:
3236 case Hexagon::J4_cmpeqi_tp1_jump_nt:
3237 case Hexagon::J4_cmpeqi_tp1_jump_t:
3238 case Hexagon::J4_cmpgti_fp0_jump_nt:
3239 case Hexagon::J4_cmpgti_fp0_jump_t:
3240 case Hexagon::J4_cmpgti_fp1_jump_nt:
3241 case Hexagon::J4_cmpgti_fp1_jump_t:
3242 case Hexagon::J4_cmpgti_tp0_jump_nt:
3243 case Hexagon::J4_cmpgti_tp0_jump_t:
3244 case Hexagon::J4_cmpgti_tp1_jump_nt:
3245 case Hexagon::J4_cmpgti_tp1_jump_t:
3246 case Hexagon::J4_cmpgtui_fp0_jump_nt:
3247 case Hexagon::J4_cmpgtui_fp0_jump_t:
3248 case Hexagon::J4_cmpgtui_fp1_jump_nt:
3249 case Hexagon::J4_cmpgtui_fp1_jump_t:
3250 case Hexagon::J4_cmpgtui_tp0_jump_nt:
3251 case Hexagon::J4_cmpgtui_tp0_jump_t:
3252 case Hexagon::J4_cmpgtui_tp1_jump_nt:
3253 case Hexagon::J4_cmpgtui_tp1_jump_t: {
3254 // op: II
3255 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3256 op &= UINT64_C(31);
3257 op <<= 8;
3258 Value |= op;
3259 // op: Ii
3260 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3261 Value |= (op & UINT64_C(1536)) << 11;
3262 Value |= (op & UINT64_C(508)) >> 1;
3263 // op: Rs16
3264 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3265 op &= UINT64_C(15);
3266 op <<= 16;
3267 Value |= op;
3268 break;
3269 }
3270 case Hexagon::S4_storerbnew_ap:
3271 case Hexagon::S4_storerhnew_ap:
3272 case Hexagon::S4_storerinew_ap: {
3273 // op: II
3274 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3275 op &= UINT64_C(63);
3276 Value |= op;
3277 // op: Nt8
3278 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3279 op &= UINT64_C(7);
3280 op <<= 8;
3281 Value |= op;
3282 // op: Re32
3283 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3284 op &= UINT64_C(31);
3285 op <<= 16;
3286 Value |= op;
3287 break;
3288 }
3289 case Hexagon::S4_storerb_ap:
3290 case Hexagon::S4_storerf_ap:
3291 case Hexagon::S4_storerh_ap:
3292 case Hexagon::S4_storeri_ap: {
3293 // op: II
3294 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3295 op &= UINT64_C(63);
3296 Value |= op;
3297 // op: Rt32
3298 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3299 op &= UINT64_C(31);
3300 op <<= 8;
3301 Value |= op;
3302 // op: Re32
3303 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3304 op &= UINT64_C(31);
3305 op <<= 16;
3306 Value |= op;
3307 break;
3308 }
3309 case Hexagon::S4_storerd_ap: {
3310 // op: II
3311 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3312 op &= UINT64_C(63);
3313 Value |= op;
3314 // op: Rtt32
3315 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3316 op &= UINT64_C(31);
3317 op <<= 8;
3318 Value |= op;
3319 // op: Re32
3320 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3321 op &= UINT64_C(31);
3322 op <<= 16;
3323 Value |= op;
3324 break;
3325 }
3326 case Hexagon::J4_jumpseti: {
3327 // op: II
3328 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3329 op &= UINT64_C(63);
3330 op <<= 8;
3331 Value |= op;
3332 // op: Ii
3333 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3334 Value |= (op & UINT64_C(1536)) << 11;
3335 Value |= (op & UINT64_C(508)) >> 1;
3336 // op: Rd16
3337 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3338 op &= UINT64_C(15);
3339 op <<= 16;
3340 Value |= op;
3341 break;
3342 }
3343 case Hexagon::L4_loadbsw2_ap:
3344 case Hexagon::L4_loadbzw2_ap:
3345 case Hexagon::L4_loadrb_ap:
3346 case Hexagon::L4_loadrh_ap:
3347 case Hexagon::L4_loadri_ap:
3348 case Hexagon::L4_loadrub_ap:
3349 case Hexagon::L4_loadruh_ap: {
3350 // op: II
3351 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3352 Value |= (op & UINT64_C(60)) << 6;
3353 Value |= (op & UINT64_C(3)) << 5;
3354 // op: Rd32
3355 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3356 op &= UINT64_C(31);
3357 Value |= op;
3358 // op: Re32
3359 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3360 op &= UINT64_C(31);
3361 op <<= 16;
3362 Value |= op;
3363 break;
3364 }
3365 case Hexagon::L4_loadbsw4_ap:
3366 case Hexagon::L4_loadbzw4_ap:
3367 case Hexagon::L4_loadrd_ap: {
3368 // op: II
3369 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3370 Value |= (op & UINT64_C(60)) << 6;
3371 Value |= (op & UINT64_C(3)) << 5;
3372 // op: Rdd32
3373 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3374 op &= UINT64_C(31);
3375 Value |= op;
3376 // op: Re32
3377 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3378 op &= UINT64_C(31);
3379 op <<= 16;
3380 Value |= op;
3381 break;
3382 }
3383 case Hexagon::L4_loadalignb_ap:
3384 case Hexagon::L4_loadalignh_ap: {
3385 // op: II
3386 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3387 Value |= (op & UINT64_C(60)) << 6;
3388 Value |= (op & UINT64_C(3)) << 5;
3389 // op: Ryy32
3390 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3391 op &= UINT64_C(31);
3392 Value |= op;
3393 // op: Re32
3394 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3395 op &= UINT64_C(31);
3396 op <<= 16;
3397 Value |= op;
3398 break;
3399 }
3400 case Hexagon::J2_call:
3401 case Hexagon::J2_jump: {
3402 // op: Ii
3403 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3404 Value |= (op & UINT64_C(16744448)) << 1;
3405 Value |= (op & UINT64_C(32764)) >> 1;
3406 break;
3407 }
3408 case Hexagon::PS_storerinewabs:
3409 case Hexagon::S2_storerinewgp: {
3410 // op: Ii
3411 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3412 Value |= (op & UINT64_C(196608)) << 9;
3413 Value |= (op & UINT64_C(63488)) << 5;
3414 Value |= (op & UINT64_C(1024)) << 3;
3415 Value |= (op & UINT64_C(1020)) >> 2;
3416 // op: Nt8
3417 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3418 op &= UINT64_C(7);
3419 op <<= 8;
3420 Value |= op;
3421 break;
3422 }
3423 case Hexagon::PS_storeriabs:
3424 case Hexagon::S2_storerigp: {
3425 // op: Ii
3426 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3427 Value |= (op & UINT64_C(196608)) << 9;
3428 Value |= (op & UINT64_C(63488)) << 5;
3429 Value |= (op & UINT64_C(1024)) << 3;
3430 Value |= (op & UINT64_C(1020)) >> 2;
3431 // op: Rt32
3432 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3433 op &= UINT64_C(31);
3434 op <<= 8;
3435 Value |= op;
3436 break;
3437 }
3438 case Hexagon::J2_pause:
3439 case Hexagon::J2_trap0:
3440 case Hexagon::PS_trap1: {
3441 // op: Ii
3442 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3443 Value |= (op & UINT64_C(248)) << 5;
3444 Value |= (op & UINT64_C(7)) << 2;
3445 break;
3446 }
3447 case Hexagon::PS_storerdabs:
3448 case Hexagon::S2_storerdgp: {
3449 // op: Ii
3450 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3451 Value |= (op & UINT64_C(393216)) << 8;
3452 Value |= (op & UINT64_C(126976)) << 4;
3453 Value |= (op & UINT64_C(2048)) << 2;
3454 Value |= (op & UINT64_C(2040)) >> 3;
3455 // op: Rtt32
3456 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3457 op &= UINT64_C(31);
3458 op <<= 8;
3459 Value |= op;
3460 break;
3461 }
3462 case Hexagon::A4_ext: {
3463 // op: Ii
3464 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3465 Value |= (op & UINT64_C(4293918720)) >> 4;
3466 Value |= (op & UINT64_C(1048512)) >> 6;
3467 break;
3468 }
3469 case Hexagon::PS_storerbnewabs:
3470 case Hexagon::S2_storerbnewgp: {
3471 // op: Ii
3472 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3473 Value |= (op & UINT64_C(49152)) << 11;
3474 Value |= (op & UINT64_C(15872)) << 7;
3475 Value |= (op & UINT64_C(256)) << 5;
3476 Value |= (op & UINT64_C(255));
3477 // op: Nt8
3478 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3479 op &= UINT64_C(7);
3480 op <<= 8;
3481 Value |= op;
3482 break;
3483 }
3484 case Hexagon::PS_storerbabs:
3485 case Hexagon::S2_storerbgp: {
3486 // op: Ii
3487 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3488 Value |= (op & UINT64_C(49152)) << 11;
3489 Value |= (op & UINT64_C(15872)) << 7;
3490 Value |= (op & UINT64_C(256)) << 5;
3491 Value |= (op & UINT64_C(255));
3492 // op: Rt32
3493 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3494 op &= UINT64_C(31);
3495 op <<= 8;
3496 Value |= op;
3497 break;
3498 }
3499 case Hexagon::J2_loop0i:
3500 case Hexagon::J2_loop1i:
3501 case Hexagon::J2_ploop1si:
3502 case Hexagon::J2_ploop2si:
3503 case Hexagon::J2_ploop3si: {
3504 // op: Ii
3505 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3506 Value |= (op & UINT64_C(496)) << 4;
3507 Value |= (op & UINT64_C(12)) << 1;
3508 // op: II
3509 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3510 Value |= (op & UINT64_C(992)) << 11;
3511 Value |= (op & UINT64_C(28)) << 3;
3512 Value |= (op & UINT64_C(3));
3513 break;
3514 }
3515 case Hexagon::J2_loop0r:
3516 case Hexagon::J2_loop1r:
3517 case Hexagon::J2_ploop1sr:
3518 case Hexagon::J2_ploop2sr:
3519 case Hexagon::J2_ploop3sr: {
3520 // op: Ii
3521 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3522 Value |= (op & UINT64_C(496)) << 4;
3523 Value |= (op & UINT64_C(12)) << 1;
3524 // op: Rs32
3525 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3526 op &= UINT64_C(31);
3527 op <<= 16;
3528 Value |= op;
3529 break;
3530 }
3531 case Hexagon::PS_storerhnewabs:
3532 case Hexagon::S2_storerhnewgp: {
3533 // op: Ii
3534 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3535 Value |= (op & UINT64_C(98304)) << 10;
3536 Value |= (op & UINT64_C(31744)) << 6;
3537 Value |= (op & UINT64_C(512)) << 4;
3538 Value |= (op & UINT64_C(510)) >> 1;
3539 // op: Nt8
3540 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3541 op &= UINT64_C(7);
3542 op <<= 8;
3543 Value |= op;
3544 break;
3545 }
3546 case Hexagon::PS_storerfabs:
3547 case Hexagon::PS_storerhabs:
3548 case Hexagon::S2_storerfgp:
3549 case Hexagon::S2_storerhgp: {
3550 // op: Ii
3551 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3552 Value |= (op & UINT64_C(98304)) << 10;
3553 Value |= (op & UINT64_C(31744)) << 6;
3554 Value |= (op & UINT64_C(512)) << 4;
3555 Value |= (op & UINT64_C(510)) >> 1;
3556 // op: Rt32
3557 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3558 op &= UINT64_C(31);
3559 op <<= 8;
3560 Value |= op;
3561 break;
3562 }
3563 case Hexagon::V6_vwhist128m: {
3564 // op: Ii
3565 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3566 op &= UINT64_C(1);
3567 op <<= 8;
3568 Value |= op;
3569 break;
3570 }
3571 case Hexagon::SS2_storew_sp: {
3572 // op: Ii
3573 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3574 op &= UINT64_C(124);
3575 op <<= 2;
3576 Value |= op;
3577 // op: Rt16
3578 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3579 op &= UINT64_C(15);
3580 Value |= op;
3581 break;
3582 }
3583 case Hexagon::SS2_allocframe: {
3584 // op: Ii
3585 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3586 op &= UINT64_C(248);
3587 op <<= 1;
3588 Value |= op;
3589 break;
3590 }
3591 case Hexagon::SS2_stored_sp: {
3592 // op: Ii
3593 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3594 op &= UINT64_C(504);
3595 Value |= op;
3596 // op: Rtt8
3597 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3598 op &= UINT64_C(7);
3599 Value |= op;
3600 break;
3601 }
3602 case Hexagon::S2_storerd_io: {
3603 // op: Ii
3604 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3605 Value |= (op & UINT64_C(12288)) << 13;
3606 Value |= (op & UINT64_C(2048)) << 2;
3607 Value |= (op & UINT64_C(2040)) >> 3;
3608 // op: Rs32
3609 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3610 op &= UINT64_C(31);
3611 op <<= 16;
3612 Value |= op;
3613 // op: Rtt32
3614 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3615 op &= UINT64_C(31);
3616 op <<= 8;
3617 Value |= op;
3618 break;
3619 }
3620 case Hexagon::J4_tstbit0_f_jumpnv_nt:
3621 case Hexagon::J4_tstbit0_f_jumpnv_t:
3622 case Hexagon::J4_tstbit0_t_jumpnv_nt:
3623 case Hexagon::J4_tstbit0_t_jumpnv_t: {
3624 // op: Ii
3625 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3626 Value |= (op & UINT64_C(1536)) << 11;
3627 Value |= (op & UINT64_C(508)) >> 1;
3628 // op: Ns8
3629 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3630 op &= UINT64_C(7);
3631 op <<= 16;
3632 Value |= op;
3633 break;
3634 }
3635 case Hexagon::J4_tstbit0_fp0_jump_nt:
3636 case Hexagon::J4_tstbit0_fp0_jump_t:
3637 case Hexagon::J4_tstbit0_fp1_jump_nt:
3638 case Hexagon::J4_tstbit0_fp1_jump_t:
3639 case Hexagon::J4_tstbit0_tp0_jump_nt:
3640 case Hexagon::J4_tstbit0_tp0_jump_t:
3641 case Hexagon::J4_tstbit0_tp1_jump_nt:
3642 case Hexagon::J4_tstbit0_tp1_jump_t: {
3643 // op: Ii
3644 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3645 Value |= (op & UINT64_C(1536)) << 11;
3646 Value |= (op & UINT64_C(508)) >> 1;
3647 // op: Rs16
3648 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3649 op &= UINT64_C(15);
3650 op <<= 16;
3651 Value |= op;
3652 break;
3653 }
3654 case Hexagon::S2_storerbnew_io: {
3655 // op: Ii
3656 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3657 Value |= (op & UINT64_C(1536)) << 16;
3658 Value |= (op & UINT64_C(256)) << 5;
3659 Value |= (op & UINT64_C(255));
3660 // op: Rs32
3661 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3662 op &= UINT64_C(31);
3663 op <<= 16;
3664 Value |= op;
3665 // op: Nt8
3666 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3667 op &= UINT64_C(7);
3668 op <<= 8;
3669 Value |= op;
3670 break;
3671 }
3672 case Hexagon::S2_storerb_io: {
3673 // op: Ii
3674 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3675 Value |= (op & UINT64_C(1536)) << 16;
3676 Value |= (op & UINT64_C(256)) << 5;
3677 Value |= (op & UINT64_C(255));
3678 // op: Rs32
3679 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3680 op &= UINT64_C(31);
3681 op <<= 16;
3682 Value |= op;
3683 // op: Rt32
3684 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3685 op &= UINT64_C(31);
3686 op <<= 8;
3687 Value |= op;
3688 break;
3689 }
3690 case Hexagon::J2_jumprgtez:
3691 case Hexagon::J2_jumprgtezpt:
3692 case Hexagon::J2_jumprltez:
3693 case Hexagon::J2_jumprltezpt:
3694 case Hexagon::J2_jumprnz:
3695 case Hexagon::J2_jumprnzpt:
3696 case Hexagon::J2_jumprz:
3697 case Hexagon::J2_jumprzpt: {
3698 // op: Ii
3699 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3700 Value |= (op & UINT64_C(16384)) << 7;
3701 Value |= (op & UINT64_C(8192));
3702 Value |= (op & UINT64_C(8188)) >> 1;
3703 // op: Rs32
3704 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3705 op &= UINT64_C(31);
3706 op <<= 16;
3707 Value |= op;
3708 break;
3709 }
3710 case Hexagon::L2_loadrigp:
3711 case Hexagon::PS_loadriabs: {
3712 // op: Ii
3713 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3714 Value |= (op & UINT64_C(196608)) << 9;
3715 Value |= (op & UINT64_C(63488)) << 5;
3716 Value |= (op & UINT64_C(2044)) << 3;
3717 // op: Rd32
3718 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3719 op &= UINT64_C(31);
3720 Value |= op;
3721 break;
3722 }
3723 case Hexagon::S4_storerbnew_ur:
3724 case Hexagon::S4_storerhnew_ur:
3725 case Hexagon::S4_storerinew_ur: {
3726 // op: Ii
3727 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3728 Value |= (op & UINT64_C(2)) << 12;
3729 Value |= (op & UINT64_C(1)) << 6;
3730 // op: II
3731 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3732 op &= UINT64_C(63);
3733 Value |= op;
3734 // op: Ru32
3735 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3736 op &= UINT64_C(31);
3737 op <<= 16;
3738 Value |= op;
3739 // op: Nt8
3740 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3741 op &= UINT64_C(7);
3742 op <<= 8;
3743 Value |= op;
3744 break;
3745 }
3746 case Hexagon::S4_storerb_ur:
3747 case Hexagon::S4_storerf_ur:
3748 case Hexagon::S4_storerh_ur:
3749 case Hexagon::S4_storeri_ur: {
3750 // op: Ii
3751 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3752 Value |= (op & UINT64_C(2)) << 12;
3753 Value |= (op & UINT64_C(1)) << 6;
3754 // op: II
3755 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3756 op &= UINT64_C(63);
3757 Value |= op;
3758 // op: Ru32
3759 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3760 op &= UINT64_C(31);
3761 op <<= 16;
3762 Value |= op;
3763 // op: Rt32
3764 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3765 op &= UINT64_C(31);
3766 op <<= 8;
3767 Value |= op;
3768 break;
3769 }
3770 case Hexagon::S4_storerd_ur: {
3771 // op: Ii
3772 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3773 Value |= (op & UINT64_C(2)) << 12;
3774 Value |= (op & UINT64_C(1)) << 6;
3775 // op: II
3776 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3777 op &= UINT64_C(63);
3778 Value |= op;
3779 // op: Ru32
3780 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3781 op &= UINT64_C(31);
3782 op <<= 16;
3783 Value |= op;
3784 // op: Rtt32
3785 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3786 op &= UINT64_C(31);
3787 op <<= 8;
3788 Value |= op;
3789 break;
3790 }
3791 case Hexagon::S4_addi_asl_ri:
3792 case Hexagon::S4_addi_lsr_ri:
3793 case Hexagon::S4_andi_asl_ri:
3794 case Hexagon::S4_andi_lsr_ri:
3795 case Hexagon::S4_ori_asl_ri:
3796 case Hexagon::S4_ori_lsr_ri:
3797 case Hexagon::S4_subi_asl_ri:
3798 case Hexagon::S4_subi_lsr_ri: {
3799 // op: Ii
3800 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3801 Value |= (op & UINT64_C(224)) << 16;
3802 Value |= (op & UINT64_C(16)) << 9;
3803 Value |= (op & UINT64_C(14)) << 4;
3804 Value |= (op & UINT64_C(1)) << 3;
3805 // op: II
3806 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3807 op &= UINT64_C(31);
3808 op <<= 8;
3809 Value |= op;
3810 // op: Rx32
3811 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3812 op &= UINT64_C(31);
3813 op <<= 16;
3814 Value |= op;
3815 break;
3816 }
3817 case Hexagon::S2_storerhnew_io: {
3818 // op: Ii
3819 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3820 Value |= (op & UINT64_C(3072)) << 15;
3821 Value |= (op & UINT64_C(512)) << 4;
3822 Value |= (op & UINT64_C(510)) >> 1;
3823 // op: Rs32
3824 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3825 op &= UINT64_C(31);
3826 op <<= 16;
3827 Value |= op;
3828 // op: Nt8
3829 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3830 op &= UINT64_C(7);
3831 op <<= 8;
3832 Value |= op;
3833 break;
3834 }
3835 case Hexagon::S2_storerf_io:
3836 case Hexagon::S2_storerh_io: {
3837 // op: Ii
3838 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3839 Value |= (op & UINT64_C(3072)) << 15;
3840 Value |= (op & UINT64_C(512)) << 4;
3841 Value |= (op & UINT64_C(510)) >> 1;
3842 // op: Rs32
3843 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3844 op &= UINT64_C(31);
3845 op <<= 16;
3846 Value |= op;
3847 // op: Rt32
3848 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3849 op &= UINT64_C(31);
3850 op <<= 8;
3851 Value |= op;
3852 break;
3853 }
3854 case Hexagon::L2_loadrdgp:
3855 case Hexagon::PS_loadrdabs: {
3856 // op: Ii
3857 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3858 Value |= (op & UINT64_C(393216)) << 8;
3859 Value |= (op & UINT64_C(126976)) << 4;
3860 Value |= (op & UINT64_C(4088)) << 2;
3861 // op: Rdd32
3862 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3863 op &= UINT64_C(31);
3864 Value |= op;
3865 break;
3866 }
3867 case Hexagon::S4_pstorerbnewf_abs:
3868 case Hexagon::S4_pstorerbnewfnew_abs:
3869 case Hexagon::S4_pstorerbnewt_abs:
3870 case Hexagon::S4_pstorerbnewtnew_abs:
3871 case Hexagon::S4_pstorerhnewf_abs:
3872 case Hexagon::S4_pstorerhnewfnew_abs:
3873 case Hexagon::S4_pstorerhnewt_abs:
3874 case Hexagon::S4_pstorerhnewtnew_abs:
3875 case Hexagon::S4_pstorerinewf_abs:
3876 case Hexagon::S4_pstorerinewfnew_abs:
3877 case Hexagon::S4_pstorerinewt_abs:
3878 case Hexagon::S4_pstorerinewtnew_abs: {
3879 // op: Ii
3880 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3881 Value |= (op & UINT64_C(48)) << 12;
3882 Value |= (op & UINT64_C(15)) << 3;
3883 // op: Pv4
3884 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3885 op &= UINT64_C(3);
3886 Value |= op;
3887 // op: Nt8
3888 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3889 op &= UINT64_C(7);
3890 op <<= 8;
3891 Value |= op;
3892 break;
3893 }
3894 case Hexagon::S4_pstorerbf_abs:
3895 case Hexagon::S4_pstorerbfnew_abs:
3896 case Hexagon::S4_pstorerbt_abs:
3897 case Hexagon::S4_pstorerbtnew_abs:
3898 case Hexagon::S4_pstorerff_abs:
3899 case Hexagon::S4_pstorerffnew_abs:
3900 case Hexagon::S4_pstorerft_abs:
3901 case Hexagon::S4_pstorerftnew_abs:
3902 case Hexagon::S4_pstorerhf_abs:
3903 case Hexagon::S4_pstorerhfnew_abs:
3904 case Hexagon::S4_pstorerht_abs:
3905 case Hexagon::S4_pstorerhtnew_abs:
3906 case Hexagon::S4_pstorerif_abs:
3907 case Hexagon::S4_pstorerifnew_abs:
3908 case Hexagon::S4_pstorerit_abs:
3909 case Hexagon::S4_pstoreritnew_abs: {
3910 // op: Ii
3911 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3912 Value |= (op & UINT64_C(48)) << 12;
3913 Value |= (op & UINT64_C(15)) << 3;
3914 // op: Pv4
3915 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3916 op &= UINT64_C(3);
3917 Value |= op;
3918 // op: Rt32
3919 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3920 op &= UINT64_C(31);
3921 op <<= 8;
3922 Value |= op;
3923 break;
3924 }
3925 case Hexagon::S4_pstorerdf_abs:
3926 case Hexagon::S4_pstorerdfnew_abs:
3927 case Hexagon::S4_pstorerdt_abs:
3928 case Hexagon::S4_pstorerdtnew_abs: {
3929 // op: Ii
3930 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3931 Value |= (op & UINT64_C(48)) << 12;
3932 Value |= (op & UINT64_C(15)) << 3;
3933 // op: Pv4
3934 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3935 op &= UINT64_C(3);
3936 Value |= op;
3937 // op: Rtt32
3938 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3939 op &= UINT64_C(31);
3940 op <<= 8;
3941 Value |= op;
3942 break;
3943 }
3944 case Hexagon::M4_mpyri_addi: {
3945 // op: Ii
3946 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3947 Value |= (op & UINT64_C(48)) << 17;
3948 Value |= (op & UINT64_C(8)) << 10;
3949 Value |= (op & UINT64_C(7)) << 5;
3950 // op: II
3951 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3952 Value |= (op & UINT64_C(32)) << 18;
3953 Value |= (op & UINT64_C(31));
3954 // op: Rs32
3955 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3956 op &= UINT64_C(31);
3957 op <<= 16;
3958 Value |= op;
3959 // op: Rd32
3960 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3961 op &= UINT64_C(31);
3962 op <<= 8;
3963 Value |= op;
3964 break;
3965 }
3966 case Hexagon::M4_mpyrr_addi: {
3967 // op: Ii
3968 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3969 Value |= (op & UINT64_C(48)) << 17;
3970 Value |= (op & UINT64_C(8)) << 10;
3971 Value |= (op & UINT64_C(7)) << 5;
3972 // op: Rs32
3973 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3974 op &= UINT64_C(31);
3975 op <<= 16;
3976 Value |= op;
3977 // op: Rt32
3978 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3979 op &= UINT64_C(31);
3980 op <<= 8;
3981 Value |= op;
3982 // op: Rd32
3983 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3984 op &= UINT64_C(31);
3985 Value |= op;
3986 break;
3987 }
3988 case Hexagon::L2_loadrbgp:
3989 case Hexagon::L2_loadrubgp:
3990 case Hexagon::PS_loadrbabs:
3991 case Hexagon::PS_loadrubabs: {
3992 // op: Ii
3993 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3994 Value |= (op & UINT64_C(49152)) << 11;
3995 Value |= (op & UINT64_C(15872)) << 7;
3996 Value |= (op & UINT64_C(511)) << 5;
3997 // op: Rd32
3998 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3999 op &= UINT64_C(31);
4000 Value |= op;
4001 break;
4002 }
4003 case Hexagon::A2_tfrsi: {
4004 // op: Ii
4005 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4006 Value |= (op & UINT64_C(49152)) << 8;
4007 Value |= (op & UINT64_C(15872)) << 7;
4008 Value |= (op & UINT64_C(511)) << 5;
4009 // op: Rd32
4010 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4011 op &= UINT64_C(31);
4012 Value |= op;
4013 break;
4014 }
4015 case Hexagon::F2_sfimm_n:
4016 case Hexagon::F2_sfimm_p: {
4017 // op: Ii
4018 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4019 Value |= (op & UINT64_C(512)) << 12;
4020 Value |= (op & UINT64_C(511)) << 5;
4021 // op: Rd32
4022 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4023 op &= UINT64_C(31);
4024 Value |= op;
4025 break;
4026 }
4027 case Hexagon::F2_dfimm_n:
4028 case Hexagon::F2_dfimm_p: {
4029 // op: Ii
4030 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4031 Value |= (op & UINT64_C(512)) << 12;
4032 Value |= (op & UINT64_C(511)) << 5;
4033 // op: Rdd32
4034 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4035 op &= UINT64_C(31);
4036 Value |= op;
4037 break;
4038 }
4039 case Hexagon::A2_subri: {
4040 // op: Ii
4041 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4042 Value |= (op & UINT64_C(512)) << 12;
4043 Value |= (op & UINT64_C(511)) << 5;
4044 // op: Rs32
4045 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4046 op &= UINT64_C(31);
4047 op <<= 16;
4048 Value |= op;
4049 // op: Rd32
4050 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4051 op &= UINT64_C(31);
4052 Value |= op;
4053 break;
4054 }
4055 case Hexagon::S2_storerinew_io: {
4056 // op: Ii
4057 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4058 Value |= (op & UINT64_C(6144)) << 14;
4059 Value |= (op & UINT64_C(1024)) << 3;
4060 Value |= (op & UINT64_C(1020)) >> 2;
4061 // op: Rs32
4062 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4063 op &= UINT64_C(31);
4064 op <<= 16;
4065 Value |= op;
4066 // op: Nt8
4067 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4068 op &= UINT64_C(7);
4069 op <<= 8;
4070 Value |= op;
4071 break;
4072 }
4073 case Hexagon::S2_storeri_io: {
4074 // op: Ii
4075 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4076 Value |= (op & UINT64_C(6144)) << 14;
4077 Value |= (op & UINT64_C(1024)) << 3;
4078 Value |= (op & UINT64_C(1020)) >> 2;
4079 // op: Rs32
4080 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4081 op &= UINT64_C(31);
4082 op <<= 16;
4083 Value |= op;
4084 // op: Rt32
4085 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4086 op &= UINT64_C(31);
4087 op <<= 8;
4088 Value |= op;
4089 break;
4090 }
4091 case Hexagon::S4_lsli: {
4092 // op: Ii
4093 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4094 Value |= (op & UINT64_C(62)) << 15;
4095 Value |= (op & UINT64_C(1)) << 5;
4096 // op: Rt32
4097 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4098 op &= UINT64_C(31);
4099 op <<= 8;
4100 Value |= op;
4101 // op: Rd32
4102 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4103 op &= UINT64_C(31);
4104 Value |= op;
4105 break;
4106 }
4107 case Hexagon::V6_vS32b_srls_ai:
4108 case Hexagon::V6_zLd_ai: {
4109 // op: Ii
4110 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4111 Value |= (op & UINT64_C(8)) << 10;
4112 Value |= (op & UINT64_C(7)) << 8;
4113 // op: Rt32
4114 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4115 op &= UINT64_C(31);
4116 op <<= 16;
4117 Value |= op;
4118 break;
4119 }
4120 case Hexagon::V6_vS32b_new_ai:
4121 case Hexagon::V6_vS32b_nt_new_ai: {
4122 // op: Ii
4123 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4124 Value |= (op & UINT64_C(8)) << 10;
4125 Value |= (op & UINT64_C(7)) << 8;
4126 // op: Rt32
4127 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4128 op &= UINT64_C(31);
4129 op <<= 16;
4130 Value |= op;
4131 // op: Os8
4132 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4133 op &= UINT64_C(7);
4134 Value |= op;
4135 break;
4136 }
4137 case Hexagon::V6_vS32Ub_ai:
4138 case Hexagon::V6_vS32b_ai:
4139 case Hexagon::V6_vS32b_nt_ai: {
4140 // op: Ii
4141 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4142 Value |= (op & UINT64_C(8)) << 10;
4143 Value |= (op & UINT64_C(7)) << 8;
4144 // op: Rt32
4145 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4146 op &= UINT64_C(31);
4147 op <<= 16;
4148 Value |= op;
4149 // op: Vs32
4150 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4151 op &= UINT64_C(31);
4152 Value |= op;
4153 break;
4154 }
4155 case Hexagon::L2_loadrhgp:
4156 case Hexagon::L2_loadruhgp:
4157 case Hexagon::PS_loadrhabs:
4158 case Hexagon::PS_loadruhabs: {
4159 // op: Ii
4160 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4161 Value |= (op & UINT64_C(98304)) << 10;
4162 Value |= (op & UINT64_C(31744)) << 6;
4163 Value |= (op & UINT64_C(1022)) << 4;
4164 // op: Rd32
4165 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4166 op &= UINT64_C(31);
4167 Value |= op;
4168 break;
4169 }
4170 case Hexagon::J2_callf:
4171 case Hexagon::J2_callt:
4172 case Hexagon::J2_jumpf:
4173 case Hexagon::J2_jumpfnew:
4174 case Hexagon::J2_jumpfnewpt:
4175 case Hexagon::J2_jumpfpt:
4176 case Hexagon::J2_jumpt:
4177 case Hexagon::J2_jumptnew:
4178 case Hexagon::J2_jumptnewpt:
4179 case Hexagon::J2_jumptpt: {
4180 // op: Ii
4181 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4182 Value |= (op & UINT64_C(98304)) << 7;
4183 Value |= (op & UINT64_C(31744)) << 6;
4184 Value |= (op & UINT64_C(512)) << 4;
4185 Value |= (op & UINT64_C(508)) >> 1;
4186 // op: Pu4
4187 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4188 op &= UINT64_C(3);
4189 op <<= 8;
4190 Value |= op;
4191 break;
4192 }
4193 case Hexagon::V6_vwhist128qm: {
4194 // op: Ii
4195 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4196 op &= UINT64_C(1);
4197 op <<= 8;
4198 Value |= op;
4199 // op: Qv4
4200 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4201 op &= UINT64_C(3);
4202 op <<= 22;
4203 Value |= op;
4204 break;
4205 }
4206 case Hexagon::SL2_loadri_sp: {
4207 // op: Ii
4208 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4209 op &= UINT64_C(124);
4210 op <<= 2;
4211 Value |= op;
4212 // op: Rd16
4213 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4214 op &= UINT64_C(15);
4215 Value |= op;
4216 break;
4217 }
4218 case Hexagon::S4_storeirh_io: {
4219 // op: Ii
4220 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4221 op &= UINT64_C(126);
4222 op <<= 6;
4223 Value |= op;
4224 // op: II
4225 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4226 Value |= (op & UINT64_C(128)) << 6;
4227 Value |= (op & UINT64_C(127));
4228 // op: Rs32
4229 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4230 op &= UINT64_C(31);
4231 op <<= 16;
4232 Value |= op;
4233 break;
4234 }
4235 case Hexagon::L4_iadd_memoph_io:
4236 case Hexagon::L4_iand_memoph_io:
4237 case Hexagon::L4_ior_memoph_io:
4238 case Hexagon::L4_isub_memoph_io: {
4239 // op: Ii
4240 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4241 op &= UINT64_C(126);
4242 op <<= 6;
4243 Value |= op;
4244 // op: II
4245 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4246 op &= UINT64_C(31);
4247 Value |= op;
4248 // op: Rs32
4249 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4250 op &= UINT64_C(31);
4251 op <<= 16;
4252 Value |= op;
4253 break;
4254 }
4255 case Hexagon::L4_add_memoph_io:
4256 case Hexagon::L4_and_memoph_io:
4257 case Hexagon::L4_or_memoph_io:
4258 case Hexagon::L4_sub_memoph_io: {
4259 // op: Ii
4260 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4261 op &= UINT64_C(126);
4262 op <<= 6;
4263 Value |= op;
4264 // op: Rs32
4265 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4266 op &= UINT64_C(31);
4267 op <<= 16;
4268 Value |= op;
4269 // op: Rt32
4270 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4271 op &= UINT64_C(31);
4272 Value |= op;
4273 break;
4274 }
4275 case Hexagon::SS2_storeh_io: {
4276 // op: Ii
4277 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4278 op &= UINT64_C(14);
4279 op <<= 7;
4280 Value |= op;
4281 // op: Rs16
4282 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4283 op &= UINT64_C(15);
4284 op <<= 4;
4285 Value |= op;
4286 // op: Rt16
4287 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4288 op &= UINT64_C(15);
4289 Value |= op;
4290 break;
4291 }
4292 case Hexagon::SS2_storebi0:
4293 case Hexagon::SS2_storebi1: {
4294 // op: Ii
4295 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4296 op &= UINT64_C(15);
4297 Value |= op;
4298 // op: Rs16
4299 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4300 op &= UINT64_C(15);
4301 op <<= 4;
4302 Value |= op;
4303 break;
4304 }
4305 case Hexagon::SS1_storeb_io: {
4306 // op: Ii
4307 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4308 op &= UINT64_C(15);
4309 op <<= 8;
4310 Value |= op;
4311 // op: Rs16
4312 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4313 op &= UINT64_C(15);
4314 op <<= 4;
4315 Value |= op;
4316 // op: Rt16
4317 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4318 op &= UINT64_C(15);
4319 Value |= op;
4320 break;
4321 }
4322 case Hexagon::Y2_dcfetchbo: {
4323 // op: Ii
4324 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4325 op &= UINT64_C(16376);
4326 op >>= 3;
4327 Value |= op;
4328 // op: Rs32
4329 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4330 op &= UINT64_C(31);
4331 op <<= 16;
4332 Value |= op;
4333 break;
4334 }
4335 case Hexagon::SL2_loadrd_sp: {
4336 // op: Ii
4337 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4338 op &= UINT64_C(248);
4339 Value |= op;
4340 // op: Rdd8
4341 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4342 op &= UINT64_C(7);
4343 Value |= op;
4344 break;
4345 }
4346 case Hexagon::SA1_addsp: {
4347 // op: Ii
4348 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4349 op &= UINT64_C(252);
4350 op <<= 2;
4351 Value |= op;
4352 // op: Rd16
4353 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4354 op &= UINT64_C(15);
4355 Value |= op;
4356 break;
4357 }
4358 case Hexagon::S4_storeiri_io: {
4359 // op: Ii
4360 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4361 op &= UINT64_C(252);
4362 op <<= 5;
4363 Value |= op;
4364 // op: II
4365 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4366 Value |= (op & UINT64_C(128)) << 6;
4367 Value |= (op & UINT64_C(127));
4368 // op: Rs32
4369 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4370 op &= UINT64_C(31);
4371 op <<= 16;
4372 Value |= op;
4373 break;
4374 }
4375 case Hexagon::L4_iadd_memopw_io:
4376 case Hexagon::L4_iand_memopw_io:
4377 case Hexagon::L4_ior_memopw_io:
4378 case Hexagon::L4_isub_memopw_io: {
4379 // op: Ii
4380 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4381 op &= UINT64_C(252);
4382 op <<= 5;
4383 Value |= op;
4384 // op: II
4385 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4386 op &= UINT64_C(31);
4387 Value |= op;
4388 // op: Rs32
4389 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4390 op &= UINT64_C(31);
4391 op <<= 16;
4392 Value |= op;
4393 break;
4394 }
4395 case Hexagon::L4_add_memopw_io:
4396 case Hexagon::L4_and_memopw_io:
4397 case Hexagon::L4_or_memopw_io:
4398 case Hexagon::L4_sub_memopw_io: {
4399 // op: Ii
4400 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4401 op &= UINT64_C(252);
4402 op <<= 5;
4403 Value |= op;
4404 // op: Rs32
4405 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4406 op &= UINT64_C(31);
4407 op <<= 16;
4408 Value |= op;
4409 // op: Rt32
4410 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4411 op &= UINT64_C(31);
4412 Value |= op;
4413 break;
4414 }
4415 case Hexagon::A2_combineii: {
4416 // op: Ii
4417 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4418 op &= UINT64_C(255);
4419 op <<= 5;
4420 Value |= op;
4421 // op: II
4422 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4423 Value |= (op & UINT64_C(254)) << 15;
4424 Value |= (op & UINT64_C(1)) << 13;
4425 // op: Rdd32
4426 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4427 op &= UINT64_C(31);
4428 Value |= op;
4429 break;
4430 }
4431 case Hexagon::A4_combineii: {
4432 // op: Ii
4433 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4434 op &= UINT64_C(255);
4435 op <<= 5;
4436 Value |= op;
4437 // op: II
4438 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4439 Value |= (op & UINT64_C(62)) << 15;
4440 Value |= (op & UINT64_C(1)) << 13;
4441 // op: Rdd32
4442 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4443 op &= UINT64_C(31);
4444 Value |= op;
4445 break;
4446 }
4447 case Hexagon::A4_combineir: {
4448 // op: Ii
4449 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4450 op &= UINT64_C(255);
4451 op <<= 5;
4452 Value |= op;
4453 // op: Rs32
4454 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4455 op &= UINT64_C(31);
4456 op <<= 16;
4457 Value |= op;
4458 // op: Rdd32
4459 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4460 op &= UINT64_C(31);
4461 Value |= op;
4462 break;
4463 }
4464 case Hexagon::SA1_cmpeqi: {
4465 // op: Ii
4466 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4467 op &= UINT64_C(3);
4468 Value |= op;
4469 // op: Rs16
4470 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4471 op &= UINT64_C(15);
4472 op <<= 4;
4473 Value |= op;
4474 break;
4475 }
4476 case Hexagon::SA1_combine0i:
4477 case Hexagon::SA1_combine1i:
4478 case Hexagon::SA1_combine2i:
4479 case Hexagon::SA1_combine3i: {
4480 // op: Ii
4481 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4482 op &= UINT64_C(3);
4483 op <<= 5;
4484 Value |= op;
4485 // op: Rdd8
4486 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4487 op &= UINT64_C(7);
4488 Value |= op;
4489 break;
4490 }
4491 case Hexagon::S2_mask: {
4492 // op: Ii
4493 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4494 op &= UINT64_C(31);
4495 op <<= 8;
4496 Value |= op;
4497 // op: II
4498 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4499 Value |= (op & UINT64_C(24)) << 18;
4500 Value |= (op & UINT64_C(7)) << 5;
4501 // op: Rd32
4502 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4503 op &= UINT64_C(31);
4504 Value |= op;
4505 break;
4506 }
4507 case Hexagon::SS1_storew_io: {
4508 // op: Ii
4509 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4510 op &= UINT64_C(60);
4511 op <<= 6;
4512 Value |= op;
4513 // op: Rs16
4514 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4515 op &= UINT64_C(15);
4516 op <<= 4;
4517 Value |= op;
4518 // op: Rt16
4519 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4520 op &= UINT64_C(15);
4521 Value |= op;
4522 break;
4523 }
4524 case Hexagon::SS2_storewi0:
4525 case Hexagon::SS2_storewi1: {
4526 // op: Ii
4527 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4528 op &= UINT64_C(60);
4529 op >>= 2;
4530 Value |= op;
4531 // op: Rs16
4532 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4533 op &= UINT64_C(15);
4534 op <<= 4;
4535 Value |= op;
4536 break;
4537 }
4538 case Hexagon::SA1_seti: {
4539 // op: Ii
4540 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4541 op &= UINT64_C(63);
4542 op <<= 4;
4543 Value |= op;
4544 // op: Rd16
4545 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4546 op &= UINT64_C(15);
4547 Value |= op;
4548 break;
4549 }
4550 case Hexagon::S4_storeirb_io: {
4551 // op: Ii
4552 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4553 op &= UINT64_C(63);
4554 op <<= 7;
4555 Value |= op;
4556 // op: II
4557 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4558 Value |= (op & UINT64_C(128)) << 6;
4559 Value |= (op & UINT64_C(127));
4560 // op: Rs32
4561 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4562 op &= UINT64_C(31);
4563 op <<= 16;
4564 Value |= op;
4565 break;
4566 }
4567 case Hexagon::L4_iadd_memopb_io:
4568 case Hexagon::L4_iand_memopb_io:
4569 case Hexagon::L4_ior_memopb_io:
4570 case Hexagon::L4_isub_memopb_io: {
4571 // op: Ii
4572 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4573 op &= UINT64_C(63);
4574 op <<= 7;
4575 Value |= op;
4576 // op: II
4577 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4578 op &= UINT64_C(31);
4579 Value |= op;
4580 // op: Rs32
4581 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4582 op &= UINT64_C(31);
4583 op <<= 16;
4584 Value |= op;
4585 break;
4586 }
4587 case Hexagon::C4_addipc: {
4588 // op: Ii
4589 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4590 op &= UINT64_C(63);
4591 op <<= 7;
4592 Value |= op;
4593 // op: Rd32
4594 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4595 op &= UINT64_C(31);
4596 Value |= op;
4597 break;
4598 }
4599 case Hexagon::L4_add_memopb_io:
4600 case Hexagon::L4_and_memopb_io:
4601 case Hexagon::L4_or_memopb_io:
4602 case Hexagon::L4_sub_memopb_io: {
4603 // op: Ii
4604 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4605 op &= UINT64_C(63);
4606 op <<= 7;
4607 Value |= op;
4608 // op: Rs32
4609 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4610 op &= UINT64_C(31);
4611 op <<= 16;
4612 Value |= op;
4613 // op: Rt32
4614 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4615 op &= UINT64_C(31);
4616 Value |= op;
4617 break;
4618 }
4619 case Hexagon::L2_loadrd_io: {
4620 // op: Ii
4621 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4622 Value |= (op & UINT64_C(12288)) << 13;
4623 Value |= (op & UINT64_C(4088)) << 2;
4624 // op: Rs32
4625 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4626 op &= UINT64_C(31);
4627 op <<= 16;
4628 Value |= op;
4629 // op: Rdd32
4630 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4631 op &= UINT64_C(31);
4632 Value |= op;
4633 break;
4634 }
4635 case Hexagon::S2_pstorerinewf_io:
4636 case Hexagon::S2_pstorerinewt_io:
4637 case Hexagon::S4_pstorerinewfnew_io:
4638 case Hexagon::S4_pstorerinewtnew_io: {
4639 // op: Ii
4640 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4641 Value |= (op & UINT64_C(128)) << 6;
4642 Value |= (op & UINT64_C(124)) << 1;
4643 // op: Pv4
4644 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4645 op &= UINT64_C(3);
4646 Value |= op;
4647 // op: Rs32
4648 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4649 op &= UINT64_C(31);
4650 op <<= 16;
4651 Value |= op;
4652 // op: Nt8
4653 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4654 op &= UINT64_C(7);
4655 op <<= 8;
4656 Value |= op;
4657 break;
4658 }
4659 case Hexagon::S2_pstorerif_io:
4660 case Hexagon::S2_pstorerit_io:
4661 case Hexagon::S4_pstorerifnew_io:
4662 case Hexagon::S4_pstoreritnew_io: {
4663 // op: Ii
4664 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4665 Value |= (op & UINT64_C(128)) << 6;
4666 Value |= (op & UINT64_C(124)) << 1;
4667 // op: Pv4
4668 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4669 op &= UINT64_C(3);
4670 Value |= op;
4671 // op: Rs32
4672 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4673 op &= UINT64_C(31);
4674 op <<= 16;
4675 Value |= op;
4676 // op: Rt32
4677 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4678 op &= UINT64_C(31);
4679 op <<= 8;
4680 Value |= op;
4681 break;
4682 }
4683 case Hexagon::J4_cmpeqn1_f_jumpnv_nt:
4684 case Hexagon::J4_cmpeqn1_f_jumpnv_t:
4685 case Hexagon::J4_cmpeqn1_t_jumpnv_nt:
4686 case Hexagon::J4_cmpeqn1_t_jumpnv_t:
4687 case Hexagon::J4_cmpgtn1_f_jumpnv_nt:
4688 case Hexagon::J4_cmpgtn1_f_jumpnv_t:
4689 case Hexagon::J4_cmpgtn1_t_jumpnv_nt:
4690 case Hexagon::J4_cmpgtn1_t_jumpnv_t: {
4691 // op: Ii
4692 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4693 Value |= (op & UINT64_C(1536)) << 11;
4694 Value |= (op & UINT64_C(508)) >> 1;
4695 // op: Ns8
4696 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4697 op &= UINT64_C(7);
4698 op <<= 16;
4699 Value |= op;
4700 break;
4701 }
4702 case Hexagon::J4_cmpeq_f_jumpnv_nt:
4703 case Hexagon::J4_cmpeq_f_jumpnv_t:
4704 case Hexagon::J4_cmpeq_t_jumpnv_nt:
4705 case Hexagon::J4_cmpeq_t_jumpnv_t:
4706 case Hexagon::J4_cmpgt_f_jumpnv_nt:
4707 case Hexagon::J4_cmpgt_f_jumpnv_t:
4708 case Hexagon::J4_cmpgt_t_jumpnv_nt:
4709 case Hexagon::J4_cmpgt_t_jumpnv_t:
4710 case Hexagon::J4_cmpgtu_f_jumpnv_nt:
4711 case Hexagon::J4_cmpgtu_f_jumpnv_t:
4712 case Hexagon::J4_cmpgtu_t_jumpnv_nt:
4713 case Hexagon::J4_cmpgtu_t_jumpnv_t: {
4714 // op: Ii
4715 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4716 Value |= (op & UINT64_C(1536)) << 11;
4717 Value |= (op & UINT64_C(508)) >> 1;
4718 // op: Ns8
4719 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4720 op &= UINT64_C(7);
4721 op <<= 16;
4722 Value |= op;
4723 // op: Rt32
4724 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4725 op &= UINT64_C(31);
4726 op <<= 8;
4727 Value |= op;
4728 break;
4729 }
4730 case Hexagon::J4_cmpeqn1_fp0_jump_nt:
4731 case Hexagon::J4_cmpeqn1_fp0_jump_t:
4732 case Hexagon::J4_cmpeqn1_fp1_jump_nt:
4733 case Hexagon::J4_cmpeqn1_fp1_jump_t:
4734 case Hexagon::J4_cmpeqn1_tp0_jump_nt:
4735 case Hexagon::J4_cmpeqn1_tp0_jump_t:
4736 case Hexagon::J4_cmpeqn1_tp1_jump_nt:
4737 case Hexagon::J4_cmpeqn1_tp1_jump_t:
4738 case Hexagon::J4_cmpgtn1_fp0_jump_nt:
4739 case Hexagon::J4_cmpgtn1_fp0_jump_t:
4740 case Hexagon::J4_cmpgtn1_fp1_jump_nt:
4741 case Hexagon::J4_cmpgtn1_fp1_jump_t:
4742 case Hexagon::J4_cmpgtn1_tp0_jump_nt:
4743 case Hexagon::J4_cmpgtn1_tp0_jump_t:
4744 case Hexagon::J4_cmpgtn1_tp1_jump_nt:
4745 case Hexagon::J4_cmpgtn1_tp1_jump_t: {
4746 // op: Ii
4747 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4748 Value |= (op & UINT64_C(1536)) << 11;
4749 Value |= (op & UINT64_C(508)) >> 1;
4750 // op: Rs16
4751 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4752 op &= UINT64_C(15);
4753 op <<= 16;
4754 Value |= op;
4755 break;
4756 }
4757 case Hexagon::J4_cmpeq_fp0_jump_nt:
4758 case Hexagon::J4_cmpeq_fp0_jump_t:
4759 case Hexagon::J4_cmpeq_fp1_jump_nt:
4760 case Hexagon::J4_cmpeq_fp1_jump_t:
4761 case Hexagon::J4_cmpeq_tp0_jump_nt:
4762 case Hexagon::J4_cmpeq_tp0_jump_t:
4763 case Hexagon::J4_cmpeq_tp1_jump_nt:
4764 case Hexagon::J4_cmpeq_tp1_jump_t:
4765 case Hexagon::J4_cmpgt_fp0_jump_nt:
4766 case Hexagon::J4_cmpgt_fp0_jump_t:
4767 case Hexagon::J4_cmpgt_fp1_jump_nt:
4768 case Hexagon::J4_cmpgt_fp1_jump_t:
4769 case Hexagon::J4_cmpgt_tp0_jump_nt:
4770 case Hexagon::J4_cmpgt_tp0_jump_t:
4771 case Hexagon::J4_cmpgt_tp1_jump_nt:
4772 case Hexagon::J4_cmpgt_tp1_jump_t:
4773 case Hexagon::J4_cmpgtu_fp0_jump_nt:
4774 case Hexagon::J4_cmpgtu_fp0_jump_t:
4775 case Hexagon::J4_cmpgtu_fp1_jump_nt:
4776 case Hexagon::J4_cmpgtu_fp1_jump_t:
4777 case Hexagon::J4_cmpgtu_tp0_jump_nt:
4778 case Hexagon::J4_cmpgtu_tp0_jump_t:
4779 case Hexagon::J4_cmpgtu_tp1_jump_nt:
4780 case Hexagon::J4_cmpgtu_tp1_jump_t: {
4781 // op: Ii
4782 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4783 Value |= (op & UINT64_C(1536)) << 11;
4784 Value |= (op & UINT64_C(508)) >> 1;
4785 // op: Rs16
4786 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4787 op &= UINT64_C(15);
4788 op <<= 16;
4789 Value |= op;
4790 // op: Rt16
4791 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4792 op &= UINT64_C(15);
4793 op <<= 8;
4794 Value |= op;
4795 break;
4796 }
4797 case Hexagon::J4_jumpsetr: {
4798 // op: Ii
4799 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4800 Value |= (op & UINT64_C(1536)) << 11;
4801 Value |= (op & UINT64_C(508)) >> 1;
4802 // op: Rs16
4803 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4804 op &= UINT64_C(15);
4805 op <<= 16;
4806 Value |= op;
4807 // op: Rd16
4808 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4809 op &= UINT64_C(15);
4810 op <<= 8;
4811 Value |= op;
4812 break;
4813 }
4814 case Hexagon::J4_cmplt_f_jumpnv_nt:
4815 case Hexagon::J4_cmplt_f_jumpnv_t:
4816 case Hexagon::J4_cmplt_t_jumpnv_nt:
4817 case Hexagon::J4_cmplt_t_jumpnv_t:
4818 case Hexagon::J4_cmpltu_f_jumpnv_nt:
4819 case Hexagon::J4_cmpltu_f_jumpnv_t:
4820 case Hexagon::J4_cmpltu_t_jumpnv_nt:
4821 case Hexagon::J4_cmpltu_t_jumpnv_t: {
4822 // op: Ii
4823 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4824 Value |= (op & UINT64_C(1536)) << 11;
4825 Value |= (op & UINT64_C(508)) >> 1;
4826 // op: Rt32
4827 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4828 op &= UINT64_C(31);
4829 op <<= 8;
4830 Value |= op;
4831 // op: Ns8
4832 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4833 op &= UINT64_C(7);
4834 op <<= 16;
4835 Value |= op;
4836 break;
4837 }
4838 case Hexagon::L2_loadrb_io:
4839 case Hexagon::L2_loadrub_io: {
4840 // op: Ii
4841 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4842 Value |= (op & UINT64_C(1536)) << 16;
4843 Value |= (op & UINT64_C(511)) << 5;
4844 // op: Rs32
4845 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4846 op &= UINT64_C(31);
4847 op <<= 16;
4848 Value |= op;
4849 // op: Rd32
4850 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4851 op &= UINT64_C(31);
4852 Value |= op;
4853 break;
4854 }
4855 case Hexagon::M4_mpyri_addr_u2: {
4856 // op: Ii
4857 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4858 Value |= (op & UINT64_C(192)) << 15;
4859 Value |= (op & UINT64_C(32)) << 8;
4860 Value |= (op & UINT64_C(28)) << 3;
4861 // op: Ru32
4862 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4863 op &= UINT64_C(31);
4864 Value |= op;
4865 // op: Rs32
4866 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4867 op &= UINT64_C(31);
4868 op <<= 16;
4869 Value |= op;
4870 // op: Rd32
4871 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4872 op &= UINT64_C(31);
4873 op <<= 8;
4874 Value |= op;
4875 break;
4876 }
4877 case Hexagon::L4_loadbsw2_ur:
4878 case Hexagon::L4_loadbzw2_ur:
4879 case Hexagon::L4_loadrb_ur:
4880 case Hexagon::L4_loadrh_ur:
4881 case Hexagon::L4_loadri_ur:
4882 case Hexagon::L4_loadrub_ur:
4883 case Hexagon::L4_loadruh_ur: {
4884 // op: Ii
4885 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4886 Value |= (op & UINT64_C(2)) << 12;
4887 Value |= (op & UINT64_C(1)) << 7;
4888 // op: II
4889 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4890 Value |= (op & UINT64_C(60)) << 6;
4891 Value |= (op & UINT64_C(3)) << 5;
4892 // op: Rt32
4893 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4894 op &= UINT64_C(31);
4895 op <<= 16;
4896 Value |= op;
4897 // op: Rd32
4898 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4899 op &= UINT64_C(31);
4900 Value |= op;
4901 break;
4902 }
4903 case Hexagon::L4_loadbsw4_ur:
4904 case Hexagon::L4_loadbzw4_ur:
4905 case Hexagon::L4_loadrd_ur: {
4906 // op: Ii
4907 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4908 Value |= (op & UINT64_C(2)) << 12;
4909 Value |= (op & UINT64_C(1)) << 7;
4910 // op: II
4911 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4912 Value |= (op & UINT64_C(60)) << 6;
4913 Value |= (op & UINT64_C(3)) << 5;
4914 // op: Rt32
4915 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4916 op &= UINT64_C(31);
4917 op <<= 16;
4918 Value |= op;
4919 // op: Rdd32
4920 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4921 op &= UINT64_C(31);
4922 Value |= op;
4923 break;
4924 }
4925 case Hexagon::S4_storerbnew_rr:
4926 case Hexagon::S4_storerhnew_rr:
4927 case Hexagon::S4_storerinew_rr: {
4928 // op: Ii
4929 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4930 Value |= (op & UINT64_C(2)) << 12;
4931 Value |= (op & UINT64_C(1)) << 7;
4932 // op: Rs32
4933 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4934 op &= UINT64_C(31);
4935 op <<= 16;
4936 Value |= op;
4937 // op: Ru32
4938 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4939 op &= UINT64_C(31);
4940 op <<= 8;
4941 Value |= op;
4942 // op: Nt8
4943 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4944 op &= UINT64_C(7);
4945 Value |= op;
4946 break;
4947 }
4948 case Hexagon::S4_storerb_rr:
4949 case Hexagon::S4_storerf_rr:
4950 case Hexagon::S4_storerh_rr:
4951 case Hexagon::S4_storeri_rr: {
4952 // op: Ii
4953 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4954 Value |= (op & UINT64_C(2)) << 12;
4955 Value |= (op & UINT64_C(1)) << 7;
4956 // op: Rs32
4957 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4958 op &= UINT64_C(31);
4959 op <<= 16;
4960 Value |= op;
4961 // op: Ru32
4962 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4963 op &= UINT64_C(31);
4964 op <<= 8;
4965 Value |= op;
4966 // op: Rt32
4967 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4968 op &= UINT64_C(31);
4969 Value |= op;
4970 break;
4971 }
4972 case Hexagon::S4_storerd_rr: {
4973 // op: Ii
4974 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4975 Value |= (op & UINT64_C(2)) << 12;
4976 Value |= (op & UINT64_C(1)) << 7;
4977 // op: Rs32
4978 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4979 op &= UINT64_C(31);
4980 op <<= 16;
4981 Value |= op;
4982 // op: Ru32
4983 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4984 op &= UINT64_C(31);
4985 op <<= 8;
4986 Value |= op;
4987 // op: Rtt32
4988 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4989 op &= UINT64_C(31);
4990 Value |= op;
4991 break;
4992 }
4993 case Hexagon::J2_trap1: {
4994 // op: Ii
4995 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4996 Value |= (op & UINT64_C(248)) << 5;
4997 Value |= (op & UINT64_C(7)) << 2;
4998 // op: Rx32
4999 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5000 op &= UINT64_C(31);
5001 op <<= 16;
5002 Value |= op;
5003 break;
5004 }
5005 case Hexagon::S2_pstorerdf_io:
5006 case Hexagon::S2_pstorerdt_io:
5007 case Hexagon::S4_pstorerdfnew_io:
5008 case Hexagon::S4_pstorerdtnew_io: {
5009 // op: Ii
5010 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5011 Value |= (op & UINT64_C(256)) << 5;
5012 Value |= (op & UINT64_C(248));
5013 // op: Pv4
5014 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5015 op &= UINT64_C(3);
5016 Value |= op;
5017 // op: Rs32
5018 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5019 op &= UINT64_C(31);
5020 op <<= 16;
5021 Value |= op;
5022 // op: Rtt32
5023 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5024 op &= UINT64_C(31);
5025 op <<= 8;
5026 Value |= op;
5027 break;
5028 }
5029 case Hexagon::L2_loadbsw2_io:
5030 case Hexagon::L2_loadbzw2_io:
5031 case Hexagon::L2_loadrh_io:
5032 case Hexagon::L2_loadruh_io: {
5033 // op: Ii
5034 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5035 Value |= (op & UINT64_C(3072)) << 15;
5036 Value |= (op & UINT64_C(1022)) << 4;
5037 // op: Rs32
5038 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5039 op &= UINT64_C(31);
5040 op <<= 16;
5041 Value |= op;
5042 // op: Rd32
5043 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5044 op &= UINT64_C(31);
5045 Value |= op;
5046 break;
5047 }
5048 case Hexagon::S2_pstorerbnewf_io:
5049 case Hexagon::S2_pstorerbnewt_io:
5050 case Hexagon::S4_pstorerbnewfnew_io:
5051 case Hexagon::S4_pstorerbnewtnew_io: {
5052 // op: Ii
5053 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5054 Value |= (op & UINT64_C(32)) << 8;
5055 Value |= (op & UINT64_C(31)) << 3;
5056 // op: Pv4
5057 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5058 op &= UINT64_C(3);
5059 Value |= op;
5060 // op: Rs32
5061 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5062 op &= UINT64_C(31);
5063 op <<= 16;
5064 Value |= op;
5065 // op: Nt8
5066 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5067 op &= UINT64_C(7);
5068 op <<= 8;
5069 Value |= op;
5070 break;
5071 }
5072 case Hexagon::S2_pstorerbf_io:
5073 case Hexagon::S2_pstorerbt_io:
5074 case Hexagon::S4_pstorerbfnew_io:
5075 case Hexagon::S4_pstorerbtnew_io: {
5076 // op: Ii
5077 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5078 Value |= (op & UINT64_C(32)) << 8;
5079 Value |= (op & UINT64_C(31)) << 3;
5080 // op: Pv4
5081 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5082 op &= UINT64_C(3);
5083 Value |= op;
5084 // op: Rs32
5085 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5086 op &= UINT64_C(31);
5087 op <<= 16;
5088 Value |= op;
5089 // op: Rt32
5090 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5091 op &= UINT64_C(31);
5092 op <<= 8;
5093 Value |= op;
5094 break;
5095 }
5096 case Hexagon::C2_cmoveif:
5097 case Hexagon::C2_cmoveit:
5098 case Hexagon::C2_cmovenewif:
5099 case Hexagon::C2_cmovenewit: {
5100 // op: Ii
5101 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5102 Value |= (op & UINT64_C(3840)) << 8;
5103 Value |= (op & UINT64_C(255)) << 5;
5104 // op: Pu4
5105 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5106 op &= UINT64_C(3);
5107 op <<= 21;
5108 Value |= op;
5109 // op: Rd32
5110 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5111 op &= UINT64_C(31);
5112 Value |= op;
5113 break;
5114 }
5115 case Hexagon::S4_subaddi: {
5116 // op: Ii
5117 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5118 Value |= (op & UINT64_C(48)) << 17;
5119 Value |= (op & UINT64_C(8)) << 10;
5120 Value |= (op & UINT64_C(7)) << 5;
5121 // op: Rs32
5122 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5123 op &= UINT64_C(31);
5124 op <<= 16;
5125 Value |= op;
5126 // op: Ru32
5127 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5128 op &= UINT64_C(31);
5129 Value |= op;
5130 // op: Rd32
5131 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5132 op &= UINT64_C(31);
5133 op <<= 8;
5134 Value |= op;
5135 break;
5136 }
5137 case Hexagon::A2_tfrih:
5138 case Hexagon::A2_tfril: {
5139 // op: Ii
5140 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5141 Value |= (op & UINT64_C(49152)) << 8;
5142 Value |= (op & UINT64_C(16383));
5143 // op: Rx32
5144 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5145 op &= UINT64_C(31);
5146 op <<= 16;
5147 Value |= op;
5148 break;
5149 }
5150 case Hexagon::C2_cmpeqi:
5151 case Hexagon::C2_cmpgti:
5152 case Hexagon::C4_cmpltei:
5153 case Hexagon::C4_cmpneqi: {
5154 // op: Ii
5155 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5156 Value |= (op & UINT64_C(512)) << 12;
5157 Value |= (op & UINT64_C(511)) << 5;
5158 // op: Rs32
5159 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5160 op &= UINT64_C(31);
5161 op <<= 16;
5162 Value |= op;
5163 // op: Pd4
5164 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5165 op &= UINT64_C(3);
5166 Value |= op;
5167 break;
5168 }
5169 case Hexagon::A2_andir:
5170 case Hexagon::A2_orir: {
5171 // op: Ii
5172 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5173 Value |= (op & UINT64_C(512)) << 12;
5174 Value |= (op & UINT64_C(511)) << 5;
5175 // op: Rs32
5176 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5177 op &= UINT64_C(31);
5178 op <<= 16;
5179 Value |= op;
5180 // op: Rd32
5181 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5182 op &= UINT64_C(31);
5183 Value |= op;
5184 break;
5185 }
5186 case Hexagon::L2_loadri_io: {
5187 // op: Ii
5188 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5189 Value |= (op & UINT64_C(6144)) << 14;
5190 Value |= (op & UINT64_C(2044)) << 3;
5191 // op: Rs32
5192 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5193 op &= UINT64_C(31);
5194 op <<= 16;
5195 Value |= op;
5196 // op: Rd32
5197 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5198 op &= UINT64_C(31);
5199 Value |= op;
5200 break;
5201 }
5202 case Hexagon::L2_loadbsw4_io:
5203 case Hexagon::L2_loadbzw4_io: {
5204 // op: Ii
5205 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5206 Value |= (op & UINT64_C(6144)) << 14;
5207 Value |= (op & UINT64_C(2044)) << 3;
5208 // op: Rs32
5209 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5210 op &= UINT64_C(31);
5211 op <<= 16;
5212 Value |= op;
5213 // op: Rdd32
5214 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5215 op &= UINT64_C(31);
5216 Value |= op;
5217 break;
5218 }
5219 case Hexagon::L4_ploadrbf_abs:
5220 case Hexagon::L4_ploadrbfnew_abs:
5221 case Hexagon::L4_ploadrbt_abs:
5222 case Hexagon::L4_ploadrbtnew_abs:
5223 case Hexagon::L4_ploadrhf_abs:
5224 case Hexagon::L4_ploadrhfnew_abs:
5225 case Hexagon::L4_ploadrht_abs:
5226 case Hexagon::L4_ploadrhtnew_abs:
5227 case Hexagon::L4_ploadrif_abs:
5228 case Hexagon::L4_ploadrifnew_abs:
5229 case Hexagon::L4_ploadrit_abs:
5230 case Hexagon::L4_ploadritnew_abs:
5231 case Hexagon::L4_ploadrubf_abs:
5232 case Hexagon::L4_ploadrubfnew_abs:
5233 case Hexagon::L4_ploadrubt_abs:
5234 case Hexagon::L4_ploadrubtnew_abs:
5235 case Hexagon::L4_ploadruhf_abs:
5236 case Hexagon::L4_ploadruhfnew_abs:
5237 case Hexagon::L4_ploadruht_abs:
5238 case Hexagon::L4_ploadruhtnew_abs: {
5239 // op: Ii
5240 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5241 Value |= (op & UINT64_C(62)) << 15;
5242 Value |= (op & UINT64_C(1)) << 8;
5243 // op: Pt4
5244 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5245 op &= UINT64_C(3);
5246 op <<= 9;
5247 Value |= op;
5248 // op: Rd32
5249 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5250 op &= UINT64_C(31);
5251 Value |= op;
5252 break;
5253 }
5254 case Hexagon::L4_ploadrdf_abs:
5255 case Hexagon::L4_ploadrdfnew_abs:
5256 case Hexagon::L4_ploadrdt_abs:
5257 case Hexagon::L4_ploadrdtnew_abs: {
5258 // op: Ii
5259 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5260 Value |= (op & UINT64_C(62)) << 15;
5261 Value |= (op & UINT64_C(1)) << 8;
5262 // op: Pt4
5263 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5264 op &= UINT64_C(3);
5265 op <<= 9;
5266 Value |= op;
5267 // op: Rdd32
5268 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5269 op &= UINT64_C(31);
5270 Value |= op;
5271 break;
5272 }
5273 case Hexagon::S2_pstorerhnewf_io:
5274 case Hexagon::S2_pstorerhnewt_io:
5275 case Hexagon::S4_pstorerhnewfnew_io:
5276 case Hexagon::S4_pstorerhnewtnew_io: {
5277 // op: Ii
5278 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5279 Value |= (op & UINT64_C(64)) << 7;
5280 Value |= (op & UINT64_C(62)) << 2;
5281 // op: Pv4
5282 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5283 op &= UINT64_C(3);
5284 Value |= op;
5285 // op: Rs32
5286 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5287 op &= UINT64_C(31);
5288 op <<= 16;
5289 Value |= op;
5290 // op: Nt8
5291 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5292 op &= UINT64_C(7);
5293 op <<= 8;
5294 Value |= op;
5295 break;
5296 }
5297 case Hexagon::S2_pstorerff_io:
5298 case Hexagon::S2_pstorerft_io:
5299 case Hexagon::S2_pstorerhf_io:
5300 case Hexagon::S2_pstorerht_io:
5301 case Hexagon::S4_pstorerffnew_io:
5302 case Hexagon::S4_pstorerftnew_io:
5303 case Hexagon::S4_pstorerhfnew_io:
5304 case Hexagon::S4_pstorerhtnew_io: {
5305 // op: Ii
5306 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5307 Value |= (op & UINT64_C(64)) << 7;
5308 Value |= (op & UINT64_C(62)) << 2;
5309 // op: Pv4
5310 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5311 op &= UINT64_C(3);
5312 Value |= op;
5313 // op: Rs32
5314 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5315 op &= UINT64_C(31);
5316 op <<= 16;
5317 Value |= op;
5318 // op: Rt32
5319 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5320 op &= UINT64_C(31);
5321 op <<= 8;
5322 Value |= op;
5323 break;
5324 }
5325 case Hexagon::A2_addi: {
5326 // op: Ii
5327 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5328 Value |= (op & UINT64_C(65024)) << 12;
5329 Value |= (op & UINT64_C(511)) << 5;
5330 // op: Rs32
5331 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5332 op &= UINT64_C(31);
5333 op <<= 16;
5334 Value |= op;
5335 // op: Rd32
5336 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5337 op &= UINT64_C(31);
5338 Value |= op;
5339 break;
5340 }
5341 case Hexagon::V6_zLd_pred_ai: {
5342 // op: Ii
5343 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5344 Value |= (op & UINT64_C(8)) << 10;
5345 Value |= (op & UINT64_C(7)) << 8;
5346 // op: Pv4
5347 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5348 op &= UINT64_C(3);
5349 op <<= 11;
5350 Value |= op;
5351 // op: Rt32
5352 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5353 op &= UINT64_C(31);
5354 op <<= 16;
5355 Value |= op;
5356 break;
5357 }
5358 case Hexagon::V6_vS32b_new_npred_ai:
5359 case Hexagon::V6_vS32b_new_pred_ai:
5360 case Hexagon::V6_vS32b_nt_new_npred_ai:
5361 case Hexagon::V6_vS32b_nt_new_pred_ai: {
5362 // op: Ii
5363 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5364 Value |= (op & UINT64_C(8)) << 10;
5365 Value |= (op & UINT64_C(7)) << 8;
5366 // op: Pv4
5367 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5368 op &= UINT64_C(3);
5369 op <<= 11;
5370 Value |= op;
5371 // op: Rt32
5372 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5373 op &= UINT64_C(31);
5374 op <<= 16;
5375 Value |= op;
5376 // op: Os8
5377 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5378 op &= UINT64_C(7);
5379 Value |= op;
5380 break;
5381 }
5382 case Hexagon::V6_vS32Ub_npred_ai:
5383 case Hexagon::V6_vS32Ub_pred_ai:
5384 case Hexagon::V6_vS32b_npred_ai:
5385 case Hexagon::V6_vS32b_nt_npred_ai:
5386 case Hexagon::V6_vS32b_nt_pred_ai:
5387 case Hexagon::V6_vS32b_pred_ai: {
5388 // op: Ii
5389 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5390 Value |= (op & UINT64_C(8)) << 10;
5391 Value |= (op & UINT64_C(7)) << 8;
5392 // op: Pv4
5393 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5394 op &= UINT64_C(3);
5395 op <<= 11;
5396 Value |= op;
5397 // op: Rt32
5398 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5399 op &= UINT64_C(31);
5400 op <<= 16;
5401 Value |= op;
5402 // op: Vs32
5403 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5404 op &= UINT64_C(31);
5405 Value |= op;
5406 break;
5407 }
5408 case Hexagon::V6_vS32b_nqpred_ai:
5409 case Hexagon::V6_vS32b_nt_nqpred_ai:
5410 case Hexagon::V6_vS32b_nt_qpred_ai:
5411 case Hexagon::V6_vS32b_qpred_ai: {
5412 // op: Ii
5413 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5414 Value |= (op & UINT64_C(8)) << 10;
5415 Value |= (op & UINT64_C(7)) << 8;
5416 // op: Qv4
5417 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5418 op &= UINT64_C(3);
5419 op <<= 11;
5420 Value |= op;
5421 // op: Rt32
5422 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5423 op &= UINT64_C(31);
5424 op <<= 16;
5425 Value |= op;
5426 // op: Vs32
5427 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5428 op &= UINT64_C(31);
5429 Value |= op;
5430 break;
5431 }
5432 case Hexagon::V6_vL32Ub_ai:
5433 case Hexagon::V6_vL32b_ai:
5434 case Hexagon::V6_vL32b_cur_ai:
5435 case Hexagon::V6_vL32b_nt_ai:
5436 case Hexagon::V6_vL32b_nt_cur_ai:
5437 case Hexagon::V6_vL32b_nt_tmp_ai:
5438 case Hexagon::V6_vL32b_tmp_ai: {
5439 // op: Ii
5440 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5441 Value |= (op & UINT64_C(8)) << 10;
5442 Value |= (op & UINT64_C(7)) << 8;
5443 // op: Rt32
5444 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5445 op &= UINT64_C(31);
5446 op <<= 16;
5447 Value |= op;
5448 // op: Vd32
5449 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5450 op &= UINT64_C(31);
5451 Value |= op;
5452 break;
5453 }
5454 case Hexagon::S2_storerd_pci: {
5455 // op: Ii
5456 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5457 op &= UINT64_C(120);
5458 Value |= op;
5459 // op: Mu2
5460 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5461 op &= UINT64_C(1);
5462 op <<= 13;
5463 Value |= op;
5464 // op: Rtt32
5465 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5466 op &= UINT64_C(31);
5467 op <<= 8;
5468 Value |= op;
5469 // op: Rx32
5470 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5471 op &= UINT64_C(31);
5472 op <<= 16;
5473 Value |= op;
5474 break;
5475 }
5476 case Hexagon::S2_storerd_pi: {
5477 // op: Ii
5478 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5479 op &= UINT64_C(120);
5480 Value |= op;
5481 // op: Rtt32
5482 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5483 op &= UINT64_C(31);
5484 op <<= 8;
5485 Value |= op;
5486 // op: Rx32
5487 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5488 op &= UINT64_C(31);
5489 op <<= 16;
5490 Value |= op;
5491 break;
5492 }
5493 case Hexagon::S4_storeirhf_io:
5494 case Hexagon::S4_storeirhfnew_io:
5495 case Hexagon::S4_storeirht_io:
5496 case Hexagon::S4_storeirhtnew_io: {
5497 // op: Ii
5498 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5499 op &= UINT64_C(126);
5500 op <<= 6;
5501 Value |= op;
5502 // op: II
5503 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5504 Value |= (op & UINT64_C(32)) << 8;
5505 Value |= (op & UINT64_C(31));
5506 // op: Pv4
5507 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5508 op &= UINT64_C(3);
5509 op <<= 5;
5510 Value |= op;
5511 // op: Rs32
5512 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5513 op &= UINT64_C(31);
5514 op <<= 16;
5515 Value |= op;
5516 break;
5517 }
5518 case Hexagon::SA1_addi: {
5519 // op: Ii
5520 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5521 op &= UINT64_C(127);
5522 op <<= 4;
5523 Value |= op;
5524 // op: Rx16
5525 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5526 op &= UINT64_C(15);
5527 Value |= op;
5528 break;
5529 }
5530 case Hexagon::A4_cmpbgtui:
5531 case Hexagon::A4_cmphgtui: {
5532 // op: Ii
5533 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5534 op &= UINT64_C(127);
5535 op <<= 5;
5536 Value |= op;
5537 // op: Rs32
5538 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5539 op &= UINT64_C(31);
5540 op <<= 16;
5541 Value |= op;
5542 // op: Pd4
5543 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5544 op &= UINT64_C(3);
5545 Value |= op;
5546 break;
5547 }
5548 case Hexagon::A4_vcmpbgtui:
5549 case Hexagon::A4_vcmphgtui:
5550 case Hexagon::A4_vcmpwgtui: {
5551 // op: Ii
5552 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5553 op &= UINT64_C(127);
5554 op <<= 5;
5555 Value |= op;
5556 // op: Rss32
5557 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5558 op &= UINT64_C(31);
5559 op <<= 16;
5560 Value |= op;
5561 // op: Pd4
5562 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5563 op &= UINT64_C(3);
5564 Value |= op;
5565 break;
5566 }
5567 case Hexagon::SL2_loadrh_io:
5568 case Hexagon::SL2_loadruh_io: {
5569 // op: Ii
5570 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5571 op &= UINT64_C(14);
5572 op <<= 7;
5573 Value |= op;
5574 // op: Rs16
5575 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5576 op &= UINT64_C(15);
5577 op <<= 4;
5578 Value |= op;
5579 // op: Rd16
5580 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5581 op &= UINT64_C(15);
5582 Value |= op;
5583 break;
5584 }
5585 case Hexagon::S2_storerbnew_pci: {
5586 // op: Ii
5587 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5588 op &= UINT64_C(15);
5589 op <<= 3;
5590 Value |= op;
5591 // op: Mu2
5592 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5593 op &= UINT64_C(1);
5594 op <<= 13;
5595 Value |= op;
5596 // op: Nt8
5597 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5598 op &= UINT64_C(7);
5599 op <<= 8;
5600 Value |= op;
5601 // op: Rx32
5602 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5603 op &= UINT64_C(31);
5604 op <<= 16;
5605 Value |= op;
5606 break;
5607 }
5608 case Hexagon::S2_storerb_pci: {
5609 // op: Ii
5610 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5611 op &= UINT64_C(15);
5612 op <<= 3;
5613 Value |= op;
5614 // op: Mu2
5615 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5616 op &= UINT64_C(1);
5617 op <<= 13;
5618 Value |= op;
5619 // op: Rt32
5620 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5621 op &= UINT64_C(31);
5622 op <<= 8;
5623 Value |= op;
5624 // op: Rx32
5625 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5626 op &= UINT64_C(31);
5627 op <<= 16;
5628 Value |= op;
5629 break;
5630 }
5631 case Hexagon::S2_storerbnew_pi: {
5632 // op: Ii
5633 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5634 op &= UINT64_C(15);
5635 op <<= 3;
5636 Value |= op;
5637 // op: Nt8
5638 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5639 op &= UINT64_C(7);
5640 op <<= 8;
5641 Value |= op;
5642 // op: Rx32
5643 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5644 op &= UINT64_C(31);
5645 op <<= 16;
5646 Value |= op;
5647 break;
5648 }
5649 case Hexagon::S2_storerb_pi: {
5650 // op: Ii
5651 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5652 op &= UINT64_C(15);
5653 op <<= 3;
5654 Value |= op;
5655 // op: Rt32
5656 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5657 op &= UINT64_C(31);
5658 op <<= 8;
5659 Value |= op;
5660 // op: Rx32
5661 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5662 op &= UINT64_C(31);
5663 op <<= 16;
5664 Value |= op;
5665 break;
5666 }
5667 case Hexagon::SL1_loadrub_io: {
5668 // op: Ii
5669 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5670 op &= UINT64_C(15);
5671 op <<= 8;
5672 Value |= op;
5673 // op: Rs16
5674 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5675 op &= UINT64_C(15);
5676 op <<= 4;
5677 Value |= op;
5678 // op: Rd16
5679 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5680 op &= UINT64_C(15);
5681 Value |= op;
5682 break;
5683 }
5684 case Hexagon::S5_asrhub_rnd_sat:
5685 case Hexagon::S5_asrhub_sat: {
5686 // op: Ii
5687 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5688 op &= UINT64_C(15);
5689 op <<= 8;
5690 Value |= op;
5691 // op: Rss32
5692 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5693 op &= UINT64_C(31);
5694 op <<= 16;
5695 Value |= op;
5696 // op: Rd32
5697 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5698 op &= UINT64_C(31);
5699 Value |= op;
5700 break;
5701 }
5702 case Hexagon::S2_asl_i_vh:
5703 case Hexagon::S2_asr_i_vh:
5704 case Hexagon::S2_lsr_i_vh:
5705 case Hexagon::S5_vasrhrnd: {
5706 // op: Ii
5707 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5708 op &= UINT64_C(15);
5709 op <<= 8;
5710 Value |= op;
5711 // op: Rss32
5712 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5713 op &= UINT64_C(31);
5714 op <<= 16;
5715 Value |= op;
5716 // op: Rdd32
5717 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5718 op &= UINT64_C(31);
5719 Value |= op;
5720 break;
5721 }
5722 case Hexagon::S2_allocframe: {
5723 // op: Ii
5724 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5725 op &= UINT64_C(16376);
5726 op >>= 3;
5727 Value |= op;
5728 // op: Rx32
5729 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5730 op &= UINT64_C(31);
5731 op <<= 16;
5732 Value |= op;
5733 break;
5734 }
5735 case Hexagon::S4_storeirif_io:
5736 case Hexagon::S4_storeirifnew_io:
5737 case Hexagon::S4_storeirit_io:
5738 case Hexagon::S4_storeiritnew_io: {
5739 // op: Ii
5740 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5741 op &= UINT64_C(252);
5742 op <<= 5;
5743 Value |= op;
5744 // op: II
5745 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5746 Value |= (op & UINT64_C(32)) << 8;
5747 Value |= (op & UINT64_C(31));
5748 // op: Pv4
5749 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5750 op &= UINT64_C(3);
5751 op <<= 5;
5752 Value |= op;
5753 // op: Rs32
5754 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5755 op &= UINT64_C(31);
5756 op <<= 16;
5757 Value |= op;
5758 break;
5759 }
5760 case Hexagon::C2_muxii: {
5761 // op: Ii
5762 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5763 op &= UINT64_C(255);
5764 op <<= 5;
5765 Value |= op;
5766 // op: II
5767 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5768 Value |= (op & UINT64_C(254)) << 15;
5769 Value |= (op & UINT64_C(1)) << 13;
5770 // op: Pu4
5771 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5772 op &= UINT64_C(3);
5773 op <<= 23;
5774 Value |= op;
5775 // op: Rd32
5776 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5777 op &= UINT64_C(31);
5778 Value |= op;
5779 break;
5780 }
5781 case Hexagon::C2_muxri: {
5782 // op: Ii
5783 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5784 op &= UINT64_C(255);
5785 op <<= 5;
5786 Value |= op;
5787 // op: Pu4
5788 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5789 op &= UINT64_C(3);
5790 op <<= 21;
5791 Value |= op;
5792 // op: Rs32
5793 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5794 op &= UINT64_C(31);
5795 op <<= 16;
5796 Value |= op;
5797 // op: Rd32
5798 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5799 op &= UINT64_C(31);
5800 Value |= op;
5801 break;
5802 }
5803 case Hexagon::A4_cmpbeqi:
5804 case Hexagon::A4_cmpbgti:
5805 case Hexagon::A4_cmpheqi:
5806 case Hexagon::A4_cmphgti: {
5807 // op: Ii
5808 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5809 op &= UINT64_C(255);
5810 op <<= 5;
5811 Value |= op;
5812 // op: Rs32
5813 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5814 op &= UINT64_C(31);
5815 op <<= 16;
5816 Value |= op;
5817 // op: Pd4
5818 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5819 op &= UINT64_C(3);
5820 Value |= op;
5821 break;
5822 }
5823 case Hexagon::A4_rcmpeqi:
5824 case Hexagon::A4_rcmpneqi:
5825 case Hexagon::M2_mpysin:
5826 case Hexagon::M2_mpysip: {
5827 // op: Ii
5828 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5829 op &= UINT64_C(255);
5830 op <<= 5;
5831 Value |= op;
5832 // op: Rs32
5833 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5834 op &= UINT64_C(31);
5835 op <<= 16;
5836 Value |= op;
5837 // op: Rd32
5838 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5839 op &= UINT64_C(31);
5840 Value |= op;
5841 break;
5842 }
5843 case Hexagon::A4_combineri: {
5844 // op: Ii
5845 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5846 op &= UINT64_C(255);
5847 op <<= 5;
5848 Value |= op;
5849 // op: Rs32
5850 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5851 op &= UINT64_C(31);
5852 op <<= 16;
5853 Value |= op;
5854 // op: Rdd32
5855 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5856 op &= UINT64_C(31);
5857 Value |= op;
5858 break;
5859 }
5860 case Hexagon::A4_vcmpbeqi:
5861 case Hexagon::A4_vcmpbgti:
5862 case Hexagon::A4_vcmpheqi:
5863 case Hexagon::A4_vcmphgti:
5864 case Hexagon::A4_vcmpweqi:
5865 case Hexagon::A4_vcmpwgti: {
5866 // op: Ii
5867 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5868 op &= UINT64_C(255);
5869 op <<= 5;
5870 Value |= op;
5871 // op: Rss32
5872 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5873 op &= UINT64_C(31);
5874 op <<= 16;
5875 Value |= op;
5876 // op: Pd4
5877 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5878 op &= UINT64_C(3);
5879 Value |= op;
5880 break;
5881 }
5882 case Hexagon::S2_storerhnew_pci: {
5883 // op: Ii
5884 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5885 op &= UINT64_C(30);
5886 op <<= 2;
5887 Value |= op;
5888 // op: Mu2
5889 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5890 op &= UINT64_C(1);
5891 op <<= 13;
5892 Value |= op;
5893 // op: Nt8
5894 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5895 op &= UINT64_C(7);
5896 op <<= 8;
5897 Value |= op;
5898 // op: Rx32
5899 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5900 op &= UINT64_C(31);
5901 op <<= 16;
5902 Value |= op;
5903 break;
5904 }
5905 case Hexagon::S2_storerf_pci:
5906 case Hexagon::S2_storerh_pci: {
5907 // op: Ii
5908 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5909 op &= UINT64_C(30);
5910 op <<= 2;
5911 Value |= op;
5912 // op: Mu2
5913 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5914 op &= UINT64_C(1);
5915 op <<= 13;
5916 Value |= op;
5917 // op: Rt32
5918 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5919 op &= UINT64_C(31);
5920 op <<= 8;
5921 Value |= op;
5922 // op: Rx32
5923 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5924 op &= UINT64_C(31);
5925 op <<= 16;
5926 Value |= op;
5927 break;
5928 }
5929 case Hexagon::S2_storerhnew_pi: {
5930 // op: Ii
5931 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5932 op &= UINT64_C(30);
5933 op <<= 2;
5934 Value |= op;
5935 // op: Nt8
5936 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5937 op &= UINT64_C(7);
5938 op <<= 8;
5939 Value |= op;
5940 // op: Rx32
5941 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5942 op &= UINT64_C(31);
5943 op <<= 16;
5944 Value |= op;
5945 break;
5946 }
5947 case Hexagon::S2_storerf_pi:
5948 case Hexagon::S2_storerh_pi: {
5949 // op: Ii
5950 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5951 op &= UINT64_C(30);
5952 op <<= 2;
5953 Value |= op;
5954 // op: Rt32
5955 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5956 op &= UINT64_C(31);
5957 op <<= 8;
5958 Value |= op;
5959 // op: Rx32
5960 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5961 op &= UINT64_C(31);
5962 op <<= 16;
5963 Value |= op;
5964 break;
5965 }
5966 case Hexagon::F2_dfclass: {
5967 // op: Ii
5968 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5969 op &= UINT64_C(31);
5970 op <<= 5;
5971 Value |= op;
5972 // op: Rss32
5973 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5974 op &= UINT64_C(31);
5975 op <<= 16;
5976 Value |= op;
5977 // op: Pd4
5978 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5979 op &= UINT64_C(3);
5980 Value |= op;
5981 break;
5982 }
5983 case Hexagon::S2_extractu:
5984 case Hexagon::S4_extract: {
5985 // op: Ii
5986 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5987 op &= UINT64_C(31);
5988 op <<= 8;
5989 Value |= op;
5990 // op: II
5991 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5992 Value |= (op & UINT64_C(24)) << 18;
5993 Value |= (op & UINT64_C(7)) << 5;
5994 // op: Rs32
5995 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5996 op &= UINT64_C(31);
5997 op <<= 16;
5998 Value |= op;
5999 // op: Rd32
6000 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6001 op &= UINT64_C(31);
6002 Value |= op;
6003 break;
6004 }
6005 case Hexagon::F2_sfclass:
6006 case Hexagon::S2_tstbit_i:
6007 case Hexagon::S4_ntstbit_i: {
6008 // op: Ii
6009 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6010 op &= UINT64_C(31);
6011 op <<= 8;
6012 Value |= op;
6013 // op: Rs32
6014 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6015 op &= UINT64_C(31);
6016 op <<= 16;
6017 Value |= op;
6018 // op: Pd4
6019 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6020 op &= UINT64_C(3);
6021 Value |= op;
6022 break;
6023 }
6024 case Hexagon::A4_cround_ri:
6025 case Hexagon::A4_round_ri:
6026 case Hexagon::A4_round_ri_sat:
6027 case Hexagon::A7_clip:
6028 case Hexagon::S2_asl_i_r:
6029 case Hexagon::S2_asl_i_r_sat:
6030 case Hexagon::S2_asr_i_r:
6031 case Hexagon::S2_asr_i_r_rnd:
6032 case Hexagon::S2_clrbit_i:
6033 case Hexagon::S2_lsr_i_r:
6034 case Hexagon::S2_setbit_i:
6035 case Hexagon::S2_togglebit_i:
6036 case Hexagon::S6_rol_i_r: {
6037 // op: Ii
6038 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6039 op &= UINT64_C(31);
6040 op <<= 8;
6041 Value |= op;
6042 // op: Rs32
6043 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6044 op &= UINT64_C(31);
6045 op <<= 16;
6046 Value |= op;
6047 // op: Rd32
6048 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6049 op &= UINT64_C(31);
6050 Value |= op;
6051 break;
6052 }
6053 case Hexagon::A4_bitspliti: {
6054 // op: Ii
6055 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6056 op &= UINT64_C(31);
6057 op <<= 8;
6058 Value |= op;
6059 // op: Rs32
6060 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6061 op &= UINT64_C(31);
6062 op <<= 16;
6063 Value |= op;
6064 // op: Rdd32
6065 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6066 op &= UINT64_C(31);
6067 Value |= op;
6068 break;
6069 }
6070 case Hexagon::S2_asr_i_svw_trun: {
6071 // op: Ii
6072 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6073 op &= UINT64_C(31);
6074 op <<= 8;
6075 Value |= op;
6076 // op: Rss32
6077 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6078 op &= UINT64_C(31);
6079 op <<= 16;
6080 Value |= op;
6081 // op: Rd32
6082 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6083 op &= UINT64_C(31);
6084 Value |= op;
6085 break;
6086 }
6087 case Hexagon::A7_vclip:
6088 case Hexagon::S2_asl_i_vw:
6089 case Hexagon::S2_asr_i_vw:
6090 case Hexagon::S2_lsr_i_vw: {
6091 // op: Ii
6092 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6093 op &= UINT64_C(31);
6094 op <<= 8;
6095 Value |= op;
6096 // op: Rss32
6097 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6098 op &= UINT64_C(31);
6099 op <<= 16;
6100 Value |= op;
6101 // op: Rdd32
6102 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6103 op &= UINT64_C(31);
6104 Value |= op;
6105 break;
6106 }
6107 case Hexagon::C2_cmpgtui:
6108 case Hexagon::C4_cmplteui: {
6109 // op: Ii
6110 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6111 op &= UINT64_C(511);
6112 op <<= 5;
6113 Value |= op;
6114 // op: Rs32
6115 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6116 op &= UINT64_C(31);
6117 op <<= 16;
6118 Value |= op;
6119 // op: Pd4
6120 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6121 op &= UINT64_C(3);
6122 Value |= op;
6123 break;
6124 }
6125 case Hexagon::S2_storerinew_pci: {
6126 // op: Ii
6127 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6128 op &= UINT64_C(60);
6129 op <<= 1;
6130 Value |= op;
6131 // op: Mu2
6132 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6133 op &= UINT64_C(1);
6134 op <<= 13;
6135 Value |= op;
6136 // op: Nt8
6137 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6138 op &= UINT64_C(7);
6139 op <<= 8;
6140 Value |= op;
6141 // op: Rx32
6142 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6143 op &= UINT64_C(31);
6144 op <<= 16;
6145 Value |= op;
6146 break;
6147 }
6148 case Hexagon::S2_storeri_pci: {
6149 // op: Ii
6150 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6151 op &= UINT64_C(60);
6152 op <<= 1;
6153 Value |= op;
6154 // op: Mu2
6155 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6156 op &= UINT64_C(1);
6157 op <<= 13;
6158 Value |= op;
6159 // op: Rt32
6160 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6161 op &= UINT64_C(31);
6162 op <<= 8;
6163 Value |= op;
6164 // op: Rx32
6165 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6166 op &= UINT64_C(31);
6167 op <<= 16;
6168 Value |= op;
6169 break;
6170 }
6171 case Hexagon::S2_storerinew_pi: {
6172 // op: Ii
6173 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6174 op &= UINT64_C(60);
6175 op <<= 1;
6176 Value |= op;
6177 // op: Nt8
6178 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6179 op &= UINT64_C(7);
6180 op <<= 8;
6181 Value |= op;
6182 // op: Rx32
6183 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6184 op &= UINT64_C(31);
6185 op <<= 16;
6186 Value |= op;
6187 break;
6188 }
6189 case Hexagon::S2_storeri_pi: {
6190 // op: Ii
6191 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6192 op &= UINT64_C(60);
6193 op <<= 1;
6194 Value |= op;
6195 // op: Rt32
6196 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6197 op &= UINT64_C(31);
6198 op <<= 8;
6199 Value |= op;
6200 // op: Rx32
6201 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6202 op &= UINT64_C(31);
6203 op <<= 16;
6204 Value |= op;
6205 break;
6206 }
6207 case Hexagon::SL1_loadri_io: {
6208 // op: Ii
6209 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6210 op &= UINT64_C(60);
6211 op <<= 6;
6212 Value |= op;
6213 // op: Rs16
6214 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6215 op &= UINT64_C(15);
6216 op <<= 4;
6217 Value |= op;
6218 // op: Rd16
6219 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6220 op &= UINT64_C(15);
6221 Value |= op;
6222 break;
6223 }
6224 case Hexagon::S4_storeirbf_io:
6225 case Hexagon::S4_storeirbfnew_io:
6226 case Hexagon::S4_storeirbt_io:
6227 case Hexagon::S4_storeirbtnew_io: {
6228 // op: Ii
6229 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6230 op &= UINT64_C(63);
6231 op <<= 7;
6232 Value |= op;
6233 // op: II
6234 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6235 Value |= (op & UINT64_C(32)) << 8;
6236 Value |= (op & UINT64_C(31));
6237 // op: Pv4
6238 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6239 op &= UINT64_C(3);
6240 op <<= 5;
6241 Value |= op;
6242 // op: Rs32
6243 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6244 op &= UINT64_C(31);
6245 op <<= 16;
6246 Value |= op;
6247 break;
6248 }
6249 case Hexagon::S2_extractup:
6250 case Hexagon::S4_extractp: {
6251 // op: Ii
6252 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6253 op &= UINT64_C(63);
6254 op <<= 8;
6255 Value |= op;
6256 // op: II
6257 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6258 Value |= (op & UINT64_C(56)) << 18;
6259 Value |= (op & UINT64_C(7)) << 5;
6260 // op: Rss32
6261 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6262 op &= UINT64_C(31);
6263 op <<= 16;
6264 Value |= op;
6265 // op: Rdd32
6266 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6267 op &= UINT64_C(31);
6268 Value |= op;
6269 break;
6270 }
6271 case Hexagon::C2_bitsclri:
6272 case Hexagon::C4_nbitsclri: {
6273 // op: Ii
6274 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6275 op &= UINT64_C(63);
6276 op <<= 8;
6277 Value |= op;
6278 // op: Rs32
6279 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6280 op &= UINT64_C(31);
6281 op <<= 16;
6282 Value |= op;
6283 // op: Pd4
6284 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6285 op &= UINT64_C(3);
6286 Value |= op;
6287 break;
6288 }
6289 case Hexagon::S4_clbaddi: {
6290 // op: Ii
6291 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6292 op &= UINT64_C(63);
6293 op <<= 8;
6294 Value |= op;
6295 // op: Rs32
6296 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6297 op &= UINT64_C(31);
6298 op <<= 16;
6299 Value |= op;
6300 // op: Rd32
6301 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6302 op &= UINT64_C(31);
6303 Value |= op;
6304 break;
6305 }
6306 case Hexagon::S4_clbpaddi: {
6307 // op: Ii
6308 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6309 op &= UINT64_C(63);
6310 op <<= 8;
6311 Value |= op;
6312 // op: Rss32
6313 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6314 op &= UINT64_C(31);
6315 op <<= 16;
6316 Value |= op;
6317 // op: Rd32
6318 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6319 op &= UINT64_C(31);
6320 Value |= op;
6321 break;
6322 }
6323 case Hexagon::A7_croundd_ri:
6324 case Hexagon::S2_asl_i_p:
6325 case Hexagon::S2_asr_i_p:
6326 case Hexagon::S2_asr_i_p_rnd:
6327 case Hexagon::S2_lsr_i_p:
6328 case Hexagon::S6_rol_i_p: {
6329 // op: Ii
6330 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6331 op &= UINT64_C(63);
6332 op <<= 8;
6333 Value |= op;
6334 // op: Rss32
6335 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6336 op &= UINT64_C(31);
6337 op <<= 16;
6338 Value |= op;
6339 // op: Rdd32
6340 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6341 op &= UINT64_C(31);
6342 Value |= op;
6343 break;
6344 }
6345 case Hexagon::V6_vS32b_new_pi:
6346 case Hexagon::V6_vS32b_nt_new_pi: {
6347 // op: Ii
6348 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6349 op &= UINT64_C(7);
6350 op <<= 8;
6351 Value |= op;
6352 // op: Os8
6353 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6354 op &= UINT64_C(7);
6355 Value |= op;
6356 // op: Rx32
6357 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6358 op &= UINT64_C(31);
6359 op <<= 16;
6360 Value |= op;
6361 break;
6362 }
6363 case Hexagon::SL2_loadrb_io: {
6364 // op: Ii
6365 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6366 op &= UINT64_C(7);
6367 op <<= 8;
6368 Value |= op;
6369 // op: Rs16
6370 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6371 op &= UINT64_C(15);
6372 op <<= 4;
6373 Value |= op;
6374 // op: Rd16
6375 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6376 op &= UINT64_C(15);
6377 Value |= op;
6378 break;
6379 }
6380 case Hexagon::V6_vS32b_srls_pi:
6381 case Hexagon::V6_zLd_pi: {
6382 // op: Ii
6383 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6384 op &= UINT64_C(7);
6385 op <<= 8;
6386 Value |= op;
6387 // op: Rx32
6388 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6389 op &= UINT64_C(31);
6390 op <<= 16;
6391 Value |= op;
6392 break;
6393 }
6394 case Hexagon::V6_vS32Ub_pi:
6395 case Hexagon::V6_vS32b_nt_pi:
6396 case Hexagon::V6_vS32b_pi: {
6397 // op: Ii
6398 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6399 op &= UINT64_C(7);
6400 op <<= 8;
6401 Value |= op;
6402 // op: Vs32
6403 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6404 op &= UINT64_C(31);
6405 Value |= op;
6406 // op: Rx32
6407 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6408 op &= UINT64_C(31);
6409 op <<= 16;
6410 Value |= op;
6411 break;
6412 }
6413 case Hexagon::L2_loadalignb_io: {
6414 // op: Ii
6415 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6416 Value |= (op & UINT64_C(1536)) << 16;
6417 Value |= (op & UINT64_C(511)) << 5;
6418 // op: Rs32
6419 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6420 op &= UINT64_C(31);
6421 op <<= 16;
6422 Value |= op;
6423 // op: Ryy32
6424 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6425 op &= UINT64_C(31);
6426 Value |= op;
6427 break;
6428 }
6429 case Hexagon::S4_vrcrotate: {
6430 // op: Ii
6431 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6432 Value |= (op & UINT64_C(2)) << 12;
6433 Value |= (op & UINT64_C(1)) << 5;
6434 // op: Rss32
6435 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6436 op &= UINT64_C(31);
6437 op <<= 16;
6438 Value |= op;
6439 // op: Rt32
6440 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6441 op &= UINT64_C(31);
6442 op <<= 8;
6443 Value |= op;
6444 // op: Rdd32
6445 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6446 op &= UINT64_C(31);
6447 Value |= op;
6448 break;
6449 }
6450 case Hexagon::L4_loadalignb_ur:
6451 case Hexagon::L4_loadalignh_ur: {
6452 // op: Ii
6453 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6454 Value |= (op & UINT64_C(2)) << 12;
6455 Value |= (op & UINT64_C(1)) << 7;
6456 // op: II
6457 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6458 Value |= (op & UINT64_C(60)) << 6;
6459 Value |= (op & UINT64_C(3)) << 5;
6460 // op: Rt32
6461 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6462 op &= UINT64_C(31);
6463 op <<= 16;
6464 Value |= op;
6465 // op: Ryy32
6466 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6467 op &= UINT64_C(31);
6468 Value |= op;
6469 break;
6470 }
6471 case Hexagon::S4_pstorerbnewf_rr:
6472 case Hexagon::S4_pstorerbnewfnew_rr:
6473 case Hexagon::S4_pstorerbnewt_rr:
6474 case Hexagon::S4_pstorerbnewtnew_rr:
6475 case Hexagon::S4_pstorerhnewf_rr:
6476 case Hexagon::S4_pstorerhnewfnew_rr:
6477 case Hexagon::S4_pstorerhnewt_rr:
6478 case Hexagon::S4_pstorerhnewtnew_rr:
6479 case Hexagon::S4_pstorerinewf_rr:
6480 case Hexagon::S4_pstorerinewfnew_rr:
6481 case Hexagon::S4_pstorerinewt_rr:
6482 case Hexagon::S4_pstorerinewtnew_rr: {
6483 // op: Ii
6484 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6485 Value |= (op & UINT64_C(2)) << 12;
6486 Value |= (op & UINT64_C(1)) << 7;
6487 // op: Pv4
6488 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6489 op &= UINT64_C(3);
6490 op <<= 5;
6491 Value |= op;
6492 // op: Rs32
6493 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6494 op &= UINT64_C(31);
6495 op <<= 16;
6496 Value |= op;
6497 // op: Ru32
6498 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6499 op &= UINT64_C(31);
6500 op <<= 8;
6501 Value |= op;
6502 // op: Nt8
6503 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6504 op &= UINT64_C(7);
6505 Value |= op;
6506 break;
6507 }
6508 case Hexagon::S4_pstorerbf_rr:
6509 case Hexagon::S4_pstorerbfnew_rr:
6510 case Hexagon::S4_pstorerbt_rr:
6511 case Hexagon::S4_pstorerbtnew_rr:
6512 case Hexagon::S4_pstorerff_rr:
6513 case Hexagon::S4_pstorerffnew_rr:
6514 case Hexagon::S4_pstorerft_rr:
6515 case Hexagon::S4_pstorerftnew_rr:
6516 case Hexagon::S4_pstorerhf_rr:
6517 case Hexagon::S4_pstorerhfnew_rr:
6518 case Hexagon::S4_pstorerht_rr:
6519 case Hexagon::S4_pstorerhtnew_rr:
6520 case Hexagon::S4_pstorerif_rr:
6521 case Hexagon::S4_pstorerifnew_rr:
6522 case Hexagon::S4_pstorerit_rr:
6523 case Hexagon::S4_pstoreritnew_rr: {
6524 // op: Ii
6525 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6526 Value |= (op & UINT64_C(2)) << 12;
6527 Value |= (op & UINT64_C(1)) << 7;
6528 // op: Pv4
6529 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6530 op &= UINT64_C(3);
6531 op <<= 5;
6532 Value |= op;
6533 // op: Rs32
6534 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6535 op &= UINT64_C(31);
6536 op <<= 16;
6537 Value |= op;
6538 // op: Ru32
6539 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6540 op &= UINT64_C(31);
6541 op <<= 8;
6542 Value |= op;
6543 // op: Rt32
6544 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6545 op &= UINT64_C(31);
6546 Value |= op;
6547 break;
6548 }
6549 case Hexagon::S4_pstorerdf_rr:
6550 case Hexagon::S4_pstorerdfnew_rr:
6551 case Hexagon::S4_pstorerdt_rr:
6552 case Hexagon::S4_pstorerdtnew_rr: {
6553 // op: Ii
6554 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6555 Value |= (op & UINT64_C(2)) << 12;
6556 Value |= (op & UINT64_C(1)) << 7;
6557 // op: Pv4
6558 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6559 op &= UINT64_C(3);
6560 op <<= 5;
6561 Value |= op;
6562 // op: Rs32
6563 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6564 op &= UINT64_C(31);
6565 op <<= 16;
6566 Value |= op;
6567 // op: Ru32
6568 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6569 op &= UINT64_C(31);
6570 op <<= 8;
6571 Value |= op;
6572 // op: Rtt32
6573 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6574 op &= UINT64_C(31);
6575 Value |= op;
6576 break;
6577 }
6578 case Hexagon::L4_loadrb_rr:
6579 case Hexagon::L4_loadrh_rr:
6580 case Hexagon::L4_loadri_rr:
6581 case Hexagon::L4_loadrub_rr:
6582 case Hexagon::L4_loadruh_rr: {
6583 // op: Ii
6584 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6585 Value |= (op & UINT64_C(2)) << 12;
6586 Value |= (op & UINT64_C(1)) << 7;
6587 // op: Rs32
6588 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6589 op &= UINT64_C(31);
6590 op <<= 16;
6591 Value |= op;
6592 // op: Rt32
6593 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6594 op &= UINT64_C(31);
6595 op <<= 8;
6596 Value |= op;
6597 // op: Rd32
6598 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6599 op &= UINT64_C(31);
6600 Value |= op;
6601 break;
6602 }
6603 case Hexagon::L4_loadrd_rr: {
6604 // op: Ii
6605 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6606 Value |= (op & UINT64_C(2)) << 12;
6607 Value |= (op & UINT64_C(1)) << 7;
6608 // op: Rs32
6609 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6610 op &= UINT64_C(31);
6611 op <<= 16;
6612 Value |= op;
6613 // op: Rt32
6614 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6615 op &= UINT64_C(31);
6616 op <<= 8;
6617 Value |= op;
6618 // op: Rdd32
6619 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6620 op &= UINT64_C(31);
6621 Value |= op;
6622 break;
6623 }
6624 case Hexagon::L2_loadalignh_io: {
6625 // op: Ii
6626 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6627 Value |= (op & UINT64_C(3072)) << 15;
6628 Value |= (op & UINT64_C(1022)) << 4;
6629 // op: Rs32
6630 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6631 op &= UINT64_C(31);
6632 op <<= 16;
6633 Value |= op;
6634 // op: Ryy32
6635 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6636 op &= UINT64_C(31);
6637 Value |= op;
6638 break;
6639 }
6640 case Hexagon::S4_addaddi: {
6641 // op: Ii
6642 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6643 Value |= (op & UINT64_C(48)) << 17;
6644 Value |= (op & UINT64_C(8)) << 10;
6645 Value |= (op & UINT64_C(7)) << 5;
6646 // op: Rs32
6647 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6648 op &= UINT64_C(31);
6649 op <<= 16;
6650 Value |= op;
6651 // op: Ru32
6652 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6653 op &= UINT64_C(31);
6654 Value |= op;
6655 // op: Rd32
6656 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6657 op &= UINT64_C(31);
6658 op <<= 8;
6659 Value |= op;
6660 break;
6661 }
6662 case Hexagon::M4_mpyri_addr: {
6663 // op: Ii
6664 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6665 Value |= (op & UINT64_C(48)) << 17;
6666 Value |= (op & UINT64_C(8)) << 10;
6667 Value |= (op & UINT64_C(7)) << 5;
6668 // op: Ru32
6669 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6670 op &= UINT64_C(31);
6671 Value |= op;
6672 // op: Rs32
6673 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6674 op &= UINT64_C(31);
6675 op <<= 16;
6676 Value |= op;
6677 // op: Rd32
6678 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6679 op &= UINT64_C(31);
6680 op <<= 8;
6681 Value |= op;
6682 break;
6683 }
6684 case Hexagon::S4_or_andi:
6685 case Hexagon::S4_or_ori: {
6686 // op: Ii
6687 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6688 Value |= (op & UINT64_C(512)) << 12;
6689 Value |= (op & UINT64_C(511)) << 5;
6690 // op: Rs32
6691 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6692 op &= UINT64_C(31);
6693 op <<= 16;
6694 Value |= op;
6695 // op: Rx32
6696 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6697 op &= UINT64_C(31);
6698 Value |= op;
6699 break;
6700 }
6701 case Hexagon::S4_or_andix: {
6702 // op: Ii
6703 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6704 Value |= (op & UINT64_C(512)) << 12;
6705 Value |= (op & UINT64_C(511)) << 5;
6706 // op: Ru32
6707 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6708 op &= UINT64_C(31);
6709 Value |= op;
6710 // op: Rx32
6711 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6712 op &= UINT64_C(31);
6713 op <<= 16;
6714 Value |= op;
6715 break;
6716 }
6717 case Hexagon::V6_vL32b_cur_npred_ai:
6718 case Hexagon::V6_vL32b_cur_pred_ai:
6719 case Hexagon::V6_vL32b_npred_ai:
6720 case Hexagon::V6_vL32b_nt_cur_npred_ai:
6721 case Hexagon::V6_vL32b_nt_cur_pred_ai:
6722 case Hexagon::V6_vL32b_nt_npred_ai:
6723 case Hexagon::V6_vL32b_nt_pred_ai:
6724 case Hexagon::V6_vL32b_nt_tmp_npred_ai:
6725 case Hexagon::V6_vL32b_nt_tmp_pred_ai:
6726 case Hexagon::V6_vL32b_pred_ai:
6727 case Hexagon::V6_vL32b_tmp_npred_ai:
6728 case Hexagon::V6_vL32b_tmp_pred_ai: {
6729 // op: Ii
6730 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6731 Value |= (op & UINT64_C(8)) << 10;
6732 Value |= (op & UINT64_C(7)) << 8;
6733 // op: Pv4
6734 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6735 op &= UINT64_C(3);
6736 op <<= 11;
6737 Value |= op;
6738 // op: Rt32
6739 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6740 op &= UINT64_C(31);
6741 op <<= 16;
6742 Value |= op;
6743 // op: Vd32
6744 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6745 op &= UINT64_C(31);
6746 Value |= op;
6747 break;
6748 }
6749 case Hexagon::S2_tableidxb:
6750 case Hexagon::S2_tableidxd:
6751 case Hexagon::S2_tableidxh:
6752 case Hexagon::S2_tableidxw: {
6753 // op: Ii
6754 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6755 Value |= (op & UINT64_C(8)) << 18;
6756 Value |= (op & UINT64_C(7)) << 5;
6757 // op: II
6758 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6759 op &= UINT64_C(63);
6760 op <<= 8;
6761 Value |= op;
6762 // op: Rs32
6763 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6764 op &= UINT64_C(31);
6765 op <<= 16;
6766 Value |= op;
6767 // op: Rx32
6768 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6769 op &= UINT64_C(31);
6770 Value |= op;
6771 break;
6772 }
6773 case Hexagon::V6_vrmpybusi:
6774 case Hexagon::V6_vrmpyubi:
6775 case Hexagon::V6_vrsadubi: {
6776 // op: Ii
6777 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6778 op &= UINT64_C(1);
6779 op <<= 5;
6780 Value |= op;
6781 // op: Vuu32
6782 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6783 op &= UINT64_C(31);
6784 op <<= 8;
6785 Value |= op;
6786 // op: Rt32
6787 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6788 op &= UINT64_C(31);
6789 op <<= 16;
6790 Value |= op;
6791 // op: Vdd32
6792 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6793 op &= UINT64_C(31);
6794 Value |= op;
6795 break;
6796 }
6797 case Hexagon::S2_pstorerdf_pi:
6798 case Hexagon::S2_pstorerdfnew_pi:
6799 case Hexagon::S2_pstorerdt_pi:
6800 case Hexagon::S2_pstorerdtnew_pi: {
6801 // op: Ii
6802 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6803 op &= UINT64_C(120);
6804 Value |= op;
6805 // op: Pv4
6806 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6807 op &= UINT64_C(3);
6808 Value |= op;
6809 // op: Rtt32
6810 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6811 op &= UINT64_C(31);
6812 op <<= 8;
6813 Value |= op;
6814 // op: Rx32
6815 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6816 op &= UINT64_C(31);
6817 op <<= 16;
6818 Value |= op;
6819 break;
6820 }
6821 case Hexagon::L2_loadrd_pci: {
6822 // op: Ii
6823 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6824 op &= UINT64_C(120);
6825 op <<= 2;
6826 Value |= op;
6827 // op: Mu2
6828 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6829 op &= UINT64_C(1);
6830 op <<= 13;
6831 Value |= op;
6832 // op: Rdd32
6833 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6834 op &= UINT64_C(31);
6835 Value |= op;
6836 // op: Rx32
6837 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6838 op &= UINT64_C(31);
6839 op <<= 16;
6840 Value |= op;
6841 break;
6842 }
6843 case Hexagon::L2_loadrd_pi: {
6844 // op: Ii
6845 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6846 op &= UINT64_C(120);
6847 op <<= 2;
6848 Value |= op;
6849 // op: Rdd32
6850 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6851 op &= UINT64_C(31);
6852 Value |= op;
6853 // op: Rx32
6854 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6855 op &= UINT64_C(31);
6856 op <<= 16;
6857 Value |= op;
6858 break;
6859 }
6860 case Hexagon::L2_ploadrhf_io:
6861 case Hexagon::L2_ploadrhfnew_io:
6862 case Hexagon::L2_ploadrht_io:
6863 case Hexagon::L2_ploadrhtnew_io:
6864 case Hexagon::L2_ploadruhf_io:
6865 case Hexagon::L2_ploadruhfnew_io:
6866 case Hexagon::L2_ploadruht_io:
6867 case Hexagon::L2_ploadruhtnew_io: {
6868 // op: Ii
6869 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6870 op &= UINT64_C(126);
6871 op <<= 4;
6872 Value |= op;
6873 // op: Pt4
6874 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6875 op &= UINT64_C(3);
6876 op <<= 11;
6877 Value |= op;
6878 // op: Rs32
6879 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6880 op &= UINT64_C(31);
6881 op <<= 16;
6882 Value |= op;
6883 // op: Rd32
6884 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6885 op &= UINT64_C(31);
6886 Value |= op;
6887 break;
6888 }
6889 case Hexagon::S2_pstorerbnewf_pi:
6890 case Hexagon::S2_pstorerbnewfnew_pi:
6891 case Hexagon::S2_pstorerbnewt_pi:
6892 case Hexagon::S2_pstorerbnewtnew_pi: {
6893 // op: Ii
6894 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6895 op &= UINT64_C(15);
6896 op <<= 3;
6897 Value |= op;
6898 // op: Pv4
6899 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6900 op &= UINT64_C(3);
6901 Value |= op;
6902 // op: Nt8
6903 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6904 op &= UINT64_C(7);
6905 op <<= 8;
6906 Value |= op;
6907 // op: Rx32
6908 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6909 op &= UINT64_C(31);
6910 op <<= 16;
6911 Value |= op;
6912 break;
6913 }
6914 case Hexagon::S2_pstorerbf_pi:
6915 case Hexagon::S2_pstorerbfnew_pi:
6916 case Hexagon::S2_pstorerbt_pi:
6917 case Hexagon::S2_pstorerbtnew_pi: {
6918 // op: Ii
6919 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6920 op &= UINT64_C(15);
6921 op <<= 3;
6922 Value |= op;
6923 // op: Pv4
6924 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6925 op &= UINT64_C(3);
6926 Value |= op;
6927 // op: Rt32
6928 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6929 op &= UINT64_C(31);
6930 op <<= 8;
6931 Value |= op;
6932 // op: Rx32
6933 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6934 op &= UINT64_C(31);
6935 op <<= 16;
6936 Value |= op;
6937 break;
6938 }
6939 case Hexagon::L2_loadrb_pci:
6940 case Hexagon::L2_loadrub_pci: {
6941 // op: Ii
6942 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6943 op &= UINT64_C(15);
6944 op <<= 5;
6945 Value |= op;
6946 // op: Mu2
6947 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6948 op &= UINT64_C(1);
6949 op <<= 13;
6950 Value |= op;
6951 // op: Rd32
6952 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6953 op &= UINT64_C(31);
6954 Value |= op;
6955 // op: Rx32
6956 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6957 op &= UINT64_C(31);
6958 op <<= 16;
6959 Value |= op;
6960 break;
6961 }
6962 case Hexagon::L2_loadrb_pi:
6963 case Hexagon::L2_loadrub_pi: {
6964 // op: Ii
6965 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6966 op &= UINT64_C(15);
6967 op <<= 5;
6968 Value |= op;
6969 // op: Rd32
6970 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6971 op &= UINT64_C(31);
6972 Value |= op;
6973 // op: Rx32
6974 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6975 op &= UINT64_C(31);
6976 op <<= 16;
6977 Value |= op;
6978 break;
6979 }
6980 case Hexagon::L2_ploadrif_io:
6981 case Hexagon::L2_ploadrifnew_io:
6982 case Hexagon::L2_ploadrit_io:
6983 case Hexagon::L2_ploadritnew_io: {
6984 // op: Ii
6985 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6986 op &= UINT64_C(252);
6987 op <<= 3;
6988 Value |= op;
6989 // op: Pt4
6990 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6991 op &= UINT64_C(3);
6992 op <<= 11;
6993 Value |= op;
6994 // op: Rs32
6995 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6996 op &= UINT64_C(31);
6997 op <<= 16;
6998 Value |= op;
6999 // op: Rd32
7000 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7001 op &= UINT64_C(31);
7002 Value |= op;
7003 break;
7004 }
7005 case Hexagon::A2_paddif:
7006 case Hexagon::A2_paddifnew:
7007 case Hexagon::A2_paddit:
7008 case Hexagon::A2_padditnew:
7009 case Hexagon::C2_muxir: {
7010 // op: Ii
7011 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7012 op &= UINT64_C(255);
7013 op <<= 5;
7014 Value |= op;
7015 // op: Pu4
7016 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7017 op &= UINT64_C(3);
7018 op <<= 21;
7019 Value |= op;
7020 // op: Rs32
7021 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7022 op &= UINT64_C(31);
7023 op <<= 16;
7024 Value |= op;
7025 // op: Rd32
7026 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7027 op &= UINT64_C(31);
7028 Value |= op;
7029 break;
7030 }
7031 case Hexagon::M2_accii:
7032 case Hexagon::M2_macsin:
7033 case Hexagon::M2_macsip:
7034 case Hexagon::M2_naccii: {
7035 // op: Ii
7036 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7037 op &= UINT64_C(255);
7038 op <<= 5;
7039 Value |= op;
7040 // op: Rs32
7041 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7042 op &= UINT64_C(31);
7043 op <<= 16;
7044 Value |= op;
7045 // op: Rx32
7046 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7047 op &= UINT64_C(31);
7048 Value |= op;
7049 break;
7050 }
7051 case Hexagon::S2_pstorerhnewf_pi:
7052 case Hexagon::S2_pstorerhnewfnew_pi:
7053 case Hexagon::S2_pstorerhnewt_pi:
7054 case Hexagon::S2_pstorerhnewtnew_pi: {
7055 // op: Ii
7056 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7057 op &= UINT64_C(30);
7058 op <<= 2;
7059 Value |= op;
7060 // op: Pv4
7061 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7062 op &= UINT64_C(3);
7063 Value |= op;
7064 // op: Nt8
7065 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7066 op &= UINT64_C(7);
7067 op <<= 8;
7068 Value |= op;
7069 // op: Rx32
7070 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7071 op &= UINT64_C(31);
7072 op <<= 16;
7073 Value |= op;
7074 break;
7075 }
7076 case Hexagon::S2_pstorerff_pi:
7077 case Hexagon::S2_pstorerffnew_pi:
7078 case Hexagon::S2_pstorerft_pi:
7079 case Hexagon::S2_pstorerftnew_pi:
7080 case Hexagon::S2_pstorerhf_pi:
7081 case Hexagon::S2_pstorerhfnew_pi:
7082 case Hexagon::S2_pstorerht_pi:
7083 case Hexagon::S2_pstorerhtnew_pi: {
7084 // op: Ii
7085 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7086 op &= UINT64_C(30);
7087 op <<= 2;
7088 Value |= op;
7089 // op: Pv4
7090 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7091 op &= UINT64_C(3);
7092 Value |= op;
7093 // op: Rt32
7094 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7095 op &= UINT64_C(31);
7096 op <<= 8;
7097 Value |= op;
7098 // op: Rx32
7099 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7100 op &= UINT64_C(31);
7101 op <<= 16;
7102 Value |= op;
7103 break;
7104 }
7105 case Hexagon::L2_loadbsw2_pci:
7106 case Hexagon::L2_loadbzw2_pci:
7107 case Hexagon::L2_loadrh_pci:
7108 case Hexagon::L2_loadruh_pci: {
7109 // op: Ii
7110 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7111 op &= UINT64_C(30);
7112 op <<= 4;
7113 Value |= op;
7114 // op: Mu2
7115 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7116 op &= UINT64_C(1);
7117 op <<= 13;
7118 Value |= op;
7119 // op: Rd32
7120 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7121 op &= UINT64_C(31);
7122 Value |= op;
7123 // op: Rx32
7124 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7125 op &= UINT64_C(31);
7126 op <<= 16;
7127 Value |= op;
7128 break;
7129 }
7130 case Hexagon::L2_loadbsw2_pi:
7131 case Hexagon::L2_loadbzw2_pi:
7132 case Hexagon::L2_loadrh_pi:
7133 case Hexagon::L2_loadruh_pi: {
7134 // op: Ii
7135 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7136 op &= UINT64_C(30);
7137 op <<= 4;
7138 Value |= op;
7139 // op: Rd32
7140 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7141 op &= UINT64_C(31);
7142 Value |= op;
7143 // op: Rx32
7144 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7145 op &= UINT64_C(31);
7146 op <<= 16;
7147 Value |= op;
7148 break;
7149 }
7150 case Hexagon::S2_insert: {
7151 // op: Ii
7152 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7153 op &= UINT64_C(31);
7154 op <<= 8;
7155 Value |= op;
7156 // op: II
7157 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7158 Value |= (op & UINT64_C(24)) << 18;
7159 Value |= (op & UINT64_C(7)) << 5;
7160 // op: Rs32
7161 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7162 op &= UINT64_C(31);
7163 op <<= 16;
7164 Value |= op;
7165 // op: Rx32
7166 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7167 op &= UINT64_C(31);
7168 Value |= op;
7169 break;
7170 }
7171 case Hexagon::S2_asl_i_r_acc:
7172 case Hexagon::S2_asl_i_r_and:
7173 case Hexagon::S2_asl_i_r_nac:
7174 case Hexagon::S2_asl_i_r_or:
7175 case Hexagon::S2_asl_i_r_xacc:
7176 case Hexagon::S2_asr_i_r_acc:
7177 case Hexagon::S2_asr_i_r_and:
7178 case Hexagon::S2_asr_i_r_nac:
7179 case Hexagon::S2_asr_i_r_or:
7180 case Hexagon::S2_lsr_i_r_acc:
7181 case Hexagon::S2_lsr_i_r_and:
7182 case Hexagon::S2_lsr_i_r_nac:
7183 case Hexagon::S2_lsr_i_r_or:
7184 case Hexagon::S2_lsr_i_r_xacc:
7185 case Hexagon::S6_rol_i_r_acc:
7186 case Hexagon::S6_rol_i_r_and:
7187 case Hexagon::S6_rol_i_r_nac:
7188 case Hexagon::S6_rol_i_r_or:
7189 case Hexagon::S6_rol_i_r_xacc: {
7190 // op: Ii
7191 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7192 op &= UINT64_C(31);
7193 op <<= 8;
7194 Value |= op;
7195 // op: Rs32
7196 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7197 op &= UINT64_C(31);
7198 op <<= 16;
7199 Value |= op;
7200 // op: Rx32
7201 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7202 op &= UINT64_C(31);
7203 Value |= op;
7204 break;
7205 }
7206 case Hexagon::L2_ploadrdf_io:
7207 case Hexagon::L2_ploadrdfnew_io:
7208 case Hexagon::L2_ploadrdt_io:
7209 case Hexagon::L2_ploadrdtnew_io: {
7210 // op: Ii
7211 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7212 op &= UINT64_C(504);
7213 op <<= 2;
7214 Value |= op;
7215 // op: Pt4
7216 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7217 op &= UINT64_C(3);
7218 op <<= 11;
7219 Value |= op;
7220 // op: Rs32
7221 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7222 op &= UINT64_C(31);
7223 op <<= 16;
7224 Value |= op;
7225 // op: Rdd32
7226 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7227 op &= UINT64_C(31);
7228 Value |= op;
7229 break;
7230 }
7231 case Hexagon::S2_pstorerinewf_pi:
7232 case Hexagon::S2_pstorerinewfnew_pi:
7233 case Hexagon::S2_pstorerinewt_pi:
7234 case Hexagon::S2_pstorerinewtnew_pi: {
7235 // op: Ii
7236 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7237 op &= UINT64_C(60);
7238 op <<= 1;
7239 Value |= op;
7240 // op: Pv4
7241 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7242 op &= UINT64_C(3);
7243 Value |= op;
7244 // op: Nt8
7245 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7246 op &= UINT64_C(7);
7247 op <<= 8;
7248 Value |= op;
7249 // op: Rx32
7250 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7251 op &= UINT64_C(31);
7252 op <<= 16;
7253 Value |= op;
7254 break;
7255 }
7256 case Hexagon::S2_pstorerif_pi:
7257 case Hexagon::S2_pstorerifnew_pi:
7258 case Hexagon::S2_pstorerit_pi:
7259 case Hexagon::S2_pstoreritnew_pi: {
7260 // op: Ii
7261 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7262 op &= UINT64_C(60);
7263 op <<= 1;
7264 Value |= op;
7265 // op: Pv4
7266 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7267 op &= UINT64_C(3);
7268 Value |= op;
7269 // op: Rt32
7270 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7271 op &= UINT64_C(31);
7272 op <<= 8;
7273 Value |= op;
7274 // op: Rx32
7275 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7276 op &= UINT64_C(31);
7277 op <<= 16;
7278 Value |= op;
7279 break;
7280 }
7281 case Hexagon::L2_loadri_pci: {
7282 // op: Ii
7283 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7284 op &= UINT64_C(60);
7285 op <<= 3;
7286 Value |= op;
7287 // op: Mu2
7288 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7289 op &= UINT64_C(1);
7290 op <<= 13;
7291 Value |= op;
7292 // op: Rd32
7293 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7294 op &= UINT64_C(31);
7295 Value |= op;
7296 // op: Rx32
7297 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7298 op &= UINT64_C(31);
7299 op <<= 16;
7300 Value |= op;
7301 break;
7302 }
7303 case Hexagon::L2_loadbsw4_pci:
7304 case Hexagon::L2_loadbzw4_pci: {
7305 // op: Ii
7306 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7307 op &= UINT64_C(60);
7308 op <<= 3;
7309 Value |= op;
7310 // op: Mu2
7311 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7312 op &= UINT64_C(1);
7313 op <<= 13;
7314 Value |= op;
7315 // op: Rdd32
7316 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7317 op &= UINT64_C(31);
7318 Value |= op;
7319 // op: Rx32
7320 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7321 op &= UINT64_C(31);
7322 op <<= 16;
7323 Value |= op;
7324 break;
7325 }
7326 case Hexagon::L2_loadri_pi: {
7327 // op: Ii
7328 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7329 op &= UINT64_C(60);
7330 op <<= 3;
7331 Value |= op;
7332 // op: Rd32
7333 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7334 op &= UINT64_C(31);
7335 Value |= op;
7336 // op: Rx32
7337 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7338 op &= UINT64_C(31);
7339 op <<= 16;
7340 Value |= op;
7341 break;
7342 }
7343 case Hexagon::L2_loadbsw4_pi:
7344 case Hexagon::L2_loadbzw4_pi: {
7345 // op: Ii
7346 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7347 op &= UINT64_C(60);
7348 op <<= 3;
7349 Value |= op;
7350 // op: Rdd32
7351 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7352 op &= UINT64_C(31);
7353 Value |= op;
7354 // op: Rx32
7355 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7356 op &= UINT64_C(31);
7357 op <<= 16;
7358 Value |= op;
7359 break;
7360 }
7361 case Hexagon::L2_ploadrbf_io:
7362 case Hexagon::L2_ploadrbfnew_io:
7363 case Hexagon::L2_ploadrbt_io:
7364 case Hexagon::L2_ploadrbtnew_io:
7365 case Hexagon::L2_ploadrubf_io:
7366 case Hexagon::L2_ploadrubfnew_io:
7367 case Hexagon::L2_ploadrubt_io:
7368 case Hexagon::L2_ploadrubtnew_io: {
7369 // op: Ii
7370 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7371 op &= UINT64_C(63);
7372 op <<= 5;
7373 Value |= op;
7374 // op: Pt4
7375 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7376 op &= UINT64_C(3);
7377 op <<= 11;
7378 Value |= op;
7379 // op: Rs32
7380 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7381 op &= UINT64_C(31);
7382 op <<= 16;
7383 Value |= op;
7384 // op: Rd32
7385 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7386 op &= UINT64_C(31);
7387 Value |= op;
7388 break;
7389 }
7390 case Hexagon::S2_insertp: {
7391 // op: Ii
7392 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7393 op &= UINT64_C(63);
7394 op <<= 8;
7395 Value |= op;
7396 // op: II
7397 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7398 Value |= (op & UINT64_C(56)) << 18;
7399 Value |= (op & UINT64_C(7)) << 5;
7400 // op: Rss32
7401 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7402 op &= UINT64_C(31);
7403 op <<= 16;
7404 Value |= op;
7405 // op: Rxx32
7406 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7407 op &= UINT64_C(31);
7408 Value |= op;
7409 break;
7410 }
7411 case Hexagon::S2_asl_i_p_acc:
7412 case Hexagon::S2_asl_i_p_and:
7413 case Hexagon::S2_asl_i_p_nac:
7414 case Hexagon::S2_asl_i_p_or:
7415 case Hexagon::S2_asl_i_p_xacc:
7416 case Hexagon::S2_asr_i_p_acc:
7417 case Hexagon::S2_asr_i_p_and:
7418 case Hexagon::S2_asr_i_p_nac:
7419 case Hexagon::S2_asr_i_p_or:
7420 case Hexagon::S2_lsr_i_p_acc:
7421 case Hexagon::S2_lsr_i_p_and:
7422 case Hexagon::S2_lsr_i_p_nac:
7423 case Hexagon::S2_lsr_i_p_or:
7424 case Hexagon::S2_lsr_i_p_xacc:
7425 case Hexagon::S6_rol_i_p_acc:
7426 case Hexagon::S6_rol_i_p_and:
7427 case Hexagon::S6_rol_i_p_nac:
7428 case Hexagon::S6_rol_i_p_or:
7429 case Hexagon::S6_rol_i_p_xacc: {
7430 // op: Ii
7431 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7432 op &= UINT64_C(63);
7433 op <<= 8;
7434 Value |= op;
7435 // op: Rss32
7436 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7437 op &= UINT64_C(31);
7438 op <<= 16;
7439 Value |= op;
7440 // op: Rxx32
7441 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7442 op &= UINT64_C(31);
7443 Value |= op;
7444 break;
7445 }
7446 case Hexagon::S2_vspliceib: {
7447 // op: Ii
7448 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7449 op &= UINT64_C(7);
7450 op <<= 5;
7451 Value |= op;
7452 // op: Rss32
7453 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7454 op &= UINT64_C(31);
7455 op <<= 16;
7456 Value |= op;
7457 // op: Rtt32
7458 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7459 op &= UINT64_C(31);
7460 op <<= 8;
7461 Value |= op;
7462 // op: Rdd32
7463 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7464 op &= UINT64_C(31);
7465 Value |= op;
7466 break;
7467 }
7468 case Hexagon::S2_addasl_rrri: {
7469 // op: Ii
7470 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7471 op &= UINT64_C(7);
7472 op <<= 5;
7473 Value |= op;
7474 // op: Rt32
7475 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7476 op &= UINT64_C(31);
7477 op <<= 8;
7478 Value |= op;
7479 // op: Rs32
7480 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7481 op &= UINT64_C(31);
7482 op <<= 16;
7483 Value |= op;
7484 // op: Rd32
7485 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7486 op &= UINT64_C(31);
7487 Value |= op;
7488 break;
7489 }
7490 case Hexagon::S2_valignib: {
7491 // op: Ii
7492 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7493 op &= UINT64_C(7);
7494 op <<= 5;
7495 Value |= op;
7496 // op: Rtt32
7497 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7498 op &= UINT64_C(31);
7499 op <<= 8;
7500 Value |= op;
7501 // op: Rss32
7502 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7503 op &= UINT64_C(31);
7504 op <<= 16;
7505 Value |= op;
7506 // op: Rdd32
7507 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7508 op &= UINT64_C(31);
7509 Value |= op;
7510 break;
7511 }
7512 case Hexagon::V6_valignbi:
7513 case Hexagon::V6_vlalignbi:
7514 case Hexagon::V6_vlutvvbi: {
7515 // op: Ii
7516 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7517 op &= UINT64_C(7);
7518 op <<= 5;
7519 Value |= op;
7520 // op: Vu32
7521 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7522 op &= UINT64_C(31);
7523 op <<= 8;
7524 Value |= op;
7525 // op: Vv32
7526 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7527 op &= UINT64_C(31);
7528 op <<= 16;
7529 Value |= op;
7530 // op: Vd32
7531 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7532 op &= UINT64_C(31);
7533 Value |= op;
7534 break;
7535 }
7536 case Hexagon::V6_vlutvwhi: {
7537 // op: Ii
7538 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7539 op &= UINT64_C(7);
7540 op <<= 5;
7541 Value |= op;
7542 // op: Vu32
7543 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7544 op &= UINT64_C(31);
7545 op <<= 8;
7546 Value |= op;
7547 // op: Vv32
7548 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7549 op &= UINT64_C(31);
7550 op <<= 16;
7551 Value |= op;
7552 // op: Vdd32
7553 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7554 op &= UINT64_C(31);
7555 Value |= op;
7556 break;
7557 }
7558 case Hexagon::V6_vS32b_new_npred_pi:
7559 case Hexagon::V6_vS32b_new_pred_pi:
7560 case Hexagon::V6_vS32b_nt_new_npred_pi:
7561 case Hexagon::V6_vS32b_nt_new_pred_pi: {
7562 // op: Ii
7563 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7564 op &= UINT64_C(7);
7565 op <<= 8;
7566 Value |= op;
7567 // op: Pv4
7568 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7569 op &= UINT64_C(3);
7570 op <<= 11;
7571 Value |= op;
7572 // op: Os8
7573 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7574 op &= UINT64_C(7);
7575 Value |= op;
7576 // op: Rx32
7577 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7578 op &= UINT64_C(31);
7579 op <<= 16;
7580 Value |= op;
7581 break;
7582 }
7583 case Hexagon::V6_zLd_pred_pi: {
7584 // op: Ii
7585 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7586 op &= UINT64_C(7);
7587 op <<= 8;
7588 Value |= op;
7589 // op: Pv4
7590 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7591 op &= UINT64_C(3);
7592 op <<= 11;
7593 Value |= op;
7594 // op: Rx32
7595 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7596 op &= UINT64_C(31);
7597 op <<= 16;
7598 Value |= op;
7599 break;
7600 }
7601 case Hexagon::V6_vS32Ub_npred_pi:
7602 case Hexagon::V6_vS32Ub_pred_pi:
7603 case Hexagon::V6_vS32b_npred_pi:
7604 case Hexagon::V6_vS32b_nt_npred_pi:
7605 case Hexagon::V6_vS32b_nt_pred_pi:
7606 case Hexagon::V6_vS32b_pred_pi: {
7607 // op: Ii
7608 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7609 op &= UINT64_C(7);
7610 op <<= 8;
7611 Value |= op;
7612 // op: Pv4
7613 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7614 op &= UINT64_C(3);
7615 op <<= 11;
7616 Value |= op;
7617 // op: Vs32
7618 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7619 op &= UINT64_C(31);
7620 Value |= op;
7621 // op: Rx32
7622 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7623 op &= UINT64_C(31);
7624 op <<= 16;
7625 Value |= op;
7626 break;
7627 }
7628 case Hexagon::V6_vS32b_nqpred_pi:
7629 case Hexagon::V6_vS32b_nt_nqpred_pi:
7630 case Hexagon::V6_vS32b_nt_qpred_pi:
7631 case Hexagon::V6_vS32b_qpred_pi: {
7632 // op: Ii
7633 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7634 op &= UINT64_C(7);
7635 op <<= 8;
7636 Value |= op;
7637 // op: Qv4
7638 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7639 op &= UINT64_C(3);
7640 op <<= 11;
7641 Value |= op;
7642 // op: Vs32
7643 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7644 op &= UINT64_C(31);
7645 Value |= op;
7646 // op: Rx32
7647 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7648 op &= UINT64_C(31);
7649 op <<= 16;
7650 Value |= op;
7651 break;
7652 }
7653 case Hexagon::V6_vL32Ub_pi:
7654 case Hexagon::V6_vL32b_cur_pi:
7655 case Hexagon::V6_vL32b_nt_cur_pi:
7656 case Hexagon::V6_vL32b_nt_pi:
7657 case Hexagon::V6_vL32b_nt_tmp_pi:
7658 case Hexagon::V6_vL32b_pi:
7659 case Hexagon::V6_vL32b_tmp_pi: {
7660 // op: Ii
7661 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7662 op &= UINT64_C(7);
7663 op <<= 8;
7664 Value |= op;
7665 // op: Vd32
7666 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7667 op &= UINT64_C(31);
7668 Value |= op;
7669 // op: Rx32
7670 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7671 op &= UINT64_C(31);
7672 op <<= 16;
7673 Value |= op;
7674 break;
7675 }
7676 case Hexagon::S4_vrcrotate_acc: {
7677 // op: Ii
7678 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7679 Value |= (op & UINT64_C(2)) << 12;
7680 Value |= (op & UINT64_C(1)) << 5;
7681 // op: Rss32
7682 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7683 op &= UINT64_C(31);
7684 op <<= 16;
7685 Value |= op;
7686 // op: Rt32
7687 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7688 op &= UINT64_C(31);
7689 op <<= 8;
7690 Value |= op;
7691 // op: Rxx32
7692 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7693 op &= UINT64_C(31);
7694 Value |= op;
7695 break;
7696 }
7697 case Hexagon::L4_ploadrbf_rr:
7698 case Hexagon::L4_ploadrbfnew_rr:
7699 case Hexagon::L4_ploadrbt_rr:
7700 case Hexagon::L4_ploadrbtnew_rr:
7701 case Hexagon::L4_ploadrhf_rr:
7702 case Hexagon::L4_ploadrhfnew_rr:
7703 case Hexagon::L4_ploadrht_rr:
7704 case Hexagon::L4_ploadrhtnew_rr:
7705 case Hexagon::L4_ploadrif_rr:
7706 case Hexagon::L4_ploadrifnew_rr:
7707 case Hexagon::L4_ploadrit_rr:
7708 case Hexagon::L4_ploadritnew_rr:
7709 case Hexagon::L4_ploadrubf_rr:
7710 case Hexagon::L4_ploadrubfnew_rr:
7711 case Hexagon::L4_ploadrubt_rr:
7712 case Hexagon::L4_ploadrubtnew_rr:
7713 case Hexagon::L4_ploadruhf_rr:
7714 case Hexagon::L4_ploadruhfnew_rr:
7715 case Hexagon::L4_ploadruht_rr:
7716 case Hexagon::L4_ploadruhtnew_rr: {
7717 // op: Ii
7718 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7719 Value |= (op & UINT64_C(2)) << 12;
7720 Value |= (op & UINT64_C(1)) << 7;
7721 // op: Pv4
7722 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7723 op &= UINT64_C(3);
7724 op <<= 5;
7725 Value |= op;
7726 // op: Rs32
7727 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7728 op &= UINT64_C(31);
7729 op <<= 16;
7730 Value |= op;
7731 // op: Rt32
7732 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7733 op &= UINT64_C(31);
7734 op <<= 8;
7735 Value |= op;
7736 // op: Rd32
7737 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7738 op &= UINT64_C(31);
7739 Value |= op;
7740 break;
7741 }
7742 case Hexagon::L4_ploadrdf_rr:
7743 case Hexagon::L4_ploadrdfnew_rr:
7744 case Hexagon::L4_ploadrdt_rr:
7745 case Hexagon::L4_ploadrdtnew_rr: {
7746 // op: Ii
7747 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7748 Value |= (op & UINT64_C(2)) << 12;
7749 Value |= (op & UINT64_C(1)) << 7;
7750 // op: Pv4
7751 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7752 op &= UINT64_C(3);
7753 op <<= 5;
7754 Value |= op;
7755 // op: Rs32
7756 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7757 op &= UINT64_C(31);
7758 op <<= 16;
7759 Value |= op;
7760 // op: Rt32
7761 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7762 op &= UINT64_C(31);
7763 op <<= 8;
7764 Value |= op;
7765 // op: Rdd32
7766 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7767 op &= UINT64_C(31);
7768 Value |= op;
7769 break;
7770 }
7771 case Hexagon::V6_vrmpybusi_acc:
7772 case Hexagon::V6_vrmpyubi_acc:
7773 case Hexagon::V6_vrsadubi_acc: {
7774 // op: Ii
7775 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7776 op &= UINT64_C(1);
7777 op <<= 5;
7778 Value |= op;
7779 // op: Vuu32
7780 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7781 op &= UINT64_C(31);
7782 op <<= 8;
7783 Value |= op;
7784 // op: Rt32
7785 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7786 op &= UINT64_C(31);
7787 op <<= 16;
7788 Value |= op;
7789 // op: Vxx32
7790 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7791 op &= UINT64_C(31);
7792 Value |= op;
7793 break;
7794 }
7795 case Hexagon::L2_ploadrdf_pi:
7796 case Hexagon::L2_ploadrdfnew_pi:
7797 case Hexagon::L2_ploadrdt_pi:
7798 case Hexagon::L2_ploadrdtnew_pi: {
7799 // op: Ii
7800 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7801 op &= UINT64_C(120);
7802 op <<= 2;
7803 Value |= op;
7804 // op: Pt4
7805 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7806 op &= UINT64_C(3);
7807 op <<= 9;
7808 Value |= op;
7809 // op: Rdd32
7810 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7811 op &= UINT64_C(31);
7812 Value |= op;
7813 // op: Rx32
7814 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7815 op &= UINT64_C(31);
7816 op <<= 16;
7817 Value |= op;
7818 break;
7819 }
7820 case Hexagon::L2_loadalignb_pci: {
7821 // op: Ii
7822 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7823 op &= UINT64_C(15);
7824 op <<= 5;
7825 Value |= op;
7826 // op: Mu2
7827 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
7828 op &= UINT64_C(1);
7829 op <<= 13;
7830 Value |= op;
7831 // op: Ryy32
7832 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7833 op &= UINT64_C(31);
7834 Value |= op;
7835 // op: Rx32
7836 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7837 op &= UINT64_C(31);
7838 op <<= 16;
7839 Value |= op;
7840 break;
7841 }
7842 case Hexagon::L2_ploadrbf_pi:
7843 case Hexagon::L2_ploadrbfnew_pi:
7844 case Hexagon::L2_ploadrbt_pi:
7845 case Hexagon::L2_ploadrbtnew_pi:
7846 case Hexagon::L2_ploadrubf_pi:
7847 case Hexagon::L2_ploadrubfnew_pi:
7848 case Hexagon::L2_ploadrubt_pi:
7849 case Hexagon::L2_ploadrubtnew_pi: {
7850 // op: Ii
7851 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7852 op &= UINT64_C(15);
7853 op <<= 5;
7854 Value |= op;
7855 // op: Pt4
7856 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7857 op &= UINT64_C(3);
7858 op <<= 9;
7859 Value |= op;
7860 // op: Rd32
7861 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7862 op &= UINT64_C(31);
7863 Value |= op;
7864 // op: Rx32
7865 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7866 op &= UINT64_C(31);
7867 op <<= 16;
7868 Value |= op;
7869 break;
7870 }
7871 case Hexagon::L2_loadalignb_pi: {
7872 // op: Ii
7873 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7874 op &= UINT64_C(15);
7875 op <<= 5;
7876 Value |= op;
7877 // op: Ryy32
7878 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7879 op &= UINT64_C(31);
7880 Value |= op;
7881 // op: Rx32
7882 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7883 op &= UINT64_C(31);
7884 op <<= 16;
7885 Value |= op;
7886 break;
7887 }
7888 case Hexagon::L2_loadalignh_pci: {
7889 // op: Ii
7890 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7891 op &= UINT64_C(30);
7892 op <<= 4;
7893 Value |= op;
7894 // op: Mu2
7895 op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
7896 op &= UINT64_C(1);
7897 op <<= 13;
7898 Value |= op;
7899 // op: Ryy32
7900 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7901 op &= UINT64_C(31);
7902 Value |= op;
7903 // op: Rx32
7904 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7905 op &= UINT64_C(31);
7906 op <<= 16;
7907 Value |= op;
7908 break;
7909 }
7910 case Hexagon::L2_ploadrhf_pi:
7911 case Hexagon::L2_ploadrhfnew_pi:
7912 case Hexagon::L2_ploadrht_pi:
7913 case Hexagon::L2_ploadrhtnew_pi:
7914 case Hexagon::L2_ploadruhf_pi:
7915 case Hexagon::L2_ploadruhfnew_pi:
7916 case Hexagon::L2_ploadruht_pi:
7917 case Hexagon::L2_ploadruhtnew_pi: {
7918 // op: Ii
7919 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7920 op &= UINT64_C(30);
7921 op <<= 4;
7922 Value |= op;
7923 // op: Pt4
7924 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7925 op &= UINT64_C(3);
7926 op <<= 9;
7927 Value |= op;
7928 // op: Rd32
7929 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7930 op &= UINT64_C(31);
7931 Value |= op;
7932 // op: Rx32
7933 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7934 op &= UINT64_C(31);
7935 op <<= 16;
7936 Value |= op;
7937 break;
7938 }
7939 case Hexagon::L2_loadalignh_pi: {
7940 // op: Ii
7941 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7942 op &= UINT64_C(30);
7943 op <<= 4;
7944 Value |= op;
7945 // op: Ryy32
7946 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7947 op &= UINT64_C(31);
7948 Value |= op;
7949 // op: Rx32
7950 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7951 op &= UINT64_C(31);
7952 op <<= 16;
7953 Value |= op;
7954 break;
7955 }
7956 case Hexagon::L2_ploadrif_pi:
7957 case Hexagon::L2_ploadrifnew_pi:
7958 case Hexagon::L2_ploadrit_pi:
7959 case Hexagon::L2_ploadritnew_pi: {
7960 // op: Ii
7961 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7962 op &= UINT64_C(60);
7963 op <<= 3;
7964 Value |= op;
7965 // op: Pt4
7966 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7967 op &= UINT64_C(3);
7968 op <<= 9;
7969 Value |= op;
7970 // op: Rd32
7971 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7972 op &= UINT64_C(31);
7973 Value |= op;
7974 // op: Rx32
7975 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7976 op &= UINT64_C(31);
7977 op <<= 16;
7978 Value |= op;
7979 break;
7980 }
7981 case Hexagon::V6_vlutvvb_oracci: {
7982 // op: Ii
7983 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7984 op &= UINT64_C(7);
7985 op <<= 5;
7986 Value |= op;
7987 // op: Vu32
7988 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7989 op &= UINT64_C(31);
7990 op <<= 8;
7991 Value |= op;
7992 // op: Vv32
7993 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7994 op &= UINT64_C(31);
7995 op <<= 16;
7996 Value |= op;
7997 // op: Vx32
7998 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7999 op &= UINT64_C(31);
8000 Value |= op;
8001 break;
8002 }
8003 case Hexagon::V6_vlutvwh_oracci: {
8004 // op: Ii
8005 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8006 op &= UINT64_C(7);
8007 op <<= 5;
8008 Value |= op;
8009 // op: Vu32
8010 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8011 op &= UINT64_C(31);
8012 op <<= 8;
8013 Value |= op;
8014 // op: Vv32
8015 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8016 op &= UINT64_C(31);
8017 op <<= 16;
8018 Value |= op;
8019 // op: Vxx32
8020 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8021 op &= UINT64_C(31);
8022 Value |= op;
8023 break;
8024 }
8025 case Hexagon::V6_vL32b_cur_npred_pi:
8026 case Hexagon::V6_vL32b_cur_pred_pi:
8027 case Hexagon::V6_vL32b_npred_pi:
8028 case Hexagon::V6_vL32b_nt_cur_npred_pi:
8029 case Hexagon::V6_vL32b_nt_cur_pred_pi:
8030 case Hexagon::V6_vL32b_nt_npred_pi:
8031 case Hexagon::V6_vL32b_nt_pred_pi:
8032 case Hexagon::V6_vL32b_nt_tmp_npred_pi:
8033 case Hexagon::V6_vL32b_nt_tmp_pred_pi:
8034 case Hexagon::V6_vL32b_pred_pi:
8035 case Hexagon::V6_vL32b_tmp_npred_pi:
8036 case Hexagon::V6_vL32b_tmp_pred_pi: {
8037 // op: Ii
8038 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8039 op &= UINT64_C(7);
8040 op <<= 8;
8041 Value |= op;
8042 // op: Pv4
8043 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8044 op &= UINT64_C(3);
8045 op <<= 11;
8046 Value |= op;
8047 // op: Vd32
8048 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8049 op &= UINT64_C(31);
8050 Value |= op;
8051 // op: Rx32
8052 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8053 op &= UINT64_C(31);
8054 op <<= 16;
8055 Value |= op;
8056 break;
8057 }
8058 case Hexagon::S2_storerbnew_pbr:
8059 case Hexagon::S2_storerbnew_pcr:
8060 case Hexagon::S2_storerbnew_pr:
8061 case Hexagon::S2_storerhnew_pbr:
8062 case Hexagon::S2_storerhnew_pcr:
8063 case Hexagon::S2_storerhnew_pr:
8064 case Hexagon::S2_storerinew_pbr:
8065 case Hexagon::S2_storerinew_pcr:
8066 case Hexagon::S2_storerinew_pr: {
8067 // op: Mu2
8068 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8069 op &= UINT64_C(1);
8070 op <<= 13;
8071 Value |= op;
8072 // op: Nt8
8073 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8074 op &= UINT64_C(7);
8075 op <<= 8;
8076 Value |= op;
8077 // op: Rx32
8078 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8079 op &= UINT64_C(31);
8080 op <<= 16;
8081 Value |= op;
8082 break;
8083 }
8084 case Hexagon::V6_vS32b_new_ppu:
8085 case Hexagon::V6_vS32b_nt_new_ppu: {
8086 // op: Mu2
8087 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8088 op &= UINT64_C(1);
8089 op <<= 13;
8090 Value |= op;
8091 // op: Os8
8092 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8093 op &= UINT64_C(7);
8094 Value |= op;
8095 // op: Rx32
8096 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8097 op &= UINT64_C(31);
8098 op <<= 16;
8099 Value |= op;
8100 break;
8101 }
8102 case Hexagon::S2_storerb_pbr:
8103 case Hexagon::S2_storerb_pcr:
8104 case Hexagon::S2_storerb_pr:
8105 case Hexagon::S2_storerf_pbr:
8106 case Hexagon::S2_storerf_pcr:
8107 case Hexagon::S2_storerf_pr:
8108 case Hexagon::S2_storerh_pbr:
8109 case Hexagon::S2_storerh_pcr:
8110 case Hexagon::S2_storerh_pr:
8111 case Hexagon::S2_storeri_pbr:
8112 case Hexagon::S2_storeri_pcr:
8113 case Hexagon::S2_storeri_pr: {
8114 // op: Mu2
8115 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8116 op &= UINT64_C(1);
8117 op <<= 13;
8118 Value |= op;
8119 // op: Rt32
8120 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8121 op &= UINT64_C(31);
8122 op <<= 8;
8123 Value |= op;
8124 // op: Rx32
8125 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8126 op &= UINT64_C(31);
8127 op <<= 16;
8128 Value |= op;
8129 break;
8130 }
8131 case Hexagon::S2_storerd_pbr:
8132 case Hexagon::S2_storerd_pcr:
8133 case Hexagon::S2_storerd_pr: {
8134 // op: Mu2
8135 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8136 op &= UINT64_C(1);
8137 op <<= 13;
8138 Value |= op;
8139 // op: Rtt32
8140 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8141 op &= UINT64_C(31);
8142 op <<= 8;
8143 Value |= op;
8144 // op: Rx32
8145 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8146 op &= UINT64_C(31);
8147 op <<= 16;
8148 Value |= op;
8149 break;
8150 }
8151 case Hexagon::V6_vS32b_srls_ppu:
8152 case Hexagon::V6_zLd_ppu: {
8153 // op: Mu2
8154 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8155 op &= UINT64_C(1);
8156 op <<= 13;
8157 Value |= op;
8158 // op: Rx32
8159 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8160 op &= UINT64_C(31);
8161 op <<= 16;
8162 Value |= op;
8163 break;
8164 }
8165 case Hexagon::V6_vS32Ub_ppu:
8166 case Hexagon::V6_vS32b_nt_ppu:
8167 case Hexagon::V6_vS32b_ppu: {
8168 // op: Mu2
8169 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8170 op &= UINT64_C(1);
8171 op <<= 13;
8172 Value |= op;
8173 // op: Vs32
8174 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8175 op &= UINT64_C(31);
8176 Value |= op;
8177 // op: Rx32
8178 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8179 op &= UINT64_C(31);
8180 op <<= 16;
8181 Value |= op;
8182 break;
8183 }
8184 case Hexagon::L2_loadbsw2_pbr:
8185 case Hexagon::L2_loadbsw2_pcr:
8186 case Hexagon::L2_loadbsw2_pr:
8187 case Hexagon::L2_loadbzw2_pbr:
8188 case Hexagon::L2_loadbzw2_pcr:
8189 case Hexagon::L2_loadbzw2_pr:
8190 case Hexagon::L2_loadrb_pbr:
8191 case Hexagon::L2_loadrb_pcr:
8192 case Hexagon::L2_loadrb_pr:
8193 case Hexagon::L2_loadrh_pbr:
8194 case Hexagon::L2_loadrh_pcr:
8195 case Hexagon::L2_loadrh_pr:
8196 case Hexagon::L2_loadri_pbr:
8197 case Hexagon::L2_loadri_pcr:
8198 case Hexagon::L2_loadri_pr:
8199 case Hexagon::L2_loadrub_pbr:
8200 case Hexagon::L2_loadrub_pcr:
8201 case Hexagon::L2_loadrub_pr:
8202 case Hexagon::L2_loadruh_pbr:
8203 case Hexagon::L2_loadruh_pcr:
8204 case Hexagon::L2_loadruh_pr: {
8205 // op: Mu2
8206 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8207 op &= UINT64_C(1);
8208 op <<= 13;
8209 Value |= op;
8210 // op: Rd32
8211 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8212 op &= UINT64_C(31);
8213 Value |= op;
8214 // op: Rx32
8215 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8216 op &= UINT64_C(31);
8217 op <<= 16;
8218 Value |= op;
8219 break;
8220 }
8221 case Hexagon::L2_loadbsw4_pbr:
8222 case Hexagon::L2_loadbsw4_pcr:
8223 case Hexagon::L2_loadbsw4_pr:
8224 case Hexagon::L2_loadbzw4_pbr:
8225 case Hexagon::L2_loadbzw4_pcr:
8226 case Hexagon::L2_loadbzw4_pr:
8227 case Hexagon::L2_loadrd_pbr:
8228 case Hexagon::L2_loadrd_pcr:
8229 case Hexagon::L2_loadrd_pr: {
8230 // op: Mu2
8231 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8232 op &= UINT64_C(1);
8233 op <<= 13;
8234 Value |= op;
8235 // op: Rdd32
8236 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8237 op &= UINT64_C(31);
8238 Value |= op;
8239 // op: Rx32
8240 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8241 op &= UINT64_C(31);
8242 op <<= 16;
8243 Value |= op;
8244 break;
8245 }
8246 case Hexagon::V6_vL32Ub_ppu:
8247 case Hexagon::V6_vL32b_cur_ppu:
8248 case Hexagon::V6_vL32b_nt_cur_ppu:
8249 case Hexagon::V6_vL32b_nt_ppu:
8250 case Hexagon::V6_vL32b_nt_tmp_ppu:
8251 case Hexagon::V6_vL32b_ppu:
8252 case Hexagon::V6_vL32b_tmp_ppu: {
8253 // op: Mu2
8254 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8255 op &= UINT64_C(1);
8256 op <<= 13;
8257 Value |= op;
8258 // op: Vd32
8259 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8260 op &= UINT64_C(31);
8261 Value |= op;
8262 // op: Rx32
8263 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8264 op &= UINT64_C(31);
8265 op <<= 16;
8266 Value |= op;
8267 break;
8268 }
8269 case Hexagon::L2_loadalignb_pbr:
8270 case Hexagon::L2_loadalignb_pcr:
8271 case Hexagon::L2_loadalignb_pr:
8272 case Hexagon::L2_loadalignh_pbr:
8273 case Hexagon::L2_loadalignh_pcr:
8274 case Hexagon::L2_loadalignh_pr: {
8275 // op: Mu2
8276 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8277 op &= UINT64_C(1);
8278 op <<= 13;
8279 Value |= op;
8280 // op: Ryy32
8281 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8282 op &= UINT64_C(31);
8283 Value |= op;
8284 // op: Rx32
8285 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8286 op &= UINT64_C(31);
8287 op <<= 16;
8288 Value |= op;
8289 break;
8290 }
8291 case Hexagon::C2_all8:
8292 case Hexagon::C2_any8:
8293 case Hexagon::C2_not: {
8294 // op: Ps4
8295 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8296 op &= UINT64_C(3);
8297 op <<= 16;
8298 Value |= op;
8299 // op: Pd4
8300 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8301 op &= UINT64_C(3);
8302 Value |= op;
8303 break;
8304 }
8305 case Hexagon::C2_xor:
8306 case Hexagon::C4_fastcorner9:
8307 case Hexagon::C4_fastcorner9_not: {
8308 // op: Ps4
8309 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8310 op &= UINT64_C(3);
8311 op <<= 16;
8312 Value |= op;
8313 // op: Pt4
8314 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8315 op &= UINT64_C(3);
8316 op <<= 8;
8317 Value |= op;
8318 // op: Pd4
8319 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8320 op &= UINT64_C(3);
8321 Value |= op;
8322 break;
8323 }
8324 case Hexagon::C4_and_and:
8325 case Hexagon::C4_and_andn:
8326 case Hexagon::C4_and_or:
8327 case Hexagon::C4_and_orn:
8328 case Hexagon::C4_or_and:
8329 case Hexagon::C4_or_andn:
8330 case Hexagon::C4_or_or:
8331 case Hexagon::C4_or_orn: {
8332 // op: Ps4
8333 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8334 op &= UINT64_C(3);
8335 op <<= 16;
8336 Value |= op;
8337 // op: Pt4
8338 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8339 op &= UINT64_C(3);
8340 op <<= 8;
8341 Value |= op;
8342 // op: Pu4
8343 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8344 op &= UINT64_C(3);
8345 op <<= 6;
8346 Value |= op;
8347 // op: Pd4
8348 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8349 op &= UINT64_C(3);
8350 Value |= op;
8351 break;
8352 }
8353 case Hexagon::C2_vitpack: {
8354 // op: Ps4
8355 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8356 op &= UINT64_C(3);
8357 op <<= 16;
8358 Value |= op;
8359 // op: Pt4
8360 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8361 op &= UINT64_C(3);
8362 op <<= 8;
8363 Value |= op;
8364 // op: Rd32
8365 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8366 op &= UINT64_C(31);
8367 Value |= op;
8368 break;
8369 }
8370 case Hexagon::C2_tfrpr: {
8371 // op: Ps4
8372 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8373 op &= UINT64_C(3);
8374 op <<= 16;
8375 Value |= op;
8376 // op: Rd32
8377 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8378 op &= UINT64_C(31);
8379 Value |= op;
8380 break;
8381 }
8382 case Hexagon::V6_vcmov:
8383 case Hexagon::V6_vncmov: {
8384 // op: Ps4
8385 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8386 op &= UINT64_C(3);
8387 op <<= 5;
8388 Value |= op;
8389 // op: Vu32
8390 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8391 op &= UINT64_C(31);
8392 op <<= 8;
8393 Value |= op;
8394 // op: Vd32
8395 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8396 op &= UINT64_C(31);
8397 Value |= op;
8398 break;
8399 }
8400 case Hexagon::V6_vccombine:
8401 case Hexagon::V6_vnccombine: {
8402 // op: Ps4
8403 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8404 op &= UINT64_C(3);
8405 op <<= 5;
8406 Value |= op;
8407 // op: Vu32
8408 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8409 op &= UINT64_C(31);
8410 op <<= 8;
8411 Value |= op;
8412 // op: Vv32
8413 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8414 op &= UINT64_C(31);
8415 op <<= 16;
8416 Value |= op;
8417 // op: Vdd32
8418 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8419 op &= UINT64_C(31);
8420 Value |= op;
8421 break;
8422 }
8423 case Hexagon::C2_and:
8424 case Hexagon::C2_andn:
8425 case Hexagon::C2_or:
8426 case Hexagon::C2_orn: {
8427 // op: Pt4
8428 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8429 op &= UINT64_C(3);
8430 op <<= 8;
8431 Value |= op;
8432 // op: Ps4
8433 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8434 op &= UINT64_C(3);
8435 op <<= 16;
8436 Value |= op;
8437 // op: Pd4
8438 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8439 op &= UINT64_C(3);
8440 Value |= op;
8441 break;
8442 }
8443 case Hexagon::C2_mask: {
8444 // op: Pt4
8445 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8446 op &= UINT64_C(3);
8447 op <<= 8;
8448 Value |= op;
8449 // op: Rdd32
8450 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8451 op &= UINT64_C(31);
8452 Value |= op;
8453 break;
8454 }
8455 case Hexagon::J2_callrf:
8456 case Hexagon::J2_callrt:
8457 case Hexagon::J2_jumprf:
8458 case Hexagon::J2_jumprfnew:
8459 case Hexagon::J2_jumprfnewpt:
8460 case Hexagon::J2_jumprfpt:
8461 case Hexagon::J2_jumprt:
8462 case Hexagon::J2_jumprtnew:
8463 case Hexagon::J2_jumprtnewpt:
8464 case Hexagon::J2_jumprtpt: {
8465 // op: Pu4
8466 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8467 op &= UINT64_C(3);
8468 op <<= 8;
8469 Value |= op;
8470 // op: Rs32
8471 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8472 op &= UINT64_C(31);
8473 op <<= 16;
8474 Value |= op;
8475 break;
8476 }
8477 case Hexagon::A2_paddf:
8478 case Hexagon::A2_paddfnew:
8479 case Hexagon::A2_paddt:
8480 case Hexagon::A2_paddtnew:
8481 case Hexagon::A2_pandf:
8482 case Hexagon::A2_pandfnew:
8483 case Hexagon::A2_pandt:
8484 case Hexagon::A2_pandtnew:
8485 case Hexagon::A2_porf:
8486 case Hexagon::A2_porfnew:
8487 case Hexagon::A2_port:
8488 case Hexagon::A2_portnew:
8489 case Hexagon::A2_pxorf:
8490 case Hexagon::A2_pxorfnew:
8491 case Hexagon::A2_pxort:
8492 case Hexagon::A2_pxortnew:
8493 case Hexagon::C2_mux: {
8494 // op: Pu4
8495 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8496 op &= UINT64_C(3);
8497 op <<= 5;
8498 Value |= op;
8499 // op: Rs32
8500 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8501 op &= UINT64_C(31);
8502 op <<= 16;
8503 Value |= op;
8504 // op: Rt32
8505 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8506 op &= UINT64_C(31);
8507 op <<= 8;
8508 Value |= op;
8509 // op: Rd32
8510 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8511 op &= UINT64_C(31);
8512 Value |= op;
8513 break;
8514 }
8515 case Hexagon::C2_ccombinewf:
8516 case Hexagon::C2_ccombinewnewf:
8517 case Hexagon::C2_ccombinewnewt:
8518 case Hexagon::C2_ccombinewt: {
8519 // op: Pu4
8520 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8521 op &= UINT64_C(3);
8522 op <<= 5;
8523 Value |= op;
8524 // op: Rs32
8525 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8526 op &= UINT64_C(31);
8527 op <<= 16;
8528 Value |= op;
8529 // op: Rt32
8530 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8531 op &= UINT64_C(31);
8532 op <<= 8;
8533 Value |= op;
8534 // op: Rdd32
8535 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8536 op &= UINT64_C(31);
8537 Value |= op;
8538 break;
8539 }
8540 case Hexagon::C2_vmux: {
8541 // op: Pu4
8542 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8543 op &= UINT64_C(3);
8544 op <<= 5;
8545 Value |= op;
8546 // op: Rss32
8547 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8548 op &= UINT64_C(31);
8549 op <<= 16;
8550 Value |= op;
8551 // op: Rtt32
8552 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8553 op &= UINT64_C(31);
8554 op <<= 8;
8555 Value |= op;
8556 // op: Rdd32
8557 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8558 op &= UINT64_C(31);
8559 Value |= op;
8560 break;
8561 }
8562 case Hexagon::A2_psubf:
8563 case Hexagon::A2_psubfnew:
8564 case Hexagon::A2_psubt:
8565 case Hexagon::A2_psubtnew: {
8566 // op: Pu4
8567 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8568 op &= UINT64_C(3);
8569 op <<= 5;
8570 Value |= op;
8571 // op: Rt32
8572 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8573 op &= UINT64_C(31);
8574 op <<= 8;
8575 Value |= op;
8576 // op: Rs32
8577 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8578 op &= UINT64_C(31);
8579 op <<= 16;
8580 Value |= op;
8581 // op: Rd32
8582 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8583 op &= UINT64_C(31);
8584 Value |= op;
8585 break;
8586 }
8587 case Hexagon::A4_paslhf:
8588 case Hexagon::A4_paslhfnew:
8589 case Hexagon::A4_paslht:
8590 case Hexagon::A4_paslhtnew:
8591 case Hexagon::A4_pasrhf:
8592 case Hexagon::A4_pasrhfnew:
8593 case Hexagon::A4_pasrht:
8594 case Hexagon::A4_pasrhtnew:
8595 case Hexagon::A4_psxtbf:
8596 case Hexagon::A4_psxtbfnew:
8597 case Hexagon::A4_psxtbt:
8598 case Hexagon::A4_psxtbtnew:
8599 case Hexagon::A4_psxthf:
8600 case Hexagon::A4_psxthfnew:
8601 case Hexagon::A4_psxtht:
8602 case Hexagon::A4_psxthtnew:
8603 case Hexagon::A4_pzxtbf:
8604 case Hexagon::A4_pzxtbfnew:
8605 case Hexagon::A4_pzxtbt:
8606 case Hexagon::A4_pzxtbtnew:
8607 case Hexagon::A4_pzxthf:
8608 case Hexagon::A4_pzxthfnew:
8609 case Hexagon::A4_pzxtht:
8610 case Hexagon::A4_pzxthtnew: {
8611 // op: Pu4
8612 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8613 op &= UINT64_C(3);
8614 op <<= 8;
8615 Value |= op;
8616 // op: Rs32
8617 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8618 op &= UINT64_C(31);
8619 op <<= 16;
8620 Value |= op;
8621 // op: Rd32
8622 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8623 op &= UINT64_C(31);
8624 Value |= op;
8625 break;
8626 }
8627 case Hexagon::V6_vS32b_new_npred_ppu:
8628 case Hexagon::V6_vS32b_new_pred_ppu:
8629 case Hexagon::V6_vS32b_nt_new_npred_ppu:
8630 case Hexagon::V6_vS32b_nt_new_pred_ppu: {
8631 // op: Pv4
8632 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8633 op &= UINT64_C(3);
8634 op <<= 11;
8635 Value |= op;
8636 // op: Mu2
8637 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8638 op &= UINT64_C(1);
8639 op <<= 13;
8640 Value |= op;
8641 // op: Os8
8642 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8643 op &= UINT64_C(7);
8644 Value |= op;
8645 // op: Rx32
8646 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8647 op &= UINT64_C(31);
8648 op <<= 16;
8649 Value |= op;
8650 break;
8651 }
8652 case Hexagon::V6_zLd_pred_ppu: {
8653 // op: Pv4
8654 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8655 op &= UINT64_C(3);
8656 op <<= 11;
8657 Value |= op;
8658 // op: Mu2
8659 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8660 op &= UINT64_C(1);
8661 op <<= 13;
8662 Value |= op;
8663 // op: Rx32
8664 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8665 op &= UINT64_C(31);
8666 op <<= 16;
8667 Value |= op;
8668 break;
8669 }
8670 case Hexagon::V6_vS32Ub_npred_ppu:
8671 case Hexagon::V6_vS32Ub_pred_ppu:
8672 case Hexagon::V6_vS32b_npred_ppu:
8673 case Hexagon::V6_vS32b_nt_npred_ppu:
8674 case Hexagon::V6_vS32b_nt_pred_ppu:
8675 case Hexagon::V6_vS32b_pred_ppu: {
8676 // op: Pv4
8677 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8678 op &= UINT64_C(3);
8679 op <<= 11;
8680 Value |= op;
8681 // op: Mu2
8682 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8683 op &= UINT64_C(1);
8684 op <<= 13;
8685 Value |= op;
8686 // op: Vs32
8687 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8688 op &= UINT64_C(31);
8689 Value |= op;
8690 // op: Rx32
8691 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8692 op &= UINT64_C(31);
8693 op <<= 16;
8694 Value |= op;
8695 break;
8696 }
8697 case Hexagon::L4_return_f:
8698 case Hexagon::L4_return_fnew_pnt:
8699 case Hexagon::L4_return_fnew_pt:
8700 case Hexagon::L4_return_t:
8701 case Hexagon::L4_return_tnew_pnt:
8702 case Hexagon::L4_return_tnew_pt: {
8703 // op: Pv4
8704 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8705 op &= UINT64_C(3);
8706 op <<= 8;
8707 Value |= op;
8708 // op: Rs32
8709 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8710 op &= UINT64_C(31);
8711 op <<= 16;
8712 Value |= op;
8713 // op: Rdd32
8714 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8715 op &= UINT64_C(31);
8716 Value |= op;
8717 break;
8718 }
8719 case Hexagon::V6_vL32b_cur_npred_ppu:
8720 case Hexagon::V6_vL32b_cur_pred_ppu:
8721 case Hexagon::V6_vL32b_npred_ppu:
8722 case Hexagon::V6_vL32b_nt_cur_npred_ppu:
8723 case Hexagon::V6_vL32b_nt_cur_pred_ppu:
8724 case Hexagon::V6_vL32b_nt_npred_ppu:
8725 case Hexagon::V6_vL32b_nt_pred_ppu:
8726 case Hexagon::V6_vL32b_nt_tmp_npred_ppu:
8727 case Hexagon::V6_vL32b_nt_tmp_pred_ppu:
8728 case Hexagon::V6_vL32b_pred_ppu:
8729 case Hexagon::V6_vL32b_tmp_npred_ppu:
8730 case Hexagon::V6_vL32b_tmp_pred_ppu: {
8731 // op: Pv4
8732 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8733 op &= UINT64_C(3);
8734 op <<= 11;
8735 Value |= op;
8736 // op: Mu2
8737 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8738 op &= UINT64_C(1);
8739 op <<= 13;
8740 Value |= op;
8741 // op: Vd32
8742 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8743 op &= UINT64_C(31);
8744 Value |= op;
8745 // op: Rx32
8746 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8747 op &= UINT64_C(31);
8748 op <<= 16;
8749 Value |= op;
8750 break;
8751 }
8752 case Hexagon::V6_vgathermhq:
8753 case Hexagon::V6_vgathermwq: {
8754 // op: Qs4
8755 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8756 op &= UINT64_C(3);
8757 op <<= 5;
8758 Value |= op;
8759 // op: Rt32
8760 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8761 op &= UINT64_C(31);
8762 op <<= 16;
8763 Value |= op;
8764 // op: Mu2
8765 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8766 op &= UINT64_C(1);
8767 op <<= 13;
8768 Value |= op;
8769 // op: Vv32
8770 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8771 op &= UINT64_C(31);
8772 Value |= op;
8773 break;
8774 }
8775 case Hexagon::V6_vscattermhq:
8776 case Hexagon::V6_vscattermwq: {
8777 // op: Qs4
8778 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8779 op &= UINT64_C(3);
8780 op <<= 5;
8781 Value |= op;
8782 // op: Rt32
8783 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8784 op &= UINT64_C(31);
8785 op <<= 16;
8786 Value |= op;
8787 // op: Mu2
8788 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8789 op &= UINT64_C(1);
8790 op <<= 13;
8791 Value |= op;
8792 // op: Vv32
8793 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8794 op &= UINT64_C(31);
8795 op <<= 8;
8796 Value |= op;
8797 // op: Vw32
8798 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8799 op &= UINT64_C(31);
8800 Value |= op;
8801 break;
8802 }
8803 case Hexagon::V6_vgathermhwq: {
8804 // op: Qs4
8805 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8806 op &= UINT64_C(3);
8807 op <<= 5;
8808 Value |= op;
8809 // op: Rt32
8810 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8811 op &= UINT64_C(31);
8812 op <<= 16;
8813 Value |= op;
8814 // op: Mu2
8815 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8816 op &= UINT64_C(1);
8817 op <<= 13;
8818 Value |= op;
8819 // op: Vvv32
8820 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8821 op &= UINT64_C(31);
8822 Value |= op;
8823 break;
8824 }
8825 case Hexagon::V6_vscattermhwq: {
8826 // op: Qs4
8827 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8828 op &= UINT64_C(3);
8829 op <<= 5;
8830 Value |= op;
8831 // op: Rt32
8832 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8833 op &= UINT64_C(31);
8834 op <<= 16;
8835 Value |= op;
8836 // op: Mu2
8837 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8838 op &= UINT64_C(1);
8839 op <<= 13;
8840 Value |= op;
8841 // op: Vvv32
8842 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8843 op &= UINT64_C(31);
8844 op <<= 8;
8845 Value |= op;
8846 // op: Vw32
8847 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8848 op &= UINT64_C(31);
8849 Value |= op;
8850 break;
8851 }
8852 case Hexagon::V6_pred_not: {
8853 // op: Qs4
8854 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8855 op &= UINT64_C(3);
8856 op <<= 8;
8857 Value |= op;
8858 // op: Qd4
8859 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8860 op &= UINT64_C(3);
8861 Value |= op;
8862 break;
8863 }
8864 case Hexagon::V6_pred_and:
8865 case Hexagon::V6_pred_and_n:
8866 case Hexagon::V6_pred_or:
8867 case Hexagon::V6_pred_or_n:
8868 case Hexagon::V6_pred_xor:
8869 case Hexagon::V6_shuffeqh:
8870 case Hexagon::V6_shuffeqw: {
8871 // op: Qs4
8872 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8873 op &= UINT64_C(3);
8874 op <<= 8;
8875 Value |= op;
8876 // op: Qt4
8877 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8878 op &= UINT64_C(3);
8879 op <<= 22;
8880 Value |= op;
8881 // op: Qd4
8882 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8883 op &= UINT64_C(3);
8884 Value |= op;
8885 break;
8886 }
8887 case Hexagon::V6_vmux: {
8888 // op: Qt4
8889 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8890 op &= UINT64_C(3);
8891 op <<= 5;
8892 Value |= op;
8893 // op: Vu32
8894 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8895 op &= UINT64_C(31);
8896 op <<= 8;
8897 Value |= op;
8898 // op: Vv32
8899 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8900 op &= UINT64_C(31);
8901 op <<= 16;
8902 Value |= op;
8903 // op: Vd32
8904 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8905 op &= UINT64_C(31);
8906 Value |= op;
8907 break;
8908 }
8909 case Hexagon::V6_vswap: {
8910 // op: Qt4
8911 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8912 op &= UINT64_C(3);
8913 op <<= 5;
8914 Value |= op;
8915 // op: Vu32
8916 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8917 op &= UINT64_C(31);
8918 op <<= 8;
8919 Value |= op;
8920 // op: Vv32
8921 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8922 op &= UINT64_C(31);
8923 op <<= 16;
8924 Value |= op;
8925 // op: Vdd32
8926 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8927 op &= UINT64_C(31);
8928 Value |= op;
8929 break;
8930 }
8931 case Hexagon::V6_vandnqrt:
8932 case Hexagon::V6_vandqrt: {
8933 // op: Qu4
8934 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8935 op &= UINT64_C(3);
8936 op <<= 8;
8937 Value |= op;
8938 // op: Rt32
8939 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8940 op &= UINT64_C(31);
8941 op <<= 16;
8942 Value |= op;
8943 // op: Vd32
8944 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8945 op &= UINT64_C(31);
8946 Value |= op;
8947 break;
8948 }
8949 case Hexagon::V6_vandnqrt_acc:
8950 case Hexagon::V6_vandqrt_acc: {
8951 // op: Qu4
8952 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8953 op &= UINT64_C(3);
8954 op <<= 8;
8955 Value |= op;
8956 // op: Rt32
8957 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8958 op &= UINT64_C(31);
8959 op <<= 16;
8960 Value |= op;
8961 // op: Vx32
8962 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8963 op &= UINT64_C(31);
8964 Value |= op;
8965 break;
8966 }
8967 case Hexagon::V6_vhistq:
8968 case Hexagon::V6_vwhist128q:
8969 case Hexagon::V6_vwhist256q:
8970 case Hexagon::V6_vwhist256q_sat: {
8971 // op: Qv4
8972 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8973 op &= UINT64_C(3);
8974 op <<= 22;
8975 Value |= op;
8976 break;
8977 }
8978 case Hexagon::V6_vS32b_nqpred_ppu:
8979 case Hexagon::V6_vS32b_nt_nqpred_ppu:
8980 case Hexagon::V6_vS32b_nt_qpred_ppu:
8981 case Hexagon::V6_vS32b_qpred_ppu: {
8982 // op: Qv4
8983 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8984 op &= UINT64_C(3);
8985 op <<= 11;
8986 Value |= op;
8987 // op: Mu2
8988 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8989 op &= UINT64_C(1);
8990 op <<= 13;
8991 Value |= op;
8992 // op: Vs32
8993 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8994 op &= UINT64_C(31);
8995 Value |= op;
8996 // op: Rx32
8997 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8998 op &= UINT64_C(31);
8999 op <<= 16;
9000 Value |= op;
9001 break;
9002 }
9003 case Hexagon::V6_vprefixqb:
9004 case Hexagon::V6_vprefixqh:
9005 case Hexagon::V6_vprefixqw: {
9006 // op: Qv4
9007 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9008 op &= UINT64_C(3);
9009 op <<= 22;
9010 Value |= op;
9011 // op: Vd32
9012 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9013 op &= UINT64_C(31);
9014 Value |= op;
9015 break;
9016 }
9017 case Hexagon::V6_vandvnqv:
9018 case Hexagon::V6_vandvqv: {
9019 // op: Qv4
9020 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9021 op &= UINT64_C(3);
9022 op <<= 22;
9023 Value |= op;
9024 // op: Vu32
9025 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9026 op &= UINT64_C(31);
9027 op <<= 8;
9028 Value |= op;
9029 // op: Vd32
9030 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9031 op &= UINT64_C(31);
9032 Value |= op;
9033 break;
9034 }
9035 case Hexagon::V6_vaddbnq:
9036 case Hexagon::V6_vaddbq:
9037 case Hexagon::V6_vaddhnq:
9038 case Hexagon::V6_vaddhq:
9039 case Hexagon::V6_vaddwnq:
9040 case Hexagon::V6_vaddwq:
9041 case Hexagon::V6_vsubbnq:
9042 case Hexagon::V6_vsubbq:
9043 case Hexagon::V6_vsubhnq:
9044 case Hexagon::V6_vsubhq:
9045 case Hexagon::V6_vsubwnq:
9046 case Hexagon::V6_vsubwq: {
9047 // op: Qv4
9048 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9049 op &= UINT64_C(3);
9050 op <<= 22;
9051 Value |= op;
9052 // op: Vu32
9053 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
9054 op &= UINT64_C(31);
9055 op <<= 8;
9056 Value |= op;
9057 // op: Vx32
9058 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9059 op &= UINT64_C(31);
9060 Value |= op;
9061 break;
9062 }
9063 case Hexagon::SA1_clrf:
9064 case Hexagon::SA1_clrfnew:
9065 case Hexagon::SA1_clrt:
9066 case Hexagon::SA1_clrtnew:
9067 case Hexagon::SA1_setin1: {
9068 // op: Rd16
9069 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9070 op &= UINT64_C(15);
9071 Value |= op;
9072 break;
9073 }
9074 case Hexagon::PS_callr_nr: {
9075 // op: Rs
9076 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9077 op &= UINT64_C(31);
9078 op <<= 16;
9079 Value |= op;
9080 break;
9081 }
9082 case Hexagon::SA1_and1:
9083 case Hexagon::SA1_dec:
9084 case Hexagon::SA1_inc:
9085 case Hexagon::SA1_sxtb:
9086 case Hexagon::SA1_sxth:
9087 case Hexagon::SA1_tfr:
9088 case Hexagon::SA1_zxtb:
9089 case Hexagon::SA1_zxth: {
9090 // op: Rs16
9091 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9092 op &= UINT64_C(15);
9093 op <<= 4;
9094 Value |= op;
9095 // op: Rd16
9096 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9097 op &= UINT64_C(15);
9098 Value |= op;
9099 break;
9100 }
9101 case Hexagon::SA1_combinerz:
9102 case Hexagon::SA1_combinezr: {
9103 // op: Rs16
9104 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9105 op &= UINT64_C(15);
9106 op <<= 4;
9107 Value |= op;
9108 // op: Rdd8
9109 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9110 op &= UINT64_C(7);
9111 Value |= op;
9112 break;
9113 }
9114 case Hexagon::SA1_addrx: {
9115 // op: Rs16
9116 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9117 op &= UINT64_C(15);
9118 op <<= 4;
9119 Value |= op;
9120 // op: Rx16
9121 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9122 op &= UINT64_C(15);
9123 Value |= op;
9124 break;
9125 }
9126 case Hexagon::J2_callr:
9127 case Hexagon::J2_jumpr:
9128 case Hexagon::J4_hintjumpr:
9129 case Hexagon::Y2_dccleana:
9130 case Hexagon::Y2_dccleaninva:
9131 case Hexagon::Y2_dcinva:
9132 case Hexagon::Y2_dczeroa:
9133 case Hexagon::Y2_icinva:
9134 case Hexagon::Y2_wait:
9135 case Hexagon::Y4_trace:
9136 case Hexagon::Y6_diag: {
9137 // op: Rs32
9138 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9139 op &= UINT64_C(31);
9140 op <<= 16;
9141 Value |= op;
9142 break;
9143 }
9144 case Hexagon::Y4_l2fetch: {
9145 // op: Rs32
9146 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9147 op &= UINT64_C(31);
9148 op <<= 16;
9149 Value |= op;
9150 // op: Rt32
9151 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9152 op &= UINT64_C(31);
9153 op <<= 8;
9154 Value |= op;
9155 break;
9156 }
9157 case Hexagon::L6_memcpy: {
9158 // op: Rs32
9159 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9160 op &= UINT64_C(31);
9161 op <<= 16;
9162 Value |= op;
9163 // op: Rt32
9164 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9165 op &= UINT64_C(31);
9166 op <<= 8;
9167 Value |= op;
9168 // op: Mu2
9169 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9170 op &= UINT64_C(1);
9171 op <<= 13;
9172 Value |= op;
9173 break;
9174 }
9175 case Hexagon::Y5_l2fetch: {
9176 // op: Rs32
9177 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9178 op &= UINT64_C(31);
9179 op <<= 16;
9180 Value |= op;
9181 // op: Rtt32
9182 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9183 op &= UINT64_C(31);
9184 op <<= 8;
9185 Value |= op;
9186 break;
9187 }
9188 case Hexagon::A2_tfrrcr: {
9189 // op: Rs32
9190 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9191 op &= UINT64_C(31);
9192 op <<= 16;
9193 Value |= op;
9194 // op: Cd32
9195 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9196 op &= UINT64_C(31);
9197 Value |= op;
9198 break;
9199 }
9200 case Hexagon::G4_tfrgrcr: {
9201 // op: Rs32
9202 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9203 op &= UINT64_C(31);
9204 op <<= 16;
9205 Value |= op;
9206 // op: Gd32
9207 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9208 op &= UINT64_C(31);
9209 Value |= op;
9210 break;
9211 }
9212 case Hexagon::C2_tfrrp: {
9213 // op: Rs32
9214 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9215 op &= UINT64_C(31);
9216 op <<= 16;
9217 Value |= op;
9218 // op: Pd4
9219 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9220 op &= UINT64_C(3);
9221 Value |= op;
9222 break;
9223 }
9224 case Hexagon::A2_abs:
9225 case Hexagon::A2_abssat:
9226 case Hexagon::A2_aslh:
9227 case Hexagon::A2_asrh:
9228 case Hexagon::A2_negsat:
9229 case Hexagon::A2_satb:
9230 case Hexagon::A2_sath:
9231 case Hexagon::A2_satub:
9232 case Hexagon::A2_satuh:
9233 case Hexagon::A2_swiz:
9234 case Hexagon::A2_sxtb:
9235 case Hexagon::A2_sxth:
9236 case Hexagon::A2_tfr:
9237 case Hexagon::A2_zxth:
9238 case Hexagon::F2_conv_sf2uw:
9239 case Hexagon::F2_conv_sf2uw_chop:
9240 case Hexagon::F2_conv_sf2w:
9241 case Hexagon::F2_conv_sf2w_chop:
9242 case Hexagon::F2_conv_uw2sf:
9243 case Hexagon::F2_conv_w2sf:
9244 case Hexagon::F2_sffixupr:
9245 case Hexagon::L2_loadw_locked:
9246 case Hexagon::S2_brev:
9247 case Hexagon::S2_cl0:
9248 case Hexagon::S2_cl1:
9249 case Hexagon::S2_clb:
9250 case Hexagon::S2_clbnorm:
9251 case Hexagon::S2_ct0:
9252 case Hexagon::S2_ct1:
9253 case Hexagon::S2_svsathb:
9254 case Hexagon::S2_svsathub:
9255 case Hexagon::S2_vsplatrb: {
9256 // op: Rs32
9257 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9258 op &= UINT64_C(31);
9259 op <<= 16;
9260 Value |= op;
9261 // op: Rd32
9262 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9263 op &= UINT64_C(31);
9264 Value |= op;
9265 break;
9266 }
9267 case Hexagon::A2_sxtw:
9268 case Hexagon::F2_conv_sf2d:
9269 case Hexagon::F2_conv_sf2d_chop:
9270 case Hexagon::F2_conv_sf2df:
9271 case Hexagon::F2_conv_sf2ud:
9272 case Hexagon::F2_conv_sf2ud_chop:
9273 case Hexagon::F2_conv_uw2df:
9274 case Hexagon::F2_conv_w2df:
9275 case Hexagon::L2_deallocframe:
9276 case Hexagon::L4_loadd_locked:
9277 case Hexagon::L4_return:
9278 case Hexagon::S2_vsplatrh:
9279 case Hexagon::S2_vsxtbh:
9280 case Hexagon::S2_vsxthw:
9281 case Hexagon::S2_vzxtbh:
9282 case Hexagon::S2_vzxthw:
9283 case Hexagon::S6_vsplatrbp: {
9284 // op: Rs32
9285 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9286 op &= UINT64_C(31);
9287 op <<= 16;
9288 Value |= op;
9289 // op: Rdd32
9290 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9291 op &= UINT64_C(31);
9292 Value |= op;
9293 break;
9294 }
9295 case Hexagon::A4_cmpbeq:
9296 case Hexagon::A4_cmpbgt:
9297 case Hexagon::A4_cmpbgtu:
9298 case Hexagon::A4_cmpheq:
9299 case Hexagon::A4_cmphgt:
9300 case Hexagon::A4_cmphgtu:
9301 case Hexagon::C2_bitsclr:
9302 case Hexagon::C2_bitsset:
9303 case Hexagon::C2_cmpeq:
9304 case Hexagon::C2_cmpgt:
9305 case Hexagon::C2_cmpgtu:
9306 case Hexagon::C4_cmplte:
9307 case Hexagon::C4_cmplteu:
9308 case Hexagon::C4_cmpneq:
9309 case Hexagon::C4_nbitsclr:
9310 case Hexagon::C4_nbitsset:
9311 case Hexagon::F2_sfcmpeq:
9312 case Hexagon::F2_sfcmpge:
9313 case Hexagon::F2_sfcmpgt:
9314 case Hexagon::F2_sfcmpuo:
9315 case Hexagon::S2_storew_locked:
9316 case Hexagon::S2_tstbit_r:
9317 case Hexagon::S4_ntstbit_r: {
9318 // op: Rs32
9319 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9320 op &= UINT64_C(31);
9321 op <<= 16;
9322 Value |= op;
9323 // op: Rt32
9324 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9325 op &= UINT64_C(31);
9326 op <<= 8;
9327 Value |= op;
9328 // op: Pd4
9329 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9330 op &= UINT64_C(3);
9331 Value |= op;
9332 break;
9333 }
9334 case Hexagon::A2_add:
9335 case Hexagon::A2_addsat:
9336 case Hexagon::A2_and:
9337 case Hexagon::A2_max:
9338 case Hexagon::A2_maxu:
9339 case Hexagon::A2_or:
9340 case Hexagon::A2_svaddh:
9341 case Hexagon::A2_svaddhs:
9342 case Hexagon::A2_svadduhs:
9343 case Hexagon::A2_svavgh:
9344 case Hexagon::A2_svavghs:
9345 case Hexagon::A2_xor:
9346 case Hexagon::A4_cround_rr:
9347 case Hexagon::A4_modwrapu:
9348 case Hexagon::A4_rcmpeq:
9349 case Hexagon::A4_rcmpneq:
9350 case Hexagon::A4_round_rr:
9351 case Hexagon::A4_round_rr_sat:
9352 case Hexagon::F2_sfadd:
9353 case Hexagon::F2_sffixupd:
9354 case Hexagon::F2_sffixupn:
9355 case Hexagon::F2_sfmax:
9356 case Hexagon::F2_sfmin:
9357 case Hexagon::F2_sfmpy:
9358 case Hexagon::F2_sfsub:
9359 case Hexagon::M2_cmpyrs_s0:
9360 case Hexagon::M2_cmpyrs_s1:
9361 case Hexagon::M2_cmpyrsc_s0:
9362 case Hexagon::M2_cmpyrsc_s1:
9363 case Hexagon::M2_dpmpyss_rnd_s0:
9364 case Hexagon::M2_hmmpyh_rs1:
9365 case Hexagon::M2_hmmpyh_s1:
9366 case Hexagon::M2_hmmpyl_rs1:
9367 case Hexagon::M2_hmmpyl_s1:
9368 case Hexagon::M2_mpy_hh_s0:
9369 case Hexagon::M2_mpy_hh_s1:
9370 case Hexagon::M2_mpy_hl_s0:
9371 case Hexagon::M2_mpy_hl_s1:
9372 case Hexagon::M2_mpy_lh_s0:
9373 case Hexagon::M2_mpy_lh_s1:
9374 case Hexagon::M2_mpy_ll_s0:
9375 case Hexagon::M2_mpy_ll_s1:
9376 case Hexagon::M2_mpy_rnd_hh_s0:
9377 case Hexagon::M2_mpy_rnd_hh_s1:
9378 case Hexagon::M2_mpy_rnd_hl_s0:
9379 case Hexagon::M2_mpy_rnd_hl_s1:
9380 case Hexagon::M2_mpy_rnd_lh_s0:
9381 case Hexagon::M2_mpy_rnd_lh_s1:
9382 case Hexagon::M2_mpy_rnd_ll_s0:
9383 case Hexagon::M2_mpy_rnd_ll_s1:
9384 case Hexagon::M2_mpy_sat_hh_s0:
9385 case Hexagon::M2_mpy_sat_hh_s1:
9386 case Hexagon::M2_mpy_sat_hl_s0:
9387 case Hexagon::M2_mpy_sat_hl_s1:
9388 case Hexagon::M2_mpy_sat_lh_s0:
9389 case Hexagon::M2_mpy_sat_lh_s1:
9390 case Hexagon::M2_mpy_sat_ll_s0:
9391 case Hexagon::M2_mpy_sat_ll_s1:
9392 case Hexagon::M2_mpy_sat_rnd_hh_s0:
9393 case Hexagon::M2_mpy_sat_rnd_hh_s1:
9394 case Hexagon::M2_mpy_sat_rnd_hl_s0:
9395 case Hexagon::M2_mpy_sat_rnd_hl_s1:
9396 case Hexagon::M2_mpy_sat_rnd_lh_s0:
9397 case Hexagon::M2_mpy_sat_rnd_lh_s1:
9398 case Hexagon::M2_mpy_sat_rnd_ll_s0:
9399 case Hexagon::M2_mpy_sat_rnd_ll_s1:
9400 case Hexagon::M2_mpy_up:
9401 case Hexagon::M2_mpy_up_s1:
9402 case Hexagon::M2_mpy_up_s1_sat:
9403 case Hexagon::M2_mpyi:
9404 case Hexagon::M2_mpysu_up:
9405 case Hexagon::M2_mpyu_hh_s0:
9406 case Hexagon::M2_mpyu_hh_s1:
9407 case Hexagon::M2_mpyu_hl_s0:
9408 case Hexagon::M2_mpyu_hl_s1:
9409 case Hexagon::M2_mpyu_lh_s0:
9410 case Hexagon::M2_mpyu_lh_s1:
9411 case Hexagon::M2_mpyu_ll_s0:
9412 case Hexagon::M2_mpyu_ll_s1:
9413 case Hexagon::M2_mpyu_up:
9414 case Hexagon::M2_vmpy2s_s0pack:
9415 case Hexagon::M2_vmpy2s_s1pack:
9416 case Hexagon::S2_asl_r_r:
9417 case Hexagon::S2_asl_r_r_sat:
9418 case Hexagon::S2_asr_r_r:
9419 case Hexagon::S2_asr_r_r_sat:
9420 case Hexagon::S2_clrbit_r:
9421 case Hexagon::S2_lsl_r_r:
9422 case Hexagon::S2_lsr_r_r:
9423 case Hexagon::S2_setbit_r:
9424 case Hexagon::S2_togglebit_r:
9425 case Hexagon::S4_parity:
9426 case Hexagon::dep_A2_addsat: {
9427 // op: Rs32
9428 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9429 op &= UINT64_C(31);
9430 op <<= 16;
9431 Value |= op;
9432 // op: Rt32
9433 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9434 op &= UINT64_C(31);
9435 op <<= 8;
9436 Value |= op;
9437 // op: Rd32
9438 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9439 op &= UINT64_C(31);
9440 Value |= op;
9441 break;
9442 }
9443 case Hexagon::A2_combinew:
9444 case Hexagon::A4_bitsplit:
9445 case Hexagon::M2_cmpyi_s0:
9446 case Hexagon::M2_cmpyr_s0:
9447 case Hexagon::M2_cmpys_s0:
9448 case Hexagon::M2_cmpys_s1:
9449 case Hexagon::M2_cmpysc_s0:
9450 case Hexagon::M2_cmpysc_s1:
9451 case Hexagon::M2_dpmpyss_s0:
9452 case Hexagon::M2_dpmpyuu_s0:
9453 case Hexagon::M2_mpyd_hh_s0:
9454 case Hexagon::M2_mpyd_hh_s1:
9455 case Hexagon::M2_mpyd_hl_s0:
9456 case Hexagon::M2_mpyd_hl_s1:
9457 case Hexagon::M2_mpyd_lh_s0:
9458 case Hexagon::M2_mpyd_lh_s1:
9459 case Hexagon::M2_mpyd_ll_s0:
9460 case Hexagon::M2_mpyd_ll_s1:
9461 case Hexagon::M2_mpyd_rnd_hh_s0:
9462 case Hexagon::M2_mpyd_rnd_hh_s1:
9463 case Hexagon::M2_mpyd_rnd_hl_s0:
9464 case Hexagon::M2_mpyd_rnd_hl_s1:
9465 case Hexagon::M2_mpyd_rnd_lh_s0:
9466 case Hexagon::M2_mpyd_rnd_lh_s1:
9467 case Hexagon::M2_mpyd_rnd_ll_s0:
9468 case Hexagon::M2_mpyd_rnd_ll_s1:
9469 case Hexagon::M2_mpyud_hh_s0:
9470 case Hexagon::M2_mpyud_hh_s1:
9471 case Hexagon::M2_mpyud_hl_s0:
9472 case Hexagon::M2_mpyud_hl_s1:
9473 case Hexagon::M2_mpyud_lh_s0:
9474 case Hexagon::M2_mpyud_lh_s1:
9475 case Hexagon::M2_mpyud_ll_s0:
9476 case Hexagon::M2_mpyud_ll_s1:
9477 case Hexagon::M2_vmpy2s_s0:
9478 case Hexagon::M2_vmpy2s_s1:
9479 case Hexagon::M2_vmpy2su_s0:
9480 case Hexagon::M2_vmpy2su_s1:
9481 case Hexagon::M4_pmpyw:
9482 case Hexagon::M4_vpmpyh:
9483 case Hexagon::M5_vmpybsu:
9484 case Hexagon::M5_vmpybuu:
9485 case Hexagon::S2_packhl:
9486 case Hexagon::dep_S2_packhl: {
9487 // op: Rs32
9488 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9489 op &= UINT64_C(31);
9490 op <<= 16;
9491 Value |= op;
9492 // op: Rt32
9493 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9494 op &= UINT64_C(31);
9495 op <<= 8;
9496 Value |= op;
9497 // op: Rdd32
9498 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9499 op &= UINT64_C(31);
9500 Value |= op;
9501 break;
9502 }
9503 case Hexagon::S4_stored_locked: {
9504 // op: Rs32
9505 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9506 op &= UINT64_C(31);
9507 op <<= 16;
9508 Value |= op;
9509 // op: Rtt32
9510 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9511 op &= UINT64_C(31);
9512 op <<= 8;
9513 Value |= op;
9514 // op: Pd4
9515 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9516 op &= UINT64_C(3);
9517 Value |= op;
9518 break;
9519 }
9520 case Hexagon::S2_extractu_rp:
9521 case Hexagon::S4_extract_rp: {
9522 // op: Rs32
9523 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9524 op &= UINT64_C(31);
9525 op <<= 16;
9526 Value |= op;
9527 // op: Rtt32
9528 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9529 op &= UINT64_C(31);
9530 op <<= 8;
9531 Value |= op;
9532 // op: Rd32
9533 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9534 op &= UINT64_C(31);
9535 Value |= op;
9536 break;
9537 }
9538 case Hexagon::F2_sfinvsqrta: {
9539 // op: Rs32
9540 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9541 op &= UINT64_C(31);
9542 op <<= 16;
9543 Value |= op;
9544 // op: Rd32
9545 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9546 op &= UINT64_C(31);
9547 Value |= op;
9548 // op: Pe4
9549 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9550 op &= UINT64_C(3);
9551 op <<= 5;
9552 Value |= op;
9553 break;
9554 }
9555 case Hexagon::F2_sffma_sc: {
9556 // op: Rs32
9557 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9558 op &= UINT64_C(31);
9559 op <<= 16;
9560 Value |= op;
9561 // op: Rt32
9562 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
9563 op &= UINT64_C(31);
9564 op <<= 8;
9565 Value |= op;
9566 // op: Pu4
9567 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
9568 op &= UINT64_C(3);
9569 op <<= 5;
9570 Value |= op;
9571 // op: Rx32
9572 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9573 op &= UINT64_C(31);
9574 Value |= op;
9575 break;
9576 }
9577 case Hexagon::F2_sfrecipa: {
9578 // op: Rs32
9579 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9580 op &= UINT64_C(31);
9581 op <<= 16;
9582 Value |= op;
9583 // op: Rt32
9584 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
9585 op &= UINT64_C(31);
9586 op <<= 8;
9587 Value |= op;
9588 // op: Rd32
9589 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9590 op &= UINT64_C(31);
9591 Value |= op;
9592 // op: Pe4
9593 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9594 op &= UINT64_C(3);
9595 op <<= 5;
9596 Value |= op;
9597 break;
9598 }
9599 case Hexagon::F2_sffma:
9600 case Hexagon::F2_sffma_lib:
9601 case Hexagon::F2_sffms:
9602 case Hexagon::F2_sffms_lib:
9603 case Hexagon::M2_acci:
9604 case Hexagon::M2_maci:
9605 case Hexagon::M2_mnaci:
9606 case Hexagon::M2_mpy_acc_hh_s0:
9607 case Hexagon::M2_mpy_acc_hh_s1:
9608 case Hexagon::M2_mpy_acc_hl_s0:
9609 case Hexagon::M2_mpy_acc_hl_s1:
9610 case Hexagon::M2_mpy_acc_lh_s0:
9611 case Hexagon::M2_mpy_acc_lh_s1:
9612 case Hexagon::M2_mpy_acc_ll_s0:
9613 case Hexagon::M2_mpy_acc_ll_s1:
9614 case Hexagon::M2_mpy_acc_sat_hh_s0:
9615 case Hexagon::M2_mpy_acc_sat_hh_s1:
9616 case Hexagon::M2_mpy_acc_sat_hl_s0:
9617 case Hexagon::M2_mpy_acc_sat_hl_s1:
9618 case Hexagon::M2_mpy_acc_sat_lh_s0:
9619 case Hexagon::M2_mpy_acc_sat_lh_s1:
9620 case Hexagon::M2_mpy_acc_sat_ll_s0:
9621 case Hexagon::M2_mpy_acc_sat_ll_s1:
9622 case Hexagon::M2_mpy_nac_hh_s0:
9623 case Hexagon::M2_mpy_nac_hh_s1:
9624 case Hexagon::M2_mpy_nac_hl_s0:
9625 case Hexagon::M2_mpy_nac_hl_s1:
9626 case Hexagon::M2_mpy_nac_lh_s0:
9627 case Hexagon::M2_mpy_nac_lh_s1:
9628 case Hexagon::M2_mpy_nac_ll_s0:
9629 case Hexagon::M2_mpy_nac_ll_s1:
9630 case Hexagon::M2_mpy_nac_sat_hh_s0:
9631 case Hexagon::M2_mpy_nac_sat_hh_s1:
9632 case Hexagon::M2_mpy_nac_sat_hl_s0:
9633 case Hexagon::M2_mpy_nac_sat_hl_s1:
9634 case Hexagon::M2_mpy_nac_sat_lh_s0:
9635 case Hexagon::M2_mpy_nac_sat_lh_s1:
9636 case Hexagon::M2_mpy_nac_sat_ll_s0:
9637 case Hexagon::M2_mpy_nac_sat_ll_s1:
9638 case Hexagon::M2_mpyu_acc_hh_s0:
9639 case Hexagon::M2_mpyu_acc_hh_s1:
9640 case Hexagon::M2_mpyu_acc_hl_s0:
9641 case Hexagon::M2_mpyu_acc_hl_s1:
9642 case Hexagon::M2_mpyu_acc_lh_s0:
9643 case Hexagon::M2_mpyu_acc_lh_s1:
9644 case Hexagon::M2_mpyu_acc_ll_s0:
9645 case Hexagon::M2_mpyu_acc_ll_s1:
9646 case Hexagon::M2_mpyu_nac_hh_s0:
9647 case Hexagon::M2_mpyu_nac_hh_s1:
9648 case Hexagon::M2_mpyu_nac_hl_s0:
9649 case Hexagon::M2_mpyu_nac_hl_s1:
9650 case Hexagon::M2_mpyu_nac_lh_s0:
9651 case Hexagon::M2_mpyu_nac_lh_s1:
9652 case Hexagon::M2_mpyu_nac_ll_s0:
9653 case Hexagon::M2_mpyu_nac_ll_s1:
9654 case Hexagon::M2_nacci:
9655 case Hexagon::M2_xor_xacc:
9656 case Hexagon::M4_and_and:
9657 case Hexagon::M4_and_andn:
9658 case Hexagon::M4_and_or:
9659 case Hexagon::M4_and_xor:
9660 case Hexagon::M4_mac_up_s1_sat:
9661 case Hexagon::M4_nac_up_s1_sat:
9662 case Hexagon::M4_or_and:
9663 case Hexagon::M4_or_andn:
9664 case Hexagon::M4_or_or:
9665 case Hexagon::M4_or_xor:
9666 case Hexagon::M4_xor_and:
9667 case Hexagon::M4_xor_andn:
9668 case Hexagon::M4_xor_or:
9669 case Hexagon::S2_asl_r_r_acc:
9670 case Hexagon::S2_asl_r_r_and:
9671 case Hexagon::S2_asl_r_r_nac:
9672 case Hexagon::S2_asl_r_r_or:
9673 case Hexagon::S2_asr_r_r_acc:
9674 case Hexagon::S2_asr_r_r_and:
9675 case Hexagon::S2_asr_r_r_nac:
9676 case Hexagon::S2_asr_r_r_or:
9677 case Hexagon::S2_lsl_r_r_acc:
9678 case Hexagon::S2_lsl_r_r_and:
9679 case Hexagon::S2_lsl_r_r_nac:
9680 case Hexagon::S2_lsl_r_r_or:
9681 case Hexagon::S2_lsr_r_r_acc:
9682 case Hexagon::S2_lsr_r_r_and:
9683 case Hexagon::S2_lsr_r_r_nac:
9684 case Hexagon::S2_lsr_r_r_or: {
9685 // op: Rs32
9686 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9687 op &= UINT64_C(31);
9688 op <<= 16;
9689 Value |= op;
9690 // op: Rt32
9691 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
9692 op &= UINT64_C(31);
9693 op <<= 8;
9694 Value |= op;
9695 // op: Rx32
9696 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9697 op &= UINT64_C(31);
9698 Value |= op;
9699 break;
9700 }
9701 case Hexagon::M2_cmaci_s0:
9702 case Hexagon::M2_cmacr_s0:
9703 case Hexagon::M2_cmacs_s0:
9704 case Hexagon::M2_cmacs_s1:
9705 case Hexagon::M2_cmacsc_s0:
9706 case Hexagon::M2_cmacsc_s1:
9707 case Hexagon::M2_cnacs_s0:
9708 case Hexagon::M2_cnacs_s1:
9709 case Hexagon::M2_cnacsc_s0:
9710 case Hexagon::M2_cnacsc_s1:
9711 case Hexagon::M2_dpmpyss_acc_s0:
9712 case Hexagon::M2_dpmpyss_nac_s0:
9713 case Hexagon::M2_dpmpyuu_acc_s0:
9714 case Hexagon::M2_dpmpyuu_nac_s0:
9715 case Hexagon::M2_mpyd_acc_hh_s0:
9716 case Hexagon::M2_mpyd_acc_hh_s1:
9717 case Hexagon::M2_mpyd_acc_hl_s0:
9718 case Hexagon::M2_mpyd_acc_hl_s1:
9719 case Hexagon::M2_mpyd_acc_lh_s0:
9720 case Hexagon::M2_mpyd_acc_lh_s1:
9721 case Hexagon::M2_mpyd_acc_ll_s0:
9722 case Hexagon::M2_mpyd_acc_ll_s1:
9723 case Hexagon::M2_mpyd_nac_hh_s0:
9724 case Hexagon::M2_mpyd_nac_hh_s1:
9725 case Hexagon::M2_mpyd_nac_hl_s0:
9726 case Hexagon::M2_mpyd_nac_hl_s1:
9727 case Hexagon::M2_mpyd_nac_lh_s0:
9728 case Hexagon::M2_mpyd_nac_lh_s1:
9729 case Hexagon::M2_mpyd_nac_ll_s0:
9730 case Hexagon::M2_mpyd_nac_ll_s1:
9731 case Hexagon::M2_mpyud_acc_hh_s0:
9732 case Hexagon::M2_mpyud_acc_hh_s1:
9733 case Hexagon::M2_mpyud_acc_hl_s0:
9734 case Hexagon::M2_mpyud_acc_hl_s1:
9735 case Hexagon::M2_mpyud_acc_lh_s0:
9736 case Hexagon::M2_mpyud_acc_lh_s1:
9737 case Hexagon::M2_mpyud_acc_ll_s0:
9738 case Hexagon::M2_mpyud_acc_ll_s1:
9739 case Hexagon::M2_mpyud_nac_hh_s0:
9740 case Hexagon::M2_mpyud_nac_hh_s1:
9741 case Hexagon::M2_mpyud_nac_hl_s0:
9742 case Hexagon::M2_mpyud_nac_hl_s1:
9743 case Hexagon::M2_mpyud_nac_lh_s0:
9744 case Hexagon::M2_mpyud_nac_lh_s1:
9745 case Hexagon::M2_mpyud_nac_ll_s0:
9746 case Hexagon::M2_mpyud_nac_ll_s1:
9747 case Hexagon::M2_vmac2:
9748 case Hexagon::M2_vmac2s_s0:
9749 case Hexagon::M2_vmac2s_s1:
9750 case Hexagon::M2_vmac2su_s0:
9751 case Hexagon::M2_vmac2su_s1:
9752 case Hexagon::M4_pmpyw_acc:
9753 case Hexagon::M4_vpmpyh_acc:
9754 case Hexagon::M5_vmacbsu:
9755 case Hexagon::M5_vmacbuu: {
9756 // op: Rs32
9757 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9758 op &= UINT64_C(31);
9759 op <<= 16;
9760 Value |= op;
9761 // op: Rt32
9762 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
9763 op &= UINT64_C(31);
9764 op <<= 8;
9765 Value |= op;
9766 // op: Rxx32
9767 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9768 op &= UINT64_C(31);
9769 Value |= op;
9770 break;
9771 }
9772 case Hexagon::S2_insert_rp: {
9773 // op: Rs32
9774 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9775 op &= UINT64_C(31);
9776 op <<= 16;
9777 Value |= op;
9778 // op: Rtt32
9779 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
9780 op &= UINT64_C(31);
9781 op <<= 8;
9782 Value |= op;
9783 // op: Rx32
9784 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9785 op &= UINT64_C(31);
9786 Value |= op;
9787 break;
9788 }
9789 case Hexagon::Y6_diag0:
9790 case Hexagon::Y6_diag1: {
9791 // op: Rss32
9792 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9793 op &= UINT64_C(31);
9794 op <<= 16;
9795 Value |= op;
9796 // op: Rtt32
9797 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9798 op &= UINT64_C(31);
9799 op <<= 8;
9800 Value |= op;
9801 break;
9802 }
9803 case Hexagon::A4_tfrpcp: {
9804 // op: Rss32
9805 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9806 op &= UINT64_C(31);
9807 op <<= 16;
9808 Value |= op;
9809 // op: Cdd32
9810 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9811 op &= UINT64_C(31);
9812 Value |= op;
9813 break;
9814 }
9815 case Hexagon::G4_tfrgpcp: {
9816 // op: Rss32
9817 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9818 op &= UINT64_C(31);
9819 op <<= 16;
9820 Value |= op;
9821 // op: Gdd32
9822 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9823 op &= UINT64_C(31);
9824 Value |= op;
9825 break;
9826 }
9827 case Hexagon::A2_roundsat:
9828 case Hexagon::A2_sat:
9829 case Hexagon::F2_conv_d2sf:
9830 case Hexagon::F2_conv_df2sf:
9831 case Hexagon::F2_conv_df2uw:
9832 case Hexagon::F2_conv_df2uw_chop:
9833 case Hexagon::F2_conv_df2w:
9834 case Hexagon::F2_conv_df2w_chop:
9835 case Hexagon::F2_conv_ud2sf:
9836 case Hexagon::S2_cl0p:
9837 case Hexagon::S2_cl1p:
9838 case Hexagon::S2_clbp:
9839 case Hexagon::S2_ct0p:
9840 case Hexagon::S2_ct1p:
9841 case Hexagon::S2_vrndpackwh:
9842 case Hexagon::S2_vrndpackwhs:
9843 case Hexagon::S2_vsathb:
9844 case Hexagon::S2_vsathub:
9845 case Hexagon::S2_vsatwh:
9846 case Hexagon::S2_vsatwuh:
9847 case Hexagon::S2_vtrunehb:
9848 case Hexagon::S2_vtrunohb:
9849 case Hexagon::S4_clbpnorm:
9850 case Hexagon::S5_popcountp: {
9851 // op: Rss32
9852 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9853 op &= UINT64_C(31);
9854 op <<= 16;
9855 Value |= op;
9856 // op: Rd32
9857 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9858 op &= UINT64_C(31);
9859 Value |= op;
9860 break;
9861 }
9862 case Hexagon::A2_absp:
9863 case Hexagon::A2_negp:
9864 case Hexagon::A2_notp:
9865 case Hexagon::A2_vabsh:
9866 case Hexagon::A2_vabshsat:
9867 case Hexagon::A2_vabsw:
9868 case Hexagon::A2_vabswsat:
9869 case Hexagon::A2_vconj:
9870 case Hexagon::F2_conv_d2df:
9871 case Hexagon::F2_conv_df2d:
9872 case Hexagon::F2_conv_df2d_chop:
9873 case Hexagon::F2_conv_df2ud:
9874 case Hexagon::F2_conv_df2ud_chop:
9875 case Hexagon::F2_conv_ud2df:
9876 case Hexagon::S2_brevp:
9877 case Hexagon::S2_deinterleave:
9878 case Hexagon::S2_interleave:
9879 case Hexagon::S2_vsathb_nopack:
9880 case Hexagon::S2_vsathub_nopack:
9881 case Hexagon::S2_vsatwh_nopack:
9882 case Hexagon::S2_vsatwuh_nopack: {
9883 // op: Rss32
9884 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9885 op &= UINT64_C(31);
9886 op <<= 16;
9887 Value |= op;
9888 // op: Rdd32
9889 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9890 op &= UINT64_C(31);
9891 Value |= op;
9892 break;
9893 }
9894 case Hexagon::A4_tlbmatch: {
9895 // op: Rss32
9896 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9897 op &= UINT64_C(31);
9898 op <<= 16;
9899 Value |= op;
9900 // op: Rt32
9901 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9902 op &= UINT64_C(31);
9903 op <<= 8;
9904 Value |= op;
9905 // op: Pd4
9906 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9907 op &= UINT64_C(3);
9908 Value |= op;
9909 break;
9910 }
9911 case Hexagon::M4_cmpyi_wh:
9912 case Hexagon::M4_cmpyi_whc:
9913 case Hexagon::M4_cmpyr_wh:
9914 case Hexagon::M4_cmpyr_whc:
9915 case Hexagon::S2_asr_r_svw_trun: {
9916 // op: Rss32
9917 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9918 op &= UINT64_C(31);
9919 op <<= 16;
9920 Value |= op;
9921 // op: Rt32
9922 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9923 op &= UINT64_C(31);
9924 op <<= 8;
9925 Value |= op;
9926 // op: Rd32
9927 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9928 op &= UINT64_C(31);
9929 Value |= op;
9930 break;
9931 }
9932 case Hexagon::A7_croundd_rr:
9933 case Hexagon::S2_asl_r_p:
9934 case Hexagon::S2_asl_r_vh:
9935 case Hexagon::S2_asl_r_vw:
9936 case Hexagon::S2_asr_r_p:
9937 case Hexagon::S2_asr_r_vh:
9938 case Hexagon::S2_asr_r_vw:
9939 case Hexagon::S2_lsl_r_p:
9940 case Hexagon::S2_lsl_r_vh:
9941 case Hexagon::S2_lsl_r_vw:
9942 case Hexagon::S2_lsr_r_p:
9943 case Hexagon::S2_lsr_r_vh:
9944 case Hexagon::S2_lsr_r_vw:
9945 case Hexagon::S2_vcnegh:
9946 case Hexagon::S2_vcrotate: {
9947 // op: Rss32
9948 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9949 op &= UINT64_C(31);
9950 op <<= 16;
9951 Value |= op;
9952 // op: Rt32
9953 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9954 op &= UINT64_C(31);
9955 op <<= 8;
9956 Value |= op;
9957 // op: Rdd32
9958 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9959 op &= UINT64_C(31);
9960 Value |= op;
9961 break;
9962 }
9963 case Hexagon::A2_vcmpbeq:
9964 case Hexagon::A2_vcmpbgtu:
9965 case Hexagon::A2_vcmpheq:
9966 case Hexagon::A2_vcmphgt:
9967 case Hexagon::A2_vcmphgtu:
9968 case Hexagon::A2_vcmpweq:
9969 case Hexagon::A2_vcmpwgt:
9970 case Hexagon::A2_vcmpwgtu:
9971 case Hexagon::A4_boundscheck_hi:
9972 case Hexagon::A4_boundscheck_lo:
9973 case Hexagon::A4_vcmpbeq_any:
9974 case Hexagon::A4_vcmpbgt:
9975 case Hexagon::A6_vcmpbeq_notany:
9976 case Hexagon::C2_cmpeqp:
9977 case Hexagon::C2_cmpgtp:
9978 case Hexagon::C2_cmpgtup:
9979 case Hexagon::F2_dfcmpeq:
9980 case Hexagon::F2_dfcmpge:
9981 case Hexagon::F2_dfcmpgt:
9982 case Hexagon::F2_dfcmpuo: {
9983 // op: Rss32
9984 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
9985 op &= UINT64_C(31);
9986 op <<= 16;
9987 Value |= op;
9988 // op: Rtt32
9989 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
9990 op &= UINT64_C(31);
9991 op <<= 8;
9992 Value |= op;
9993 // op: Pd4
9994 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
9995 op &= UINT64_C(3);
9996 Value |= op;
9997 break;
9998 }
9999 case Hexagon::S2_vsplicerb: {
10000 // op: Rss32
10001 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10002 op &= UINT64_C(31);
10003 op <<= 16;
10004 Value |= op;
10005 // op: Rtt32
10006 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10007 op &= UINT64_C(31);
10008 op <<= 8;
10009 Value |= op;
10010 // op: Pu4
10011 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10012 op &= UINT64_C(3);
10013 op <<= 5;
10014 Value |= op;
10015 // op: Rdd32
10016 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10017 op &= UINT64_C(31);
10018 Value |= op;
10019 break;
10020 }
10021 case Hexagon::A5_vaddhubs:
10022 case Hexagon::M2_vdmpyrs_s0:
10023 case Hexagon::M2_vdmpyrs_s1:
10024 case Hexagon::M2_vraddh:
10025 case Hexagon::M2_vradduh:
10026 case Hexagon::M2_vrcmpys_s1rp_h:
10027 case Hexagon::M2_vrcmpys_s1rp_l:
10028 case Hexagon::M7_wcmpyiw:
10029 case Hexagon::M7_wcmpyiw_rnd:
10030 case Hexagon::M7_wcmpyiwc:
10031 case Hexagon::M7_wcmpyiwc_rnd:
10032 case Hexagon::M7_wcmpyrw:
10033 case Hexagon::M7_wcmpyrw_rnd:
10034 case Hexagon::M7_wcmpyrwc:
10035 case Hexagon::M7_wcmpyrwc_rnd:
10036 case Hexagon::S2_parityp: {
10037 // op: Rss32
10038 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10039 op &= UINT64_C(31);
10040 op <<= 16;
10041 Value |= op;
10042 // op: Rtt32
10043 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10044 op &= UINT64_C(31);
10045 op <<= 8;
10046 Value |= op;
10047 // op: Rd32
10048 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10049 op &= UINT64_C(31);
10050 Value |= op;
10051 break;
10052 }
10053 case Hexagon::A2_addp:
10054 case Hexagon::A2_addpsat:
10055 case Hexagon::A2_addsph:
10056 case Hexagon::A2_addspl:
10057 case Hexagon::A2_andp:
10058 case Hexagon::A2_maxp:
10059 case Hexagon::A2_maxup:
10060 case Hexagon::A2_orp:
10061 case Hexagon::A2_vaddh:
10062 case Hexagon::A2_vaddhs:
10063 case Hexagon::A2_vaddub:
10064 case Hexagon::A2_vaddubs:
10065 case Hexagon::A2_vadduhs:
10066 case Hexagon::A2_vaddw:
10067 case Hexagon::A2_vaddws:
10068 case Hexagon::A2_vavgh:
10069 case Hexagon::A2_vavghcr:
10070 case Hexagon::A2_vavghr:
10071 case Hexagon::A2_vavgub:
10072 case Hexagon::A2_vavgubr:
10073 case Hexagon::A2_vavguh:
10074 case Hexagon::A2_vavguhr:
10075 case Hexagon::A2_vavguw:
10076 case Hexagon::A2_vavguwr:
10077 case Hexagon::A2_vavgw:
10078 case Hexagon::A2_vavgwcr:
10079 case Hexagon::A2_vavgwr:
10080 case Hexagon::A2_vraddub:
10081 case Hexagon::A2_vrsadub:
10082 case Hexagon::A2_xorp:
10083 case Hexagon::F2_dfadd:
10084 case Hexagon::F2_dfmax:
10085 case Hexagon::F2_dfmin:
10086 case Hexagon::F2_dfmpyfix:
10087 case Hexagon::F2_dfmpyll:
10088 case Hexagon::F2_dfsub:
10089 case Hexagon::M2_mmpyh_rs0:
10090 case Hexagon::M2_mmpyh_rs1:
10091 case Hexagon::M2_mmpyh_s0:
10092 case Hexagon::M2_mmpyh_s1:
10093 case Hexagon::M2_mmpyl_rs0:
10094 case Hexagon::M2_mmpyl_rs1:
10095 case Hexagon::M2_mmpyl_s0:
10096 case Hexagon::M2_mmpyl_s1:
10097 case Hexagon::M2_mmpyuh_rs0:
10098 case Hexagon::M2_mmpyuh_rs1:
10099 case Hexagon::M2_mmpyuh_s0:
10100 case Hexagon::M2_mmpyuh_s1:
10101 case Hexagon::M2_mmpyul_rs0:
10102 case Hexagon::M2_mmpyul_rs1:
10103 case Hexagon::M2_mmpyul_s0:
10104 case Hexagon::M2_mmpyul_s1:
10105 case Hexagon::M2_vcmpy_s0_sat_i:
10106 case Hexagon::M2_vcmpy_s0_sat_r:
10107 case Hexagon::M2_vcmpy_s1_sat_i:
10108 case Hexagon::M2_vcmpy_s1_sat_r:
10109 case Hexagon::M2_vdmpys_s0:
10110 case Hexagon::M2_vdmpys_s1:
10111 case Hexagon::M2_vmpy2es_s0:
10112 case Hexagon::M2_vmpy2es_s1:
10113 case Hexagon::M2_vrcmpyi_s0:
10114 case Hexagon::M2_vrcmpyi_s0c:
10115 case Hexagon::M2_vrcmpyr_s0:
10116 case Hexagon::M2_vrcmpyr_s0c:
10117 case Hexagon::M2_vrcmpys_s1_h:
10118 case Hexagon::M2_vrcmpys_s1_l:
10119 case Hexagon::M2_vrmpy_s0:
10120 case Hexagon::M4_vrmpyeh_s0:
10121 case Hexagon::M4_vrmpyeh_s1:
10122 case Hexagon::M4_vrmpyoh_s0:
10123 case Hexagon::M4_vrmpyoh_s1:
10124 case Hexagon::M5_vdmpybsu:
10125 case Hexagon::M5_vrmpybsu:
10126 case Hexagon::M5_vrmpybuu:
10127 case Hexagon::M7_dcmpyiw:
10128 case Hexagon::M7_dcmpyiwc:
10129 case Hexagon::M7_dcmpyrw:
10130 case Hexagon::M7_dcmpyrwc:
10131 case Hexagon::S2_cabacdecbin:
10132 case Hexagon::S2_extractup_rp:
10133 case Hexagon::S2_lfsp:
10134 case Hexagon::S2_shuffeb:
10135 case Hexagon::S2_shuffeh:
10136 case Hexagon::S2_vtrunewh:
10137 case Hexagon::S2_vtrunowh:
10138 case Hexagon::S4_extractp_rp:
10139 case Hexagon::S4_vxaddsubh:
10140 case Hexagon::S4_vxaddsubhr:
10141 case Hexagon::S4_vxaddsubw:
10142 case Hexagon::S4_vxsubaddh:
10143 case Hexagon::S4_vxsubaddhr:
10144 case Hexagon::S4_vxsubaddw:
10145 case Hexagon::S6_vtrunehb_ppp:
10146 case Hexagon::S6_vtrunohb_ppp: {
10147 // op: Rss32
10148 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10149 op &= UINT64_C(31);
10150 op <<= 16;
10151 Value |= op;
10152 // op: Rtt32
10153 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10154 op &= UINT64_C(31);
10155 op <<= 8;
10156 Value |= op;
10157 // op: Rdd32
10158 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10159 op &= UINT64_C(31);
10160 Value |= op;
10161 break;
10162 }
10163 case Hexagon::S2_asl_r_p_acc:
10164 case Hexagon::S2_asl_r_p_and:
10165 case Hexagon::S2_asl_r_p_nac:
10166 case Hexagon::S2_asl_r_p_or:
10167 case Hexagon::S2_asl_r_p_xor:
10168 case Hexagon::S2_asr_r_p_acc:
10169 case Hexagon::S2_asr_r_p_and:
10170 case Hexagon::S2_asr_r_p_nac:
10171 case Hexagon::S2_asr_r_p_or:
10172 case Hexagon::S2_asr_r_p_xor:
10173 case Hexagon::S2_lsl_r_p_acc:
10174 case Hexagon::S2_lsl_r_p_and:
10175 case Hexagon::S2_lsl_r_p_nac:
10176 case Hexagon::S2_lsl_r_p_or:
10177 case Hexagon::S2_lsl_r_p_xor:
10178 case Hexagon::S2_lsr_r_p_acc:
10179 case Hexagon::S2_lsr_r_p_and:
10180 case Hexagon::S2_lsr_r_p_nac:
10181 case Hexagon::S2_lsr_r_p_or:
10182 case Hexagon::S2_lsr_r_p_xor:
10183 case Hexagon::S2_vrcnegh: {
10184 // op: Rss32
10185 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10186 op &= UINT64_C(31);
10187 op <<= 16;
10188 Value |= op;
10189 // op: Rt32
10190 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10191 op &= UINT64_C(31);
10192 op <<= 8;
10193 Value |= op;
10194 // op: Rxx32
10195 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10196 op &= UINT64_C(31);
10197 Value |= op;
10198 break;
10199 }
10200 case Hexagon::A4_addp_c:
10201 case Hexagon::A4_subp_c: {
10202 // op: Rss32
10203 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10204 op &= UINT64_C(31);
10205 op <<= 16;
10206 Value |= op;
10207 // op: Rtt32
10208 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10209 op &= UINT64_C(31);
10210 op <<= 8;
10211 Value |= op;
10212 // op: Rdd32
10213 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10214 op &= UINT64_C(31);
10215 Value |= op;
10216 // op: Px4
10217 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10218 op &= UINT64_C(3);
10219 op <<= 5;
10220 Value |= op;
10221 break;
10222 }
10223 case Hexagon::A2_vraddub_acc:
10224 case Hexagon::A2_vrsadub_acc:
10225 case Hexagon::F2_dfmpyhh:
10226 case Hexagon::F2_dfmpylh:
10227 case Hexagon::M2_mmachs_rs0:
10228 case Hexagon::M2_mmachs_rs1:
10229 case Hexagon::M2_mmachs_s0:
10230 case Hexagon::M2_mmachs_s1:
10231 case Hexagon::M2_mmacls_rs0:
10232 case Hexagon::M2_mmacls_rs1:
10233 case Hexagon::M2_mmacls_s0:
10234 case Hexagon::M2_mmacls_s1:
10235 case Hexagon::M2_mmacuhs_rs0:
10236 case Hexagon::M2_mmacuhs_rs1:
10237 case Hexagon::M2_mmacuhs_s0:
10238 case Hexagon::M2_mmacuhs_s1:
10239 case Hexagon::M2_mmaculs_rs0:
10240 case Hexagon::M2_mmaculs_rs1:
10241 case Hexagon::M2_mmaculs_s0:
10242 case Hexagon::M2_mmaculs_s1:
10243 case Hexagon::M2_vcmac_s0_sat_i:
10244 case Hexagon::M2_vcmac_s0_sat_r:
10245 case Hexagon::M2_vdmacs_s0:
10246 case Hexagon::M2_vdmacs_s1:
10247 case Hexagon::M2_vmac2es:
10248 case Hexagon::M2_vmac2es_s0:
10249 case Hexagon::M2_vmac2es_s1:
10250 case Hexagon::M2_vrcmaci_s0:
10251 case Hexagon::M2_vrcmaci_s0c:
10252 case Hexagon::M2_vrcmacr_s0:
10253 case Hexagon::M2_vrcmacr_s0c:
10254 case Hexagon::M2_vrcmpys_acc_s1_h:
10255 case Hexagon::M2_vrcmpys_acc_s1_l:
10256 case Hexagon::M2_vrmac_s0:
10257 case Hexagon::M4_vrmpyeh_acc_s0:
10258 case Hexagon::M4_vrmpyeh_acc_s1:
10259 case Hexagon::M4_vrmpyoh_acc_s0:
10260 case Hexagon::M4_vrmpyoh_acc_s1:
10261 case Hexagon::M4_xor_xacc:
10262 case Hexagon::M5_vdmacbsu:
10263 case Hexagon::M5_vrmacbsu:
10264 case Hexagon::M5_vrmacbuu:
10265 case Hexagon::M7_dcmpyiw_acc:
10266 case Hexagon::M7_dcmpyiwc_acc:
10267 case Hexagon::M7_dcmpyrw_acc:
10268 case Hexagon::M7_dcmpyrwc_acc:
10269 case Hexagon::S2_insertp_rp: {
10270 // op: Rss32
10271 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10272 op &= UINT64_C(31);
10273 op <<= 16;
10274 Value |= op;
10275 // op: Rtt32
10276 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10277 op &= UINT64_C(31);
10278 op <<= 8;
10279 Value |= op;
10280 // op: Rxx32
10281 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10282 op &= UINT64_C(31);
10283 Value |= op;
10284 break;
10285 }
10286 case Hexagon::A4_vrmaxh:
10287 case Hexagon::A4_vrmaxuh:
10288 case Hexagon::A4_vrmaxuw:
10289 case Hexagon::A4_vrmaxw:
10290 case Hexagon::A4_vrminh:
10291 case Hexagon::A4_vrminuh:
10292 case Hexagon::A4_vrminuw:
10293 case Hexagon::A4_vrminw: {
10294 // op: Rss32
10295 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10296 op &= UINT64_C(31);
10297 op <<= 16;
10298 Value |= op;
10299 // op: Ru32
10300 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10301 op &= UINT64_C(31);
10302 Value |= op;
10303 // op: Rxx32
10304 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10305 op &= UINT64_C(31);
10306 op <<= 8;
10307 Value |= op;
10308 break;
10309 }
10310 case Hexagon::A5_ACS: {
10311 // op: Rss32
10312 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10313 op &= UINT64_C(31);
10314 op <<= 16;
10315 Value |= op;
10316 // op: Rtt32
10317 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
10318 op &= UINT64_C(31);
10319 op <<= 8;
10320 Value |= op;
10321 // op: Rxx32
10322 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10323 op &= UINT64_C(31);
10324 Value |= op;
10325 // op: Pe4
10326 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10327 op &= UINT64_C(3);
10328 op <<= 5;
10329 Value |= op;
10330 break;
10331 }
10332 case Hexagon::V6_vgathermh:
10333 case Hexagon::V6_vgathermw: {
10334 // op: Rt32
10335 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10336 op &= UINT64_C(31);
10337 op <<= 16;
10338 Value |= op;
10339 // op: Mu2
10340 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10341 op &= UINT64_C(1);
10342 op <<= 13;
10343 Value |= op;
10344 // op: Vv32
10345 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10346 op &= UINT64_C(31);
10347 Value |= op;
10348 break;
10349 }
10350 case Hexagon::V6_vscattermh:
10351 case Hexagon::V6_vscattermh_add:
10352 case Hexagon::V6_vscattermw:
10353 case Hexagon::V6_vscattermw_add: {
10354 // op: Rt32
10355 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10356 op &= UINT64_C(31);
10357 op <<= 16;
10358 Value |= op;
10359 // op: Mu2
10360 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10361 op &= UINT64_C(1);
10362 op <<= 13;
10363 Value |= op;
10364 // op: Vv32
10365 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10366 op &= UINT64_C(31);
10367 op <<= 8;
10368 Value |= op;
10369 // op: Vw32
10370 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10371 op &= UINT64_C(31);
10372 Value |= op;
10373 break;
10374 }
10375 case Hexagon::V6_vgathermhw: {
10376 // op: Rt32
10377 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10378 op &= UINT64_C(31);
10379 op <<= 16;
10380 Value |= op;
10381 // op: Mu2
10382 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10383 op &= UINT64_C(1);
10384 op <<= 13;
10385 Value |= op;
10386 // op: Vvv32
10387 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10388 op &= UINT64_C(31);
10389 Value |= op;
10390 break;
10391 }
10392 case Hexagon::V6_vscattermhw:
10393 case Hexagon::V6_vscattermhw_add: {
10394 // op: Rt32
10395 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10396 op &= UINT64_C(31);
10397 op <<= 16;
10398 Value |= op;
10399 // op: Mu2
10400 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10401 op &= UINT64_C(1);
10402 op <<= 13;
10403 Value |= op;
10404 // op: Vvv32
10405 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10406 op &= UINT64_C(31);
10407 op <<= 8;
10408 Value |= op;
10409 // op: Vw32
10410 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10411 op &= UINT64_C(31);
10412 Value |= op;
10413 break;
10414 }
10415 case Hexagon::V6_pred_scalar2:
10416 case Hexagon::V6_pred_scalar2v2: {
10417 // op: Rt32
10418 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10419 op &= UINT64_C(31);
10420 op <<= 16;
10421 Value |= op;
10422 // op: Qd4
10423 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10424 op &= UINT64_C(3);
10425 Value |= op;
10426 break;
10427 }
10428 case Hexagon::V6_lvsplatb:
10429 case Hexagon::V6_lvsplath:
10430 case Hexagon::V6_lvsplatw:
10431 case Hexagon::V6_zextract: {
10432 // op: Rt32
10433 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10434 op &= UINT64_C(31);
10435 op <<= 16;
10436 Value |= op;
10437 // op: Vd32
10438 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10439 op &= UINT64_C(31);
10440 Value |= op;
10441 break;
10442 }
10443 case Hexagon::A2_addh_h16_hh:
10444 case Hexagon::A2_addh_h16_hl:
10445 case Hexagon::A2_addh_h16_lh:
10446 case Hexagon::A2_addh_h16_ll:
10447 case Hexagon::A2_addh_h16_sat_hh:
10448 case Hexagon::A2_addh_h16_sat_hl:
10449 case Hexagon::A2_addh_h16_sat_lh:
10450 case Hexagon::A2_addh_h16_sat_ll:
10451 case Hexagon::A2_addh_l16_hl:
10452 case Hexagon::A2_addh_l16_ll:
10453 case Hexagon::A2_addh_l16_sat_hl:
10454 case Hexagon::A2_addh_l16_sat_ll:
10455 case Hexagon::A2_combine_hh:
10456 case Hexagon::A2_combine_hl:
10457 case Hexagon::A2_combine_lh:
10458 case Hexagon::A2_combine_ll:
10459 case Hexagon::A2_min:
10460 case Hexagon::A2_minu:
10461 case Hexagon::A2_sub:
10462 case Hexagon::A2_subh_h16_hh:
10463 case Hexagon::A2_subh_h16_hl:
10464 case Hexagon::A2_subh_h16_lh:
10465 case Hexagon::A2_subh_h16_ll:
10466 case Hexagon::A2_subh_h16_sat_hh:
10467 case Hexagon::A2_subh_h16_sat_hl:
10468 case Hexagon::A2_subh_h16_sat_lh:
10469 case Hexagon::A2_subh_h16_sat_ll:
10470 case Hexagon::A2_subh_l16_hl:
10471 case Hexagon::A2_subh_l16_ll:
10472 case Hexagon::A2_subh_l16_sat_hl:
10473 case Hexagon::A2_subh_l16_sat_ll:
10474 case Hexagon::A2_subsat:
10475 case Hexagon::A2_svnavgh:
10476 case Hexagon::A2_svsubh:
10477 case Hexagon::A2_svsubhs:
10478 case Hexagon::A2_svsubuhs:
10479 case Hexagon::A4_andn:
10480 case Hexagon::A4_orn:
10481 case Hexagon::dep_A2_subsat: {
10482 // op: Rt32
10483 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10484 op &= UINT64_C(31);
10485 op <<= 8;
10486 Value |= op;
10487 // op: Rs32
10488 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10489 op &= UINT64_C(31);
10490 op <<= 16;
10491 Value |= op;
10492 // op: Rd32
10493 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10494 op &= UINT64_C(31);
10495 Value |= op;
10496 break;
10497 }
10498 case Hexagon::V6_vinsertwr: {
10499 // op: Rt32
10500 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10501 op &= UINT64_C(31);
10502 op <<= 16;
10503 Value |= op;
10504 // op: Vx32
10505 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10506 op &= UINT64_C(31);
10507 Value |= op;
10508 break;
10509 }
10510 case Hexagon::M2_subacc: {
10511 // op: Rt32
10512 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10513 op &= UINT64_C(31);
10514 op <<= 8;
10515 Value |= op;
10516 // op: Rs32
10517 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10518 op &= UINT64_C(31);
10519 op <<= 16;
10520 Value |= op;
10521 // op: Rx32
10522 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10523 op &= UINT64_C(31);
10524 Value |= op;
10525 break;
10526 }
10527 case Hexagon::V6_vdeal:
10528 case Hexagon::V6_vshuff: {
10529 // op: Rt32
10530 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
10531 op &= UINT64_C(31);
10532 op <<= 16;
10533 Value |= op;
10534 // op: Vy32
10535 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10536 op &= UINT64_C(31);
10537 op <<= 8;
10538 Value |= op;
10539 // op: Vx32
10540 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10541 op &= UINT64_C(31);
10542 Value |= op;
10543 break;
10544 }
10545 case Hexagon::S2_valignrb: {
10546 // op: Rtt32
10547 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10548 op &= UINT64_C(31);
10549 op <<= 8;
10550 Value |= op;
10551 // op: Rss32
10552 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10553 op &= UINT64_C(31);
10554 op <<= 16;
10555 Value |= op;
10556 // op: Pu4
10557 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10558 op &= UINT64_C(3);
10559 op <<= 5;
10560 Value |= op;
10561 // op: Rdd32
10562 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10563 op &= UINT64_C(31);
10564 Value |= op;
10565 break;
10566 }
10567 case Hexagon::A2_minp:
10568 case Hexagon::A2_minup:
10569 case Hexagon::A2_subp:
10570 case Hexagon::A2_vmaxb:
10571 case Hexagon::A2_vmaxh:
10572 case Hexagon::A2_vmaxub:
10573 case Hexagon::A2_vmaxuh:
10574 case Hexagon::A2_vmaxuw:
10575 case Hexagon::A2_vmaxw:
10576 case Hexagon::A2_vminb:
10577 case Hexagon::A2_vminh:
10578 case Hexagon::A2_vminub:
10579 case Hexagon::A2_vminuh:
10580 case Hexagon::A2_vminuw:
10581 case Hexagon::A2_vminw:
10582 case Hexagon::A2_vnavgh:
10583 case Hexagon::A2_vnavghcr:
10584 case Hexagon::A2_vnavghr:
10585 case Hexagon::A2_vnavgw:
10586 case Hexagon::A2_vnavgwcr:
10587 case Hexagon::A2_vnavgwr:
10588 case Hexagon::A2_vsubh:
10589 case Hexagon::A2_vsubhs:
10590 case Hexagon::A2_vsubub:
10591 case Hexagon::A2_vsububs:
10592 case Hexagon::A2_vsubuhs:
10593 case Hexagon::A2_vsubw:
10594 case Hexagon::A2_vsubws:
10595 case Hexagon::A4_andnp:
10596 case Hexagon::A4_ornp:
10597 case Hexagon::M2_vabsdiffh:
10598 case Hexagon::M2_vabsdiffw:
10599 case Hexagon::M6_vabsdiffb:
10600 case Hexagon::M6_vabsdiffub:
10601 case Hexagon::S2_shuffob:
10602 case Hexagon::S2_shuffoh: {
10603 // op: Rtt32
10604 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10605 op &= UINT64_C(31);
10606 op <<= 8;
10607 Value |= op;
10608 // op: Rss32
10609 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10610 op &= UINT64_C(31);
10611 op <<= 16;
10612 Value |= op;
10613 // op: Rdd32
10614 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10615 op &= UINT64_C(31);
10616 Value |= op;
10617 break;
10618 }
10619 case Hexagon::A6_vminub_RdP: {
10620 // op: Rtt32
10621 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10622 op &= UINT64_C(31);
10623 op <<= 8;
10624 Value |= op;
10625 // op: Rss32
10626 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10627 op &= UINT64_C(31);
10628 op <<= 16;
10629 Value |= op;
10630 // op: Rdd32
10631 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10632 op &= UINT64_C(31);
10633 Value |= op;
10634 // op: Pe4
10635 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10636 op &= UINT64_C(3);
10637 op <<= 5;
10638 Value |= op;
10639 break;
10640 }
10641 case Hexagon::M4_mpyrr_addr: {
10642 // op: Ru32
10643 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10644 op &= UINT64_C(31);
10645 Value |= op;
10646 // op: Rs32
10647 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10648 op &= UINT64_C(31);
10649 op <<= 16;
10650 Value |= op;
10651 // op: Ry32
10652 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10653 op &= UINT64_C(31);
10654 op <<= 8;
10655 Value |= op;
10656 break;
10657 }
10658 case Hexagon::V6_extractw: {
10659 // op: Vu32
10660 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10661 op &= UINT64_C(31);
10662 op <<= 8;
10663 Value |= op;
10664 // op: Rs32
10665 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10666 op &= UINT64_C(31);
10667 op <<= 16;
10668 Value |= op;
10669 // op: Rd32
10670 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10671 op &= UINT64_C(31);
10672 Value |= op;
10673 break;
10674 }
10675 case Hexagon::V6_vandvrt: {
10676 // op: Vu32
10677 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10678 op &= UINT64_C(31);
10679 op <<= 8;
10680 Value |= op;
10681 // op: Rt32
10682 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10683 op &= UINT64_C(31);
10684 op <<= 16;
10685 Value |= op;
10686 // op: Qd4
10687 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10688 op &= UINT64_C(3);
10689 Value |= op;
10690 break;
10691 }
10692 case Hexagon::V6_vaslh:
10693 case Hexagon::V6_vaslw:
10694 case Hexagon::V6_vasrh:
10695 case Hexagon::V6_vasrw:
10696 case Hexagon::V6_vdmpybus:
10697 case Hexagon::V6_vdmpyhb:
10698 case Hexagon::V6_vdmpyhsat:
10699 case Hexagon::V6_vdmpyhsusat:
10700 case Hexagon::V6_vlsrb:
10701 case Hexagon::V6_vlsrh:
10702 case Hexagon::V6_vlsrw:
10703 case Hexagon::V6_vmpyhsrs:
10704 case Hexagon::V6_vmpyhss:
10705 case Hexagon::V6_vmpyihb:
10706 case Hexagon::V6_vmpyiwb:
10707 case Hexagon::V6_vmpyiwh:
10708 case Hexagon::V6_vmpyiwub:
10709 case Hexagon::V6_vmpyuhe:
10710 case Hexagon::V6_vrmpybus:
10711 case Hexagon::V6_vrmpyub:
10712 case Hexagon::V6_vror: {
10713 // op: Vu32
10714 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10715 op &= UINT64_C(31);
10716 op <<= 8;
10717 Value |= op;
10718 // op: Rt32
10719 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10720 op &= UINT64_C(31);
10721 op <<= 16;
10722 Value |= op;
10723 // op: Vd32
10724 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10725 op &= UINT64_C(31);
10726 Value |= op;
10727 break;
10728 }
10729 case Hexagon::V6_vmpybus:
10730 case Hexagon::V6_vmpyh:
10731 case Hexagon::V6_vmpyub:
10732 case Hexagon::V6_vmpyuh: {
10733 // op: Vu32
10734 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10735 op &= UINT64_C(31);
10736 op <<= 8;
10737 Value |= op;
10738 // op: Rt32
10739 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10740 op &= UINT64_C(31);
10741 op <<= 16;
10742 Value |= op;
10743 // op: Vdd32
10744 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10745 op &= UINT64_C(31);
10746 Value |= op;
10747 break;
10748 }
10749 case Hexagon::V6_vrmpyzbb_rt:
10750 case Hexagon::V6_vrmpyzbub_rt:
10751 case Hexagon::V6_vrmpyzcb_rt:
10752 case Hexagon::V6_vrmpyzcbs_rt:
10753 case Hexagon::V6_vrmpyznb_rt: {
10754 // op: Vu32
10755 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10756 op &= UINT64_C(31);
10757 op <<= 8;
10758 Value |= op;
10759 // op: Rt8
10760 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10761 op &= UINT64_C(7);
10762 op <<= 16;
10763 Value |= op;
10764 // op: Vdddd32
10765 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10766 op &= UINT64_C(31);
10767 Value |= op;
10768 break;
10769 }
10770 case Hexagon::V6_vlut4: {
10771 // op: Vu32
10772 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10773 op &= UINT64_C(31);
10774 op <<= 8;
10775 Value |= op;
10776 // op: Rtt32
10777 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10778 op &= UINT64_C(31);
10779 op <<= 16;
10780 Value |= op;
10781 // op: Vd32
10782 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10783 op &= UINT64_C(31);
10784 Value |= op;
10785 break;
10786 }
10787 case Hexagon::V6_vrmpybub_rtt:
10788 case Hexagon::V6_vrmpyub_rtt: {
10789 // op: Vu32
10790 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10791 op &= UINT64_C(31);
10792 op <<= 8;
10793 Value |= op;
10794 // op: Rtt32
10795 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10796 op &= UINT64_C(31);
10797 op <<= 16;
10798 Value |= op;
10799 // op: Vdd32
10800 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10801 op &= UINT64_C(31);
10802 Value |= op;
10803 break;
10804 }
10805 case Hexagon::V6_vabsb:
10806 case Hexagon::V6_vabsb_sat:
10807 case Hexagon::V6_vabsh:
10808 case Hexagon::V6_vabsh_sat:
10809 case Hexagon::V6_vabsw:
10810 case Hexagon::V6_vabsw_sat:
10811 case Hexagon::V6_vassign:
10812 case Hexagon::V6_vcl0h:
10813 case Hexagon::V6_vcl0w:
10814 case Hexagon::V6_vdealb:
10815 case Hexagon::V6_vdealh:
10816 case Hexagon::V6_vnormamth:
10817 case Hexagon::V6_vnormamtw:
10818 case Hexagon::V6_vnot:
10819 case Hexagon::V6_vpopcounth:
10820 case Hexagon::V6_vshuffb:
10821 case Hexagon::V6_vshuffh: {
10822 // op: Vu32
10823 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10824 op &= UINT64_C(31);
10825 op <<= 8;
10826 Value |= op;
10827 // op: Vd32
10828 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10829 op &= UINT64_C(31);
10830 Value |= op;
10831 break;
10832 }
10833 case Hexagon::V6_vsb:
10834 case Hexagon::V6_vsh:
10835 case Hexagon::V6_vunpackb:
10836 case Hexagon::V6_vunpackh:
10837 case Hexagon::V6_vunpackub:
10838 case Hexagon::V6_vunpackuh:
10839 case Hexagon::V6_vzb:
10840 case Hexagon::V6_vzh: {
10841 // op: Vu32
10842 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10843 op &= UINT64_C(31);
10844 op <<= 8;
10845 Value |= op;
10846 // op: Vdd32
10847 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10848 op &= UINT64_C(31);
10849 Value |= op;
10850 break;
10851 }
10852 case Hexagon::V6_veqb:
10853 case Hexagon::V6_veqh:
10854 case Hexagon::V6_veqw:
10855 case Hexagon::V6_vgtb:
10856 case Hexagon::V6_vgth:
10857 case Hexagon::V6_vgtub:
10858 case Hexagon::V6_vgtuh:
10859 case Hexagon::V6_vgtuw:
10860 case Hexagon::V6_vgtw: {
10861 // op: Vu32
10862 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10863 op &= UINT64_C(31);
10864 op <<= 8;
10865 Value |= op;
10866 // op: Vv32
10867 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10868 op &= UINT64_C(31);
10869 op <<= 16;
10870 Value |= op;
10871 // op: Qd4
10872 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10873 op &= UINT64_C(3);
10874 Value |= op;
10875 break;
10876 }
10877 case Hexagon::V6_vaddcarrysat: {
10878 // op: Vu32
10879 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
10880 op &= UINT64_C(31);
10881 op <<= 8;
10882 Value |= op;
10883 // op: Vv32
10884 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
10885 op &= UINT64_C(31);
10886 op <<= 16;
10887 Value |= op;
10888 // op: Qs4
10889 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
10890 op &= UINT64_C(3);
10891 op <<= 5;
10892 Value |= op;
10893 // op: Vd32
10894 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
10895 op &= UINT64_C(31);
10896 Value |= op;
10897 break;
10898 }
10899 case Hexagon::V6_vabsdiffh:
10900 case Hexagon::V6_vabsdiffub:
10901 case Hexagon::V6_vabsdiffuh:
10902 case Hexagon::V6_vabsdiffw:
10903 case Hexagon::V6_vaddb:
10904 case Hexagon::V6_vaddbsat:
10905 case Hexagon::V6_vaddclbh:
10906 case Hexagon::V6_vaddclbw:
10907 case Hexagon::V6_vaddh:
10908 case Hexagon::V6_vaddhsat:
10909 case Hexagon::V6_vaddubsat:
10910 case Hexagon::V6_vaddububb_sat:
10911 case Hexagon::V6_vadduhsat:
10912 case Hexagon::V6_vadduwsat:
10913 case Hexagon::V6_vaddw:
10914 case Hexagon::V6_vaddwsat:
10915 case Hexagon::V6_vand:
10916 case Hexagon::V6_vaslhv:
10917 case Hexagon::V6_vaslwv:
10918 case Hexagon::V6_vasrhv:
10919 case Hexagon::V6_vasrwv:
10920 case Hexagon::V6_vavgb:
10921 case Hexagon::V6_vavgbrnd:
10922 case Hexagon::V6_vavgh:
10923 case Hexagon::V6_vavghrnd:
10924 case Hexagon::V6_vavgub:
10925 case Hexagon::V6_vavgubrnd:
10926 case Hexagon::V6_vavguh:
10927 case Hexagon::V6_vavguhrnd:
10928 case Hexagon::V6_vavguw:
10929 case Hexagon::V6_vavguwrnd:
10930 case Hexagon::V6_vavgw:
10931 case Hexagon::V6_vavgwrnd:
10932 case Hexagon::V6_vdealb4w:
10933 case Hexagon::V6_vdelta:
10934 case Hexagon::V6_vdmpyhvsat:
10935 case Hexagon::V6_vlsrhv:
10936 case Hexagon::V6_vlsrwv:
10937 case Hexagon::V6_vmaxb:
10938 case Hexagon::V6_vmaxh:
10939 case Hexagon::V6_vmaxub:
10940 case Hexagon::V6_vmaxuh:
10941 case Hexagon::V6_vmaxw:
10942 case Hexagon::V6_vminb:
10943 case Hexagon::V6_vminh:
10944 case Hexagon::V6_vminub:
10945 case Hexagon::V6_vminuh:
10946 case Hexagon::V6_vminw:
10947 case Hexagon::V6_vmpyewuh:
10948 case Hexagon::V6_vmpyhvsrs:
10949 case Hexagon::V6_vmpyieoh:
10950 case Hexagon::V6_vmpyiewuh:
10951 case Hexagon::V6_vmpyih:
10952 case Hexagon::V6_vmpyiowh:
10953 case Hexagon::V6_vmpyowh:
10954 case Hexagon::V6_vmpyowh_rnd:
10955 case Hexagon::V6_vnavgb:
10956 case Hexagon::V6_vnavgh:
10957 case Hexagon::V6_vnavgub:
10958 case Hexagon::V6_vnavgw:
10959 case Hexagon::V6_vor:
10960 case Hexagon::V6_vpackeb:
10961 case Hexagon::V6_vpackeh:
10962 case Hexagon::V6_vpackhb_sat:
10963 case Hexagon::V6_vpackhub_sat:
10964 case Hexagon::V6_vpackob:
10965 case Hexagon::V6_vpackoh:
10966 case Hexagon::V6_vpackwh_sat:
10967 case Hexagon::V6_vpackwuh_sat:
10968 case Hexagon::V6_vrdelta:
10969 case Hexagon::V6_vrmpybusv:
10970 case Hexagon::V6_vrmpybv:
10971 case Hexagon::V6_vrmpyubv:
10972 case Hexagon::V6_vrotr:
10973 case Hexagon::V6_vroundhb:
10974 case Hexagon::V6_vroundhub:
10975 case Hexagon::V6_vrounduhub:
10976 case Hexagon::V6_vrounduwuh:
10977 case Hexagon::V6_vroundwh:
10978 case Hexagon::V6_vroundwuh:
10979 case Hexagon::V6_vsatdw:
10980 case Hexagon::V6_vsathub:
10981 case Hexagon::V6_vsatuwuh:
10982 case Hexagon::V6_vsatwh:
10983 case Hexagon::V6_vshufeh:
10984 case Hexagon::V6_vshuffeb:
10985 case Hexagon::V6_vshuffob:
10986 case Hexagon::V6_vshufoh:
10987 case Hexagon::V6_vsubb:
10988 case Hexagon::V6_vsubbsat:
10989 case Hexagon::V6_vsubh:
10990 case Hexagon::V6_vsubhsat:
10991 case Hexagon::V6_vsububsat:
10992 case Hexagon::V6_vsubububb_sat:
10993 case Hexagon::V6_vsubuhsat:
10994 case Hexagon::V6_vsubuwsat:
10995 case Hexagon::V6_vsubw:
10996 case Hexagon::V6_vsubwsat:
10997 case Hexagon::V6_vxor: {
10998 // op: Vu32
10999 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11000 op &= UINT64_C(31);
11001 op <<= 8;
11002 Value |= op;
11003 // op: Vv32
11004 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11005 op &= UINT64_C(31);
11006 op <<= 16;
11007 Value |= op;
11008 // op: Vd32
11009 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11010 op &= UINT64_C(31);
11011 Value |= op;
11012 break;
11013 }
11014 case Hexagon::V6_vaddhw:
11015 case Hexagon::V6_vaddubh:
11016 case Hexagon::V6_vadduhw:
11017 case Hexagon::V6_vcombine:
11018 case Hexagon::V6_vmpybusv:
11019 case Hexagon::V6_vmpybv:
11020 case Hexagon::V6_vmpyewuh_64:
11021 case Hexagon::V6_vmpyhus:
11022 case Hexagon::V6_vmpyhv:
11023 case Hexagon::V6_vmpyubv:
11024 case Hexagon::V6_vmpyuhv:
11025 case Hexagon::V6_vshufoeb:
11026 case Hexagon::V6_vshufoeh:
11027 case Hexagon::V6_vsubhw:
11028 case Hexagon::V6_vsububh:
11029 case Hexagon::V6_vsubuhw: {
11030 // op: Vu32
11031 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11032 op &= UINT64_C(31);
11033 op <<= 8;
11034 Value |= op;
11035 // op: Vv32
11036 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11037 op &= UINT64_C(31);
11038 op <<= 16;
11039 Value |= op;
11040 // op: Vdd32
11041 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11042 op &= UINT64_C(31);
11043 Value |= op;
11044 break;
11045 }
11046 case Hexagon::V6_valignb:
11047 case Hexagon::V6_vasrhbrndsat:
11048 case Hexagon::V6_vasrhbsat:
11049 case Hexagon::V6_vasrhubrndsat:
11050 case Hexagon::V6_vasrhubsat:
11051 case Hexagon::V6_vasruhubrndsat:
11052 case Hexagon::V6_vasruhubsat:
11053 case Hexagon::V6_vasruwuhrndsat:
11054 case Hexagon::V6_vasruwuhsat:
11055 case Hexagon::V6_vasrwh:
11056 case Hexagon::V6_vasrwhrndsat:
11057 case Hexagon::V6_vasrwhsat:
11058 case Hexagon::V6_vasrwuhrndsat:
11059 case Hexagon::V6_vasrwuhsat:
11060 case Hexagon::V6_vlalignb:
11061 case Hexagon::V6_vlutvvb:
11062 case Hexagon::V6_vlutvvb_nm: {
11063 // op: Vu32
11064 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11065 op &= UINT64_C(31);
11066 op <<= 8;
11067 Value |= op;
11068 // op: Vv32
11069 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11070 op &= UINT64_C(31);
11071 op <<= 19;
11072 Value |= op;
11073 // op: Rt8
11074 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11075 op &= UINT64_C(7);
11076 op <<= 16;
11077 Value |= op;
11078 // op: Vd32
11079 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11080 op &= UINT64_C(31);
11081 Value |= op;
11082 break;
11083 }
11084 case Hexagon::V6_vdealvdd:
11085 case Hexagon::V6_vlutvwh:
11086 case Hexagon::V6_vlutvwh_nm:
11087 case Hexagon::V6_vshuffvdd: {
11088 // op: Vu32
11089 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11090 op &= UINT64_C(31);
11091 op <<= 8;
11092 Value |= op;
11093 // op: Vv32
11094 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11095 op &= UINT64_C(31);
11096 op <<= 19;
11097 Value |= op;
11098 // op: Rt8
11099 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11100 op &= UINT64_C(7);
11101 op <<= 16;
11102 Value |= op;
11103 // op: Vdd32
11104 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11105 op &= UINT64_C(31);
11106 Value |= op;
11107 break;
11108 }
11109 case Hexagon::V6_vandvrt_acc: {
11110 // op: Vu32
11111 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11112 op &= UINT64_C(31);
11113 op <<= 8;
11114 Value |= op;
11115 // op: Rt32
11116 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11117 op &= UINT64_C(31);
11118 op <<= 16;
11119 Value |= op;
11120 // op: Qx4
11121 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11122 op &= UINT64_C(3);
11123 Value |= op;
11124 break;
11125 }
11126 case Hexagon::V6_vaslh_acc:
11127 case Hexagon::V6_vaslw_acc:
11128 case Hexagon::V6_vasrh_acc:
11129 case Hexagon::V6_vasrw_acc:
11130 case Hexagon::V6_vdmpybus_acc:
11131 case Hexagon::V6_vdmpyhb_acc:
11132 case Hexagon::V6_vdmpyhsat_acc:
11133 case Hexagon::V6_vdmpyhsusat_acc:
11134 case Hexagon::V6_vmpyihb_acc:
11135 case Hexagon::V6_vmpyiwb_acc:
11136 case Hexagon::V6_vmpyiwh_acc:
11137 case Hexagon::V6_vmpyiwub_acc:
11138 case Hexagon::V6_vmpyuhe_acc:
11139 case Hexagon::V6_vrmpybus_acc:
11140 case Hexagon::V6_vrmpyub_acc: {
11141 // op: Vu32
11142 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11143 op &= UINT64_C(31);
11144 op <<= 8;
11145 Value |= op;
11146 // op: Rt32
11147 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11148 op &= UINT64_C(31);
11149 op <<= 16;
11150 Value |= op;
11151 // op: Vx32
11152 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11153 op &= UINT64_C(31);
11154 Value |= op;
11155 break;
11156 }
11157 case Hexagon::V6_vmpybus_acc:
11158 case Hexagon::V6_vmpyh_acc:
11159 case Hexagon::V6_vmpyhsat_acc:
11160 case Hexagon::V6_vmpyub_acc:
11161 case Hexagon::V6_vmpyuh_acc: {
11162 // op: Vu32
11163 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11164 op &= UINT64_C(31);
11165 op <<= 8;
11166 Value |= op;
11167 // op: Rt32
11168 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11169 op &= UINT64_C(31);
11170 op <<= 16;
11171 Value |= op;
11172 // op: Vxx32
11173 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11174 op &= UINT64_C(31);
11175 Value |= op;
11176 break;
11177 }
11178 case Hexagon::V6_vrmpyzbb_rt_acc:
11179 case Hexagon::V6_vrmpyzbub_rt_acc:
11180 case Hexagon::V6_vrmpyzcb_rt_acc:
11181 case Hexagon::V6_vrmpyzcbs_rt_acc:
11182 case Hexagon::V6_vrmpyznb_rt_acc: {
11183 // op: Vu32
11184 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11185 op &= UINT64_C(31);
11186 op <<= 8;
11187 Value |= op;
11188 // op: Rt8
11189 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11190 op &= UINT64_C(7);
11191 op <<= 16;
11192 Value |= op;
11193 // op: Vyyyy32
11194 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11195 op &= UINT64_C(31);
11196 Value |= op;
11197 break;
11198 }
11199 case Hexagon::V6_vmpahhsat:
11200 case Hexagon::V6_vmpauhuhsat:
11201 case Hexagon::V6_vmpsuhuhsat: {
11202 // op: Vu32
11203 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11204 op &= UINT64_C(31);
11205 op <<= 8;
11206 Value |= op;
11207 // op: Rtt32
11208 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11209 op &= UINT64_C(31);
11210 op <<= 16;
11211 Value |= op;
11212 // op: Vx32
11213 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11214 op &= UINT64_C(31);
11215 Value |= op;
11216 break;
11217 }
11218 case Hexagon::V6_vrmpybub_rtt_acc:
11219 case Hexagon::V6_vrmpyub_rtt_acc: {
11220 // op: Vu32
11221 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11222 op &= UINT64_C(31);
11223 op <<= 8;
11224 Value |= op;
11225 // op: Rtt32
11226 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11227 op &= UINT64_C(31);
11228 op <<= 16;
11229 Value |= op;
11230 // op: Vxx32
11231 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11232 op &= UINT64_C(31);
11233 Value |= op;
11234 break;
11235 }
11236 case Hexagon::V6_vrmpyzbb_rx:
11237 case Hexagon::V6_vrmpyzbub_rx:
11238 case Hexagon::V6_vrmpyzcb_rx:
11239 case Hexagon::V6_vrmpyzcbs_rx:
11240 case Hexagon::V6_vrmpyznb_rx: {
11241 // op: Vu32
11242 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11243 op &= UINT64_C(31);
11244 op <<= 8;
11245 Value |= op;
11246 // op: Vdddd32
11247 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11248 op &= UINT64_C(31);
11249 Value |= op;
11250 // op: Rx8
11251 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11252 op &= UINT64_C(7);
11253 op <<= 16;
11254 Value |= op;
11255 break;
11256 }
11257 case Hexagon::V6_veqb_and:
11258 case Hexagon::V6_veqb_or:
11259 case Hexagon::V6_veqb_xor:
11260 case Hexagon::V6_veqh_and:
11261 case Hexagon::V6_veqh_or:
11262 case Hexagon::V6_veqh_xor:
11263 case Hexagon::V6_veqw_and:
11264 case Hexagon::V6_veqw_or:
11265 case Hexagon::V6_veqw_xor:
11266 case Hexagon::V6_vgtb_and:
11267 case Hexagon::V6_vgtb_or:
11268 case Hexagon::V6_vgtb_xor:
11269 case Hexagon::V6_vgth_and:
11270 case Hexagon::V6_vgth_or:
11271 case Hexagon::V6_vgth_xor:
11272 case Hexagon::V6_vgtub_and:
11273 case Hexagon::V6_vgtub_or:
11274 case Hexagon::V6_vgtub_xor:
11275 case Hexagon::V6_vgtuh_and:
11276 case Hexagon::V6_vgtuh_or:
11277 case Hexagon::V6_vgtuh_xor:
11278 case Hexagon::V6_vgtuw_and:
11279 case Hexagon::V6_vgtuw_or:
11280 case Hexagon::V6_vgtuw_xor:
11281 case Hexagon::V6_vgtw_and:
11282 case Hexagon::V6_vgtw_or:
11283 case Hexagon::V6_vgtw_xor: {
11284 // op: Vu32
11285 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11286 op &= UINT64_C(31);
11287 op <<= 8;
11288 Value |= op;
11289 // op: Vv32
11290 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11291 op &= UINT64_C(31);
11292 op <<= 16;
11293 Value |= op;
11294 // op: Qx4
11295 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11296 op &= UINT64_C(3);
11297 Value |= op;
11298 break;
11299 }
11300 case Hexagon::V6_vaddcarryo:
11301 case Hexagon::V6_vsubcarryo: {
11302 // op: Vu32
11303 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11304 op &= UINT64_C(31);
11305 op <<= 8;
11306 Value |= op;
11307 // op: Vv32
11308 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11309 op &= UINT64_C(31);
11310 op <<= 16;
11311 Value |= op;
11312 // op: Vd32
11313 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11314 op &= UINT64_C(31);
11315 Value |= op;
11316 // op: Qe4
11317 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11318 op &= UINT64_C(3);
11319 op <<= 5;
11320 Value |= op;
11321 break;
11322 }
11323 case Hexagon::V6_vaddcarry:
11324 case Hexagon::V6_vsubcarry: {
11325 // op: Vu32
11326 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11327 op &= UINT64_C(31);
11328 op <<= 8;
11329 Value |= op;
11330 // op: Vv32
11331 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11332 op &= UINT64_C(31);
11333 op <<= 16;
11334 Value |= op;
11335 // op: Vd32
11336 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11337 op &= UINT64_C(31);
11338 Value |= op;
11339 // op: Qx4
11340 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11341 op &= UINT64_C(3);
11342 op <<= 5;
11343 Value |= op;
11344 break;
11345 }
11346 case Hexagon::V6_vdmpyhvsat_acc:
11347 case Hexagon::V6_vmpyiewh_acc:
11348 case Hexagon::V6_vmpyiewuh_acc:
11349 case Hexagon::V6_vmpyih_acc:
11350 case Hexagon::V6_vmpyowh_rnd_sacc:
11351 case Hexagon::V6_vmpyowh_sacc:
11352 case Hexagon::V6_vrmpybusv_acc:
11353 case Hexagon::V6_vrmpybv_acc:
11354 case Hexagon::V6_vrmpyubv_acc: {
11355 // op: Vu32
11356 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11357 op &= UINT64_C(31);
11358 op <<= 8;
11359 Value |= op;
11360 // op: Vv32
11361 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11362 op &= UINT64_C(31);
11363 op <<= 16;
11364 Value |= op;
11365 // op: Vx32
11366 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11367 op &= UINT64_C(31);
11368 Value |= op;
11369 break;
11370 }
11371 case Hexagon::V6_vaddhw_acc:
11372 case Hexagon::V6_vaddubh_acc:
11373 case Hexagon::V6_vadduhw_acc:
11374 case Hexagon::V6_vasr_into:
11375 case Hexagon::V6_vmpybusv_acc:
11376 case Hexagon::V6_vmpybv_acc:
11377 case Hexagon::V6_vmpyhus_acc:
11378 case Hexagon::V6_vmpyhv_acc:
11379 case Hexagon::V6_vmpyowh_64_acc:
11380 case Hexagon::V6_vmpyubv_acc:
11381 case Hexagon::V6_vmpyuhv_acc: {
11382 // op: Vu32
11383 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11384 op &= UINT64_C(31);
11385 op <<= 8;
11386 Value |= op;
11387 // op: Vv32
11388 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11389 op &= UINT64_C(31);
11390 op <<= 16;
11391 Value |= op;
11392 // op: Vxx32
11393 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11394 op &= UINT64_C(31);
11395 Value |= op;
11396 break;
11397 }
11398 case Hexagon::V6_vlutvvb_oracc: {
11399 // op: Vu32
11400 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11401 op &= UINT64_C(31);
11402 op <<= 8;
11403 Value |= op;
11404 // op: Vv32
11405 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11406 op &= UINT64_C(31);
11407 op <<= 19;
11408 Value |= op;
11409 // op: Rt8
11410 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
11411 op &= UINT64_C(7);
11412 op <<= 16;
11413 Value |= op;
11414 // op: Vx32
11415 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11416 op &= UINT64_C(31);
11417 Value |= op;
11418 break;
11419 }
11420 case Hexagon::V6_vlutvwh_oracc: {
11421 // op: Vu32
11422 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11423 op &= UINT64_C(31);
11424 op <<= 8;
11425 Value |= op;
11426 // op: Vv32
11427 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11428 op &= UINT64_C(31);
11429 op <<= 19;
11430 Value |= op;
11431 // op: Rt8
11432 op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
11433 op &= UINT64_C(7);
11434 op <<= 16;
11435 Value |= op;
11436 // op: Vxx32
11437 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11438 op &= UINT64_C(31);
11439 Value |= op;
11440 break;
11441 }
11442 case Hexagon::V6_vunpackob:
11443 case Hexagon::V6_vunpackoh: {
11444 // op: Vu32
11445 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11446 op &= UINT64_C(31);
11447 op <<= 8;
11448 Value |= op;
11449 // op: Vxx32
11450 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11451 op &= UINT64_C(31);
11452 Value |= op;
11453 break;
11454 }
11455 case Hexagon::V6_vrmpyzbb_rx_acc:
11456 case Hexagon::V6_vrmpyzbub_rx_acc:
11457 case Hexagon::V6_vrmpyzcb_rx_acc:
11458 case Hexagon::V6_vrmpyzcbs_rx_acc:
11459 case Hexagon::V6_vrmpyznb_rx_acc: {
11460 // op: Vu32
11461 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11462 op &= UINT64_C(31);
11463 op <<= 8;
11464 Value |= op;
11465 // op: Vyyyy32
11466 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11467 op &= UINT64_C(31);
11468 Value |= op;
11469 // op: Rx8
11470 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11471 op &= UINT64_C(7);
11472 op <<= 16;
11473 Value |= op;
11474 break;
11475 }
11476 case Hexagon::V6_vdmpyhisat:
11477 case Hexagon::V6_vdmpyhsuisat: {
11478 // op: Vuu32
11479 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11480 op &= UINT64_C(31);
11481 op <<= 8;
11482 Value |= op;
11483 // op: Rt32
11484 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11485 op &= UINT64_C(31);
11486 op <<= 16;
11487 Value |= op;
11488 // op: Vd32
11489 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11490 op &= UINT64_C(31);
11491 Value |= op;
11492 break;
11493 }
11494 case Hexagon::V6_vdmpybus_dv:
11495 case Hexagon::V6_vdmpyhb_dv:
11496 case Hexagon::V6_vdsaduh:
11497 case Hexagon::V6_vmpabus:
11498 case Hexagon::V6_vmpabuu:
11499 case Hexagon::V6_vmpahb:
11500 case Hexagon::V6_vmpauhb:
11501 case Hexagon::V6_vtmpyb:
11502 case Hexagon::V6_vtmpybus:
11503 case Hexagon::V6_vtmpyhb: {
11504 // op: Vuu32
11505 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11506 op &= UINT64_C(31);
11507 op <<= 8;
11508 Value |= op;
11509 // op: Rt32
11510 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11511 op &= UINT64_C(31);
11512 op <<= 16;
11513 Value |= op;
11514 // op: Vdd32
11515 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11516 op &= UINT64_C(31);
11517 Value |= op;
11518 break;
11519 }
11520 case Hexagon::V6_vaddb_dv:
11521 case Hexagon::V6_vaddbsat_dv:
11522 case Hexagon::V6_vaddh_dv:
11523 case Hexagon::V6_vaddhsat_dv:
11524 case Hexagon::V6_vaddubsat_dv:
11525 case Hexagon::V6_vadduhsat_dv:
11526 case Hexagon::V6_vadduwsat_dv:
11527 case Hexagon::V6_vaddw_dv:
11528 case Hexagon::V6_vaddwsat_dv:
11529 case Hexagon::V6_vmpabusv:
11530 case Hexagon::V6_vmpabuuv:
11531 case Hexagon::V6_vsubb_dv:
11532 case Hexagon::V6_vsubbsat_dv:
11533 case Hexagon::V6_vsubh_dv:
11534 case Hexagon::V6_vsubhsat_dv:
11535 case Hexagon::V6_vsububsat_dv:
11536 case Hexagon::V6_vsubuhsat_dv:
11537 case Hexagon::V6_vsubuwsat_dv:
11538 case Hexagon::V6_vsubw_dv:
11539 case Hexagon::V6_vsubwsat_dv: {
11540 // op: Vuu32
11541 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11542 op &= UINT64_C(31);
11543 op <<= 8;
11544 Value |= op;
11545 // op: Vvv32
11546 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11547 op &= UINT64_C(31);
11548 op <<= 16;
11549 Value |= op;
11550 // op: Vdd32
11551 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11552 op &= UINT64_C(31);
11553 Value |= op;
11554 break;
11555 }
11556 case Hexagon::V6_vdmpyhisat_acc:
11557 case Hexagon::V6_vdmpyhsuisat_acc: {
11558 // op: Vuu32
11559 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11560 op &= UINT64_C(31);
11561 op <<= 8;
11562 Value |= op;
11563 // op: Rt32
11564 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11565 op &= UINT64_C(31);
11566 op <<= 16;
11567 Value |= op;
11568 // op: Vx32
11569 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11570 op &= UINT64_C(31);
11571 Value |= op;
11572 break;
11573 }
11574 case Hexagon::V6_vdmpybus_dv_acc:
11575 case Hexagon::V6_vdmpyhb_dv_acc:
11576 case Hexagon::V6_vdsaduh_acc:
11577 case Hexagon::V6_vmpabus_acc:
11578 case Hexagon::V6_vmpabuu_acc:
11579 case Hexagon::V6_vmpahb_acc:
11580 case Hexagon::V6_vmpauhb_acc:
11581 case Hexagon::V6_vtmpyb_acc:
11582 case Hexagon::V6_vtmpybus_acc:
11583 case Hexagon::V6_vtmpyhb_acc: {
11584 // op: Vuu32
11585 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
11586 op &= UINT64_C(31);
11587 op <<= 8;
11588 Value |= op;
11589 // op: Rt32
11590 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
11591 op &= UINT64_C(31);
11592 op <<= 16;
11593 Value |= op;
11594 // op: Vxx32
11595 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11596 op &= UINT64_C(31);
11597 Value |= op;
11598 break;
11599 }
11600 case Hexagon::CALLProfile:
11601 case Hexagon::PS_call_stk:
11602 case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4:
11603 case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT:
11604 case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC:
11605 case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC:
11606 case Hexagon::RESTORE_DEALLOC_RET_JMP_V4:
11607 case Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT:
11608 case Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC:
11609 case Hexagon::RESTORE_DEALLOC_RET_JMP_V4_PIC:
11610 case Hexagon::SAVE_REGISTERS_CALL_V4:
11611 case Hexagon::SAVE_REGISTERS_CALL_V4STK:
11612 case Hexagon::SAVE_REGISTERS_CALL_V4STK_EXT:
11613 case Hexagon::SAVE_REGISTERS_CALL_V4STK_EXT_PIC:
11614 case Hexagon::SAVE_REGISTERS_CALL_V4STK_PIC:
11615 case Hexagon::SAVE_REGISTERS_CALL_V4_EXT:
11616 case Hexagon::SAVE_REGISTERS_CALL_V4_EXT_PIC:
11617 case Hexagon::SAVE_REGISTERS_CALL_V4_PIC: {
11618 // op: dst
11619 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11620 Value |= (op & UINT64_C(16744448)) << 1;
11621 Value |= (op & UINT64_C(32764)) >> 1;
11622 break;
11623 }
11624 case Hexagon::EH_RETURN_JMPR:
11625 case Hexagon::PS_jmpret: {
11626 // op: dst
11627 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11628 op &= UINT64_C(31);
11629 op <<= 16;
11630 Value |= op;
11631 break;
11632 }
11633 case Hexagon::HI:
11634 case Hexagon::LO: {
11635 // op: dst
11636 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11637 op &= UINT64_C(31);
11638 op <<= 16;
11639 Value |= op;
11640 // op: imm_value
11641 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11642 Value |= (op & UINT64_C(49152)) << 8;
11643 Value |= (op & UINT64_C(16383));
11644 break;
11645 }
11646 case Hexagon::J2_loop0iext:
11647 case Hexagon::J2_loop1iext: {
11648 // op: offset
11649 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11650 Value |= (op & UINT64_C(496)) << 4;
11651 Value |= (op & UINT64_C(12)) << 1;
11652 // op: src2
11653 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11654 Value |= (op & UINT64_C(992)) << 11;
11655 Value |= (op & UINT64_C(28)) << 3;
11656 Value |= (op & UINT64_C(3));
11657 break;
11658 }
11659 case Hexagon::J2_loop0rext:
11660 case Hexagon::J2_loop1rext: {
11661 // op: offset
11662 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11663 Value |= (op & UINT64_C(496)) << 4;
11664 Value |= (op & UINT64_C(12)) << 1;
11665 // op: src2
11666 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11667 op &= UINT64_C(31);
11668 op <<= 16;
11669 Value |= op;
11670 break;
11671 }
11672 case Hexagon::PS_jmpretf:
11673 case Hexagon::PS_jmpretfnew:
11674 case Hexagon::PS_jmpretfnewpt:
11675 case Hexagon::PS_jmprett:
11676 case Hexagon::PS_jmprettnew:
11677 case Hexagon::PS_jmprettnewpt: {
11678 // op: src
11679 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
11680 op &= UINT64_C(3);
11681 op <<= 8;
11682 Value |= op;
11683 // op: dst
11684 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
11685 op &= UINT64_C(31);
11686 op <<= 16;
11687 Value |= op;
11688 break;
11689 }
11690 default:
11691 std::string msg;
11692 raw_string_ostream Msg(msg);
11693 Msg << "Not supported instr: " << MI;
11694 report_fatal_error(Msg.str());
11695 }
11696 return Value;
11697}
11698
11699#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
11700#undef ENABLE_INSTR_PREDICATE_VERIFIER
11701#include <sstream>
11702
11703// Bits for subtarget features that participate in instruction matching.
11704enum SubtargetFeatureBits : uint8_t {
11705 Feature_HasV5Bit = 2,
11706 Feature_HasV55Bit = 3,
11707 Feature_HasV60Bit = 4,
11708 Feature_HasV62Bit = 5,
11709 Feature_HasV65Bit = 6,
11710 Feature_HasV66Bit = 7,
11711 Feature_HasV67Bit = 8,
11712 Feature_UseHVX64BBit = 12,
11713 Feature_UseHVX128BBit = 11,
11714 Feature_UseHVXBit = 10,
11715 Feature_UseHVXV60Bit = 13,
11716 Feature_UseHVXV62Bit = 14,
11717 Feature_UseHVXV65Bit = 15,
11718 Feature_UseHVXV66Bit = 16,
11719 Feature_UseHVXV67Bit = 17,
11720 Feature_UseAudioBit = 9,
11721 Feature_UseZRegBit = 18,
11722 Feature_HasPreV65Bit = 1,
11723 Feature_HasMemNoShufBit = 0,
11724};
11725
11726#ifndef NDEBUG
11727static const char *SubtargetFeatureNames[] = {
11728 "Feature_HasMemNoShuf",
11729 "Feature_HasPreV65",
11730 "Feature_HasV5",
11731 "Feature_HasV55",
11732 "Feature_HasV60",
11733 "Feature_HasV62",
11734 "Feature_HasV65",
11735 "Feature_HasV66",
11736 "Feature_HasV67",
11737 "Feature_UseAudio",
11738 "Feature_UseHVX",
11739 "Feature_UseHVX128B",
11740 "Feature_UseHVX64B",
11741 "Feature_UseHVXV60",
11742 "Feature_UseHVXV62",
11743 "Feature_UseHVXV65",
11744 "Feature_UseHVXV66",
11745 "Feature_UseHVXV67",
11746 "Feature_UseZReg",
11747 nullptr
11748};
11749
11750#endif // NDEBUG
11751FeatureBitset HexagonMCCodeEmitter::
11752computeAvailableFeatures(const FeatureBitset &FB) const {
11753 FeatureBitset Features;
11754 if (FB[Hexagon::ArchV5])
11755 Features.set(Feature_HasV5Bit);
11756 if (FB[Hexagon::ArchV55])
11757 Features.set(Feature_HasV55Bit);
11758 if (FB[Hexagon::ArchV60])
11759 Features.set(Feature_HasV60Bit);
11760 if (FB[Hexagon::ArchV62])
11761 Features.set(Feature_HasV62Bit);
11762 if (FB[Hexagon::ArchV65])
11763 Features.set(Feature_HasV65Bit);
11764 if (FB[Hexagon::ArchV66])
11765 Features.set(Feature_HasV66Bit);
11766 if (FB[Hexagon::ArchV67])
11767 Features.set(Feature_HasV67Bit);
11768 if (FB[Hexagon::ExtensionHVX64B])
11769 Features.set(Feature_UseHVX64BBit);
11770 if (FB[Hexagon::ExtensionHVX128B])
11771 Features.set(Feature_UseHVX128BBit);
11772 if (FB[Hexagon::ExtensionHVXV60])
11773 Features.set(Feature_UseHVXBit);
11774 if (FB[Hexagon::ExtensionHVXV60])
11775 Features.set(Feature_UseHVXV60Bit);
11776 if (FB[Hexagon::ExtensionHVXV62])
11777 Features.set(Feature_UseHVXV62Bit);
11778 if (FB[Hexagon::ExtensionHVXV65])
11779 Features.set(Feature_UseHVXV65Bit);
11780 if (FB[Hexagon::ExtensionHVXV66])
11781 Features.set(Feature_UseHVXV66Bit);
11782 if (FB[Hexagon::ExtensionHVXV67])
11783 Features.set(Feature_UseHVXV67Bit);
11784 if (FB[Hexagon::ExtensionAudio])
11785 Features.set(Feature_UseAudioBit);
11786 if (FB[Hexagon::ExtensionZReg])
11787 Features.set(Feature_UseZRegBit);
11788 if (FB[Hexagon::FeaturePreV65])
11789 Features.set(Feature_HasPreV65Bit);
11790 if (FB[Hexagon::FeatureMemNoShuf])
11791 Features.set(Feature_HasMemNoShufBit);
11792 return Features;
11793}
11794
11795#ifndef NDEBUG
11796// Feature bitsets.
11797enum : uint8_t {
11798 CEFBS_None,
11799 CEFBS_HasPreV65,
11800 CEFBS_HasV55,
11801 CEFBS_HasV60,
11802 CEFBS_HasV62,
11803 CEFBS_HasV65,
11804 CEFBS_HasV66,
11805 CEFBS_HasV67,
11806 CEFBS_UseHVXV60,
11807 CEFBS_UseHVXV62,
11808 CEFBS_UseHVXV65,
11809 CEFBS_UseHVXV66,
11810 CEFBS_HasV60_UseHVX,
11811 CEFBS_HasV67_UseAudio,
11812 CEFBS_UseHVXV66_UseZReg,
11813};
11814
11815static constexpr FeatureBitset FeatureBitsets[] = {
11816 {}, // CEFBS_None
11817 {Feature_HasPreV65Bit, },
11818 {Feature_HasV55Bit, },
11819 {Feature_HasV60Bit, },
11820 {Feature_HasV62Bit, },
11821 {Feature_HasV65Bit, },
11822 {Feature_HasV66Bit, },
11823 {Feature_HasV67Bit, },
11824 {Feature_UseHVXV60Bit, },
11825 {Feature_UseHVXV62Bit, },
11826 {Feature_UseHVXV65Bit, },
11827 {Feature_UseHVXV66Bit, },
11828 {Feature_HasV60Bit, Feature_UseHVXBit, },
11829 {Feature_HasV67Bit, Feature_UseAudioBit, },
11830 {Feature_UseHVXV66Bit, Feature_UseZRegBit, },
11831};
11832#endif // NDEBUG
11833
11834void HexagonMCCodeEmitter::verifyInstructionPredicates(
11835 const MCInst &Inst, const FeatureBitset &AvailableFeatures) const {
11836#ifndef NDEBUG
11837 static uint8_t RequiredFeaturesRefs[] = {
11838 CEFBS_None, // PHI = 0
11839 CEFBS_None, // INLINEASM = 1
11840 CEFBS_None, // INLINEASM_BR = 2
11841 CEFBS_None, // CFI_INSTRUCTION = 3
11842 CEFBS_None, // EH_LABEL = 4
11843 CEFBS_None, // GC_LABEL = 5
11844 CEFBS_None, // ANNOTATION_LABEL = 6
11845 CEFBS_None, // KILL = 7
11846 CEFBS_None, // EXTRACT_SUBREG = 8
11847 CEFBS_None, // INSERT_SUBREG = 9
11848 CEFBS_None, // IMPLICIT_DEF = 10
11849 CEFBS_None, // SUBREG_TO_REG = 11
11850 CEFBS_None, // COPY_TO_REGCLASS = 12
11851 CEFBS_None, // DBG_VALUE = 13
11852 CEFBS_None, // DBG_INSTR_REF = 14
11853 CEFBS_None, // DBG_LABEL = 15
11854 CEFBS_None, // REG_SEQUENCE = 16
11855 CEFBS_None, // COPY = 17
11856 CEFBS_None, // BUNDLE = 18
11857 CEFBS_None, // LIFETIME_START = 19
11858 CEFBS_None, // LIFETIME_END = 20
11859 CEFBS_None, // PSEUDO_PROBE = 21
11860 CEFBS_None, // STACKMAP = 22
11861 CEFBS_None, // FENTRY_CALL = 23
11862 CEFBS_None, // PATCHPOINT = 24
11863 CEFBS_None, // LOAD_STACK_GUARD = 25
11864 CEFBS_None, // PREALLOCATED_SETUP = 26
11865 CEFBS_None, // PREALLOCATED_ARG = 27
11866 CEFBS_None, // STATEPOINT = 28
11867 CEFBS_None, // LOCAL_ESCAPE = 29
11868 CEFBS_None, // FAULTING_OP = 30
11869 CEFBS_None, // PATCHABLE_OP = 31
11870 CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 32
11871 CEFBS_None, // PATCHABLE_RET = 33
11872 CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 34
11873 CEFBS_None, // PATCHABLE_TAIL_CALL = 35
11874 CEFBS_None, // PATCHABLE_EVENT_CALL = 36
11875 CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 37
11876 CEFBS_None, // ICALL_BRANCH_FUNNEL = 38
11877 CEFBS_None, // G_ADD = 39
11878 CEFBS_None, // G_SUB = 40
11879 CEFBS_None, // G_MUL = 41
11880 CEFBS_None, // G_SDIV = 42
11881 CEFBS_None, // G_UDIV = 43
11882 CEFBS_None, // G_SREM = 44
11883 CEFBS_None, // G_UREM = 45
11884 CEFBS_None, // G_AND = 46
11885 CEFBS_None, // G_OR = 47
11886 CEFBS_None, // G_XOR = 48
11887 CEFBS_None, // G_IMPLICIT_DEF = 49
11888 CEFBS_None, // G_PHI = 50
11889 CEFBS_None, // G_FRAME_INDEX = 51
11890 CEFBS_None, // G_GLOBAL_VALUE = 52
11891 CEFBS_None, // G_EXTRACT = 53
11892 CEFBS_None, // G_UNMERGE_VALUES = 54
11893 CEFBS_None, // G_INSERT = 55
11894 CEFBS_None, // G_MERGE_VALUES = 56
11895 CEFBS_None, // G_BUILD_VECTOR = 57
11896 CEFBS_None, // G_BUILD_VECTOR_TRUNC = 58
11897 CEFBS_None, // G_CONCAT_VECTORS = 59
11898 CEFBS_None, // G_PTRTOINT = 60
11899 CEFBS_None, // G_INTTOPTR = 61
11900 CEFBS_None, // G_BITCAST = 62
11901 CEFBS_None, // G_FREEZE = 63
11902 CEFBS_None, // G_INTRINSIC_TRUNC = 64
11903 CEFBS_None, // G_INTRINSIC_ROUND = 65
11904 CEFBS_None, // G_INTRINSIC_LRINT = 66
11905 CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 67
11906 CEFBS_None, // G_READCYCLECOUNTER = 68
11907 CEFBS_None, // G_LOAD = 69
11908 CEFBS_None, // G_SEXTLOAD = 70
11909 CEFBS_None, // G_ZEXTLOAD = 71
11910 CEFBS_None, // G_INDEXED_LOAD = 72
11911 CEFBS_None, // G_INDEXED_SEXTLOAD = 73
11912 CEFBS_None, // G_INDEXED_ZEXTLOAD = 74
11913 CEFBS_None, // G_STORE = 75
11914 CEFBS_None, // G_INDEXED_STORE = 76
11915 CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 77
11916 CEFBS_None, // G_ATOMIC_CMPXCHG = 78
11917 CEFBS_None, // G_ATOMICRMW_XCHG = 79
11918 CEFBS_None, // G_ATOMICRMW_ADD = 80
11919 CEFBS_None, // G_ATOMICRMW_SUB = 81
11920 CEFBS_None, // G_ATOMICRMW_AND = 82
11921 CEFBS_None, // G_ATOMICRMW_NAND = 83
11922 CEFBS_None, // G_ATOMICRMW_OR = 84
11923 CEFBS_None, // G_ATOMICRMW_XOR = 85
11924 CEFBS_None, // G_ATOMICRMW_MAX = 86
11925 CEFBS_None, // G_ATOMICRMW_MIN = 87
11926 CEFBS_None, // G_ATOMICRMW_UMAX = 88
11927 CEFBS_None, // G_ATOMICRMW_UMIN = 89
11928 CEFBS_None, // G_ATOMICRMW_FADD = 90
11929 CEFBS_None, // G_ATOMICRMW_FSUB = 91
11930 CEFBS_None, // G_FENCE = 92
11931 CEFBS_None, // G_BRCOND = 93
11932 CEFBS_None, // G_BRINDIRECT = 94
11933 CEFBS_None, // G_INTRINSIC = 95
11934 CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 96
11935 CEFBS_None, // G_ANYEXT = 97
11936 CEFBS_None, // G_TRUNC = 98
11937 CEFBS_None, // G_CONSTANT = 99
11938 CEFBS_None, // G_FCONSTANT = 100
11939 CEFBS_None, // G_VASTART = 101
11940 CEFBS_None, // G_VAARG = 102
11941 CEFBS_None, // G_SEXT = 103
11942 CEFBS_None, // G_SEXT_INREG = 104
11943 CEFBS_None, // G_ZEXT = 105
11944 CEFBS_None, // G_SHL = 106
11945 CEFBS_None, // G_LSHR = 107
11946 CEFBS_None, // G_ASHR = 108
11947 CEFBS_None, // G_FSHL = 109
11948 CEFBS_None, // G_FSHR = 110
11949 CEFBS_None, // G_ICMP = 111
11950 CEFBS_None, // G_FCMP = 112
11951 CEFBS_None, // G_SELECT = 113
11952 CEFBS_None, // G_UADDO = 114
11953 CEFBS_None, // G_UADDE = 115
11954 CEFBS_None, // G_USUBO = 116
11955 CEFBS_None, // G_USUBE = 117
11956 CEFBS_None, // G_SADDO = 118
11957 CEFBS_None, // G_SADDE = 119
11958 CEFBS_None, // G_SSUBO = 120
11959 CEFBS_None, // G_SSUBE = 121
11960 CEFBS_None, // G_UMULO = 122
11961 CEFBS_None, // G_SMULO = 123
11962 CEFBS_None, // G_UMULH = 124
11963 CEFBS_None, // G_SMULH = 125
11964 CEFBS_None, // G_UADDSAT = 126
11965 CEFBS_None, // G_SADDSAT = 127
11966 CEFBS_None, // G_USUBSAT = 128
11967 CEFBS_None, // G_SSUBSAT = 129
11968 CEFBS_None, // G_USHLSAT = 130
11969 CEFBS_None, // G_SSHLSAT = 131
11970 CEFBS_None, // G_SMULFIX = 132
11971 CEFBS_None, // G_UMULFIX = 133
11972 CEFBS_None, // G_SMULFIXSAT = 134
11973 CEFBS_None, // G_UMULFIXSAT = 135
11974 CEFBS_None, // G_SDIVFIX = 136
11975 CEFBS_None, // G_UDIVFIX = 137
11976 CEFBS_None, // G_SDIVFIXSAT = 138
11977 CEFBS_None, // G_UDIVFIXSAT = 139
11978 CEFBS_None, // G_FADD = 140
11979 CEFBS_None, // G_FSUB = 141
11980 CEFBS_None, // G_FMUL = 142
11981 CEFBS_None, // G_FMA = 143
11982 CEFBS_None, // G_FMAD = 144
11983 CEFBS_None, // G_FDIV = 145
11984 CEFBS_None, // G_FREM = 146
11985 CEFBS_None, // G_FPOW = 147
11986 CEFBS_None, // G_FPOWI = 148
11987 CEFBS_None, // G_FEXP = 149
11988 CEFBS_None, // G_FEXP2 = 150
11989 CEFBS_None, // G_FLOG = 151
11990 CEFBS_None, // G_FLOG2 = 152
11991 CEFBS_None, // G_FLOG10 = 153
11992 CEFBS_None, // G_FNEG = 154
11993 CEFBS_None, // G_FPEXT = 155
11994 CEFBS_None, // G_FPTRUNC = 156
11995 CEFBS_None, // G_FPTOSI = 157
11996 CEFBS_None, // G_FPTOUI = 158
11997 CEFBS_None, // G_SITOFP = 159
11998 CEFBS_None, // G_UITOFP = 160
11999 CEFBS_None, // G_FABS = 161
12000 CEFBS_None, // G_FCOPYSIGN = 162
12001 CEFBS_None, // G_FCANONICALIZE = 163
12002 CEFBS_None, // G_FMINNUM = 164
12003 CEFBS_None, // G_FMAXNUM = 165
12004 CEFBS_None, // G_FMINNUM_IEEE = 166
12005 CEFBS_None, // G_FMAXNUM_IEEE = 167
12006 CEFBS_None, // G_FMINIMUM = 168
12007 CEFBS_None, // G_FMAXIMUM = 169
12008 CEFBS_None, // G_PTR_ADD = 170
12009 CEFBS_None, // G_PTRMASK = 171
12010 CEFBS_None, // G_SMIN = 172
12011 CEFBS_None, // G_SMAX = 173
12012 CEFBS_None, // G_UMIN = 174
12013 CEFBS_None, // G_UMAX = 175
12014 CEFBS_None, // G_ABS = 176
12015 CEFBS_None, // G_BR = 177
12016 CEFBS_None, // G_BRJT = 178
12017 CEFBS_None, // G_INSERT_VECTOR_ELT = 179
12018 CEFBS_None, // G_EXTRACT_VECTOR_ELT = 180
12019 CEFBS_None, // G_SHUFFLE_VECTOR = 181
12020 CEFBS_None, // G_CTTZ = 182
12021 CEFBS_None, // G_CTTZ_ZERO_UNDEF = 183
12022 CEFBS_None, // G_CTLZ = 184
12023 CEFBS_None, // G_CTLZ_ZERO_UNDEF = 185
12024 CEFBS_None, // G_CTPOP = 186
12025 CEFBS_None, // G_BSWAP = 187
12026 CEFBS_None, // G_BITREVERSE = 188
12027 CEFBS_None, // G_FCEIL = 189
12028 CEFBS_None, // G_FCOS = 190
12029 CEFBS_None, // G_FSIN = 191
12030 CEFBS_None, // G_FSQRT = 192
12031 CEFBS_None, // G_FFLOOR = 193
12032 CEFBS_None, // G_FRINT = 194
12033 CEFBS_None, // G_FNEARBYINT = 195
12034 CEFBS_None, // G_ADDRSPACE_CAST = 196
12035 CEFBS_None, // G_BLOCK_ADDR = 197
12036 CEFBS_None, // G_JUMP_TABLE = 198
12037 CEFBS_None, // G_DYN_STACKALLOC = 199
12038 CEFBS_None, // G_STRICT_FADD = 200
12039 CEFBS_None, // G_STRICT_FSUB = 201
12040 CEFBS_None, // G_STRICT_FMUL = 202
12041 CEFBS_None, // G_STRICT_FDIV = 203
12042 CEFBS_None, // G_STRICT_FREM = 204
12043 CEFBS_None, // G_STRICT_FMA = 205
12044 CEFBS_None, // G_STRICT_FSQRT = 206
12045 CEFBS_None, // G_READ_REGISTER = 207
12046 CEFBS_None, // G_WRITE_REGISTER = 208
12047 CEFBS_None, // G_MEMCPY = 209
12048 CEFBS_None, // G_MEMMOVE = 210
12049 CEFBS_None, // G_MEMSET = 211
12050 CEFBS_None, // G_VECREDUCE_SEQ_FADD = 212
12051 CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 213
12052 CEFBS_None, // G_VECREDUCE_FADD = 214
12053 CEFBS_None, // G_VECREDUCE_FMUL = 215
12054 CEFBS_None, // G_VECREDUCE_FMAX = 216
12055 CEFBS_None, // G_VECREDUCE_FMIN = 217
12056 CEFBS_None, // G_VECREDUCE_ADD = 218
12057 CEFBS_None, // G_VECREDUCE_MUL = 219
12058 CEFBS_None, // G_VECREDUCE_AND = 220
12059 CEFBS_None, // G_VECREDUCE_OR = 221
12060 CEFBS_None, // G_VECREDUCE_XOR = 222
12061 CEFBS_None, // G_VECREDUCE_SMAX = 223
12062 CEFBS_None, // G_VECREDUCE_SMIN = 224
12063 CEFBS_None, // G_VECREDUCE_UMAX = 225
12064 CEFBS_None, // G_VECREDUCE_UMIN = 226
12065 CEFBS_None, // A2_addsp = 227
12066 CEFBS_None, // A2_iconst = 228
12067 CEFBS_None, // A2_neg = 229
12068 CEFBS_None, // A2_not = 230
12069 CEFBS_None, // A2_tfrf = 231
12070 CEFBS_None, // A2_tfrfnew = 232
12071 CEFBS_None, // A2_tfrp = 233
12072 CEFBS_None, // A2_tfrpf = 234
12073 CEFBS_None, // A2_tfrpfnew = 235
12074 CEFBS_None, // A2_tfrpi = 236
12075 CEFBS_None, // A2_tfrpt = 237
12076 CEFBS_None, // A2_tfrptnew = 238
12077 CEFBS_None, // A2_tfrt = 239
12078 CEFBS_None, // A2_tfrtnew = 240
12079 CEFBS_None, // A2_vaddb_map = 241
12080 CEFBS_None, // A2_vsubb_map = 242
12081 CEFBS_None, // A2_zxtb = 243
12082 CEFBS_None, // A4_boundscheck = 244
12083 CEFBS_None, // ADJCALLSTACKDOWN = 245
12084 CEFBS_None, // ADJCALLSTACKUP = 246
12085 CEFBS_None, // C2_cmpgei = 247
12086 CEFBS_None, // C2_cmpgeui = 248
12087 CEFBS_None, // C2_cmplt = 249
12088 CEFBS_None, // C2_cmpltu = 250
12089 CEFBS_None, // C2_pxfer_map = 251
12090 CEFBS_None, // DUPLEX_Pseudo = 252
12091 CEFBS_None, // ENDLOOP0 = 253
12092 CEFBS_None, // ENDLOOP01 = 254
12093 CEFBS_None, // ENDLOOP1 = 255
12094 CEFBS_None, // J2_endloop0 = 256
12095 CEFBS_None, // J2_endloop01 = 257
12096 CEFBS_None, // J2_endloop1 = 258
12097 CEFBS_HasV60, // J2_jumpf_nopred_map = 259
12098 CEFBS_HasV60, // J2_jumprf_nopred_map = 260
12099 CEFBS_HasV60, // J2_jumprt_nopred_map = 261
12100 CEFBS_HasV60, // J2_jumpt_nopred_map = 262
12101 CEFBS_HasV65, // J2_trap1_noregmap = 263
12102 CEFBS_None, // L2_loadalignb_zomap = 264
12103 CEFBS_None, // L2_loadalignh_zomap = 265
12104 CEFBS_None, // L2_loadbsw2_zomap = 266
12105 CEFBS_None, // L2_loadbsw4_zomap = 267
12106 CEFBS_None, // L2_loadbzw2_zomap = 268
12107 CEFBS_None, // L2_loadbzw4_zomap = 269
12108 CEFBS_None, // L2_loadrb_zomap = 270
12109 CEFBS_None, // L2_loadrd_zomap = 271
12110 CEFBS_None, // L2_loadrh_zomap = 272
12111 CEFBS_None, // L2_loadri_zomap = 273
12112 CEFBS_None, // L2_loadrub_zomap = 274
12113 CEFBS_None, // L2_loadruh_zomap = 275
12114 CEFBS_None, // L2_ploadrbf_zomap = 276
12115 CEFBS_None, // L2_ploadrbfnew_zomap = 277
12116 CEFBS_None, // L2_ploadrbt_zomap = 278
12117 CEFBS_None, // L2_ploadrbtnew_zomap = 279
12118 CEFBS_None, // L2_ploadrdf_zomap = 280
12119 CEFBS_None, // L2_ploadrdfnew_zomap = 281
12120 CEFBS_None, // L2_ploadrdt_zomap = 282
12121 CEFBS_None, // L2_ploadrdtnew_zomap = 283
12122 CEFBS_None, // L2_ploadrhf_zomap = 284
12123 CEFBS_None, // L2_ploadrhfnew_zomap = 285
12124 CEFBS_None, // L2_ploadrht_zomap = 286
12125 CEFBS_None, // L2_ploadrhtnew_zomap = 287
12126 CEFBS_None, // L2_ploadrif_zomap = 288
12127 CEFBS_None, // L2_ploadrifnew_zomap = 289
12128 CEFBS_None, // L2_ploadrit_zomap = 290
12129 CEFBS_None, // L2_ploadritnew_zomap = 291
12130 CEFBS_None, // L2_ploadrubf_zomap = 292
12131 CEFBS_None, // L2_ploadrubfnew_zomap = 293
12132 CEFBS_None, // L2_ploadrubt_zomap = 294
12133 CEFBS_None, // L2_ploadrubtnew_zomap = 295
12134 CEFBS_None, // L2_ploadruhf_zomap = 296
12135 CEFBS_None, // L2_ploadruhfnew_zomap = 297
12136 CEFBS_None, // L2_ploadruht_zomap = 298
12137 CEFBS_None, // L2_ploadruhtnew_zomap = 299
12138 CEFBS_None, // L4_add_memopb_zomap = 300
12139 CEFBS_None, // L4_add_memoph_zomap = 301
12140 CEFBS_None, // L4_add_memopw_zomap = 302
12141 CEFBS_None, // L4_and_memopb_zomap = 303
12142 CEFBS_None, // L4_and_memoph_zomap = 304
12143 CEFBS_None, // L4_and_memopw_zomap = 305
12144 CEFBS_None, // L4_iadd_memopb_zomap = 306
12145 CEFBS_None, // L4_iadd_memoph_zomap = 307
12146 CEFBS_None, // L4_iadd_memopw_zomap = 308
12147 CEFBS_None, // L4_iand_memopb_zomap = 309
12148 CEFBS_None, // L4_iand_memoph_zomap = 310
12149 CEFBS_None, // L4_iand_memopw_zomap = 311
12150 CEFBS_None, // L4_ior_memopb_zomap = 312
12151 CEFBS_None, // L4_ior_memoph_zomap = 313
12152 CEFBS_None, // L4_ior_memopw_zomap = 314
12153 CEFBS_None, // L4_isub_memopb_zomap = 315
12154 CEFBS_None, // L4_isub_memoph_zomap = 316
12155 CEFBS_None, // L4_isub_memopw_zomap = 317
12156 CEFBS_None, // L4_or_memopb_zomap = 318
12157 CEFBS_None, // L4_or_memoph_zomap = 319
12158 CEFBS_None, // L4_or_memopw_zomap = 320
12159 CEFBS_HasV65, // L4_return_map_to_raw_f = 321
12160 CEFBS_HasV65, // L4_return_map_to_raw_fnew_pnt = 322
12161 CEFBS_HasV65, // L4_return_map_to_raw_fnew_pt = 323
12162 CEFBS_HasV65, // L4_return_map_to_raw_t = 324
12163 CEFBS_HasV65, // L4_return_map_to_raw_tnew_pnt = 325
12164 CEFBS_HasV65, // L4_return_map_to_raw_tnew_pt = 326
12165 CEFBS_None, // L4_sub_memopb_zomap = 327
12166 CEFBS_None, // L4_sub_memoph_zomap = 328
12167 CEFBS_None, // L4_sub_memopw_zomap = 329
12168 CEFBS_HasV65, // L6_deallocframe_map_to_raw = 330
12169 CEFBS_HasV65, // L6_return_map_to_raw = 331
12170 CEFBS_None, // LDriw_ctr = 332
12171 CEFBS_None, // LDriw_pred = 333
12172 CEFBS_None, // M2_mpysmi = 334
12173 CEFBS_None, // M2_mpyui = 335
12174 CEFBS_None, // M2_vrcmpys_acc_s1 = 336
12175 CEFBS_None, // M2_vrcmpys_s1 = 337
12176 CEFBS_None, // M2_vrcmpys_s1rp = 338
12177 CEFBS_HasV67, // M7_vdmpy = 339
12178 CEFBS_HasV67, // M7_vdmpy_acc = 340
12179 CEFBS_None, // PS_aligna = 341
12180 CEFBS_None, // PS_alloca = 342
12181 CEFBS_None, // PS_call_nr = 343
12182 CEFBS_None, // PS_crash = 344
12183 CEFBS_None, // PS_false = 345
12184 CEFBS_None, // PS_fi = 346
12185 CEFBS_None, // PS_fia = 347
12186 CEFBS_None, // PS_loadrb_pci = 348
12187 CEFBS_None, // PS_loadrb_pcr = 349
12188 CEFBS_None, // PS_loadrd_pci = 350
12189 CEFBS_None, // PS_loadrd_pcr = 351
12190 CEFBS_None, // PS_loadrh_pci = 352
12191 CEFBS_None, // PS_loadrh_pcr = 353
12192 CEFBS_None, // PS_loadri_pci = 354
12193 CEFBS_None, // PS_loadri_pcr = 355
12194 CEFBS_None, // PS_loadrub_pci = 356
12195 CEFBS_None, // PS_loadrub_pcr = 357
12196 CEFBS_None, // PS_loadruh_pci = 358
12197 CEFBS_None, // PS_loadruh_pcr = 359
12198 CEFBS_None, // PS_pselect = 360
12199 CEFBS_None, // PS_qfalse = 361
12200 CEFBS_None, // PS_qtrue = 362
12201 CEFBS_None, // PS_storerb_pci = 363
12202 CEFBS_None, // PS_storerb_pcr = 364
12203 CEFBS_None, // PS_storerd_pci = 365
12204 CEFBS_None, // PS_storerd_pcr = 366
12205 CEFBS_None, // PS_storerf_pci = 367
12206 CEFBS_None, // PS_storerf_pcr = 368
12207 CEFBS_None, // PS_storerh_pci = 369
12208 CEFBS_None, // PS_storerh_pcr = 370
12209 CEFBS_None, // PS_storeri_pci = 371
12210 CEFBS_None, // PS_storeri_pcr = 372
12211 CEFBS_None, // PS_tailcall_i = 373
12212 CEFBS_None, // PS_tailcall_r = 374
12213 CEFBS_None, // PS_true = 375
12214 CEFBS_None, // PS_vdd0 = 376
12215 CEFBS_HasV60_UseHVX, // PS_vloadrq_ai = 377
12216 CEFBS_HasV60_UseHVX, // PS_vloadrv_ai = 378
12217 CEFBS_HasV60_UseHVX, // PS_vloadrv_nt_ai = 379
12218 CEFBS_HasV60_UseHVX, // PS_vloadrw_ai = 380
12219 CEFBS_HasV60_UseHVX, // PS_vloadrw_nt_ai = 381
12220 CEFBS_None, // PS_vmulw = 382
12221 CEFBS_None, // PS_vmulw_acc = 383
12222 CEFBS_HasV60_UseHVX, // PS_vselect = 384
12223 CEFBS_HasV60_UseHVX, // PS_vstorerq_ai = 385
12224 CEFBS_HasV60_UseHVX, // PS_vstorerv_ai = 386
12225 CEFBS_HasV60_UseHVX, // PS_vstorerv_nt_ai = 387
12226 CEFBS_HasV60_UseHVX, // PS_vstorerw_ai = 388
12227 CEFBS_HasV60_UseHVX, // PS_vstorerw_nt_ai = 389
12228 CEFBS_HasV60_UseHVX, // PS_wselect = 390
12229 CEFBS_None, // S2_asr_i_p_rnd_goodsyntax = 391
12230 CEFBS_None, // S2_asr_i_r_rnd_goodsyntax = 392
12231 CEFBS_None, // S2_pstorerbf_zomap = 393
12232 CEFBS_None, // S2_pstorerbnewf_zomap = 394
12233 CEFBS_None, // S2_pstorerbnewt_zomap = 395
12234 CEFBS_None, // S2_pstorerbt_zomap = 396
12235 CEFBS_None, // S2_pstorerdf_zomap = 397
12236 CEFBS_None, // S2_pstorerdt_zomap = 398
12237 CEFBS_None, // S2_pstorerff_zomap = 399
12238 CEFBS_None, // S2_pstorerft_zomap = 400
12239 CEFBS_None, // S2_pstorerhf_zomap = 401
12240 CEFBS_None, // S2_pstorerhnewf_zomap = 402
12241 CEFBS_None, // S2_pstorerhnewt_zomap = 403
12242 CEFBS_None, // S2_pstorerht_zomap = 404
12243 CEFBS_None, // S2_pstorerif_zomap = 405
12244 CEFBS_None, // S2_pstorerinewf_zomap = 406
12245 CEFBS_None, // S2_pstorerinewt_zomap = 407
12246 CEFBS_None, // S2_pstorerit_zomap = 408
12247 CEFBS_None, // S2_storerb_zomap = 409
12248 CEFBS_None, // S2_storerbnew_zomap = 410
12249 CEFBS_None, // S2_storerd_zomap = 411
12250 CEFBS_None, // S2_storerf_zomap = 412
12251 CEFBS_None, // S2_storerh_zomap = 413
12252 CEFBS_None, // S2_storerhnew_zomap = 414
12253 CEFBS_None, // S2_storeri_zomap = 415
12254 CEFBS_None, // S2_storerinew_zomap = 416
12255 CEFBS_None, // S2_tableidxb_goodsyntax = 417
12256 CEFBS_None, // S2_tableidxd_goodsyntax = 418
12257 CEFBS_None, // S2_tableidxh_goodsyntax = 419
12258 CEFBS_None, // S2_tableidxw_goodsyntax = 420
12259 CEFBS_None, // S4_pstorerbfnew_zomap = 421
12260 CEFBS_None, // S4_pstorerbnewfnew_zomap = 422
12261 CEFBS_None, // S4_pstorerbnewtnew_zomap = 423
12262 CEFBS_None, // S4_pstorerbtnew_zomap = 424
12263 CEFBS_None, // S4_pstorerdfnew_zomap = 425
12264 CEFBS_None, // S4_pstorerdtnew_zomap = 426
12265 CEFBS_None, // S4_pstorerffnew_zomap = 427
12266 CEFBS_None, // S4_pstorerftnew_zomap = 428
12267 CEFBS_None, // S4_pstorerhfnew_zomap = 429
12268 CEFBS_None, // S4_pstorerhnewfnew_zomap = 430
12269 CEFBS_None, // S4_pstorerhnewtnew_zomap = 431
12270 CEFBS_None, // S4_pstorerhtnew_zomap = 432
12271 CEFBS_None, // S4_pstorerifnew_zomap = 433
12272 CEFBS_None, // S4_pstorerinewfnew_zomap = 434
12273 CEFBS_None, // S4_pstorerinewtnew_zomap = 435
12274 CEFBS_None, // S4_pstoreritnew_zomap = 436
12275 CEFBS_None, // S4_storeirb_zomap = 437
12276 CEFBS_None, // S4_storeirbf_zomap = 438
12277 CEFBS_None, // S4_storeirbfnew_zomap = 439
12278 CEFBS_None, // S4_storeirbt_zomap = 440
12279 CEFBS_None, // S4_storeirbtnew_zomap = 441
12280 CEFBS_None, // S4_storeirh_zomap = 442
12281 CEFBS_None, // S4_storeirhf_zomap = 443
12282 CEFBS_None, // S4_storeirhfnew_zomap = 444
12283 CEFBS_None, // S4_storeirht_zomap = 445
12284 CEFBS_None, // S4_storeirhtnew_zomap = 446
12285 CEFBS_None, // S4_storeiri_zomap = 447
12286 CEFBS_None, // S4_storeirif_zomap = 448
12287 CEFBS_None, // S4_storeirifnew_zomap = 449
12288 CEFBS_None, // S4_storeirit_zomap = 450
12289 CEFBS_None, // S4_storeiritnew_zomap = 451
12290 CEFBS_None, // S5_asrhub_rnd_sat_goodsyntax = 452
12291 CEFBS_None, // S5_vasrhrnd_goodsyntax = 453
12292 CEFBS_HasV65, // S6_allocframe_to_raw = 454
12293 CEFBS_None, // STriw_ctr = 455
12294 CEFBS_None, // STriw_pred = 456
12295 CEFBS_UseHVXV60, // V6_MAP_equb = 457
12296 CEFBS_UseHVXV60, // V6_MAP_equb_and = 458
12297 CEFBS_UseHVXV60, // V6_MAP_equb_ior = 459
12298 CEFBS_UseHVXV60, // V6_MAP_equb_xor = 460
12299 CEFBS_UseHVXV60, // V6_MAP_equh = 461
12300 CEFBS_UseHVXV60, // V6_MAP_equh_and = 462
12301 CEFBS_UseHVXV60, // V6_MAP_equh_ior = 463
12302 CEFBS_UseHVXV60, // V6_MAP_equh_xor = 464
12303 CEFBS_UseHVXV60, // V6_MAP_equw = 465
12304 CEFBS_UseHVXV60, // V6_MAP_equw_and = 466
12305 CEFBS_UseHVXV60, // V6_MAP_equw_ior = 467
12306 CEFBS_UseHVXV60, // V6_MAP_equw_xor = 468
12307 CEFBS_UseHVXV60, // V6_extractw_alt = 469
12308 CEFBS_UseHVXV60, // V6_hi = 470
12309 CEFBS_UseHVXV60, // V6_ld0 = 471
12310 CEFBS_UseHVXV62, // V6_ldcnp0 = 472
12311 CEFBS_UseHVXV62, // V6_ldcnpnt0 = 473
12312 CEFBS_UseHVXV62, // V6_ldcp0 = 474
12313 CEFBS_UseHVXV62, // V6_ldcpnt0 = 475
12314 CEFBS_UseHVXV62, // V6_ldnp0 = 476
12315 CEFBS_UseHVXV62, // V6_ldnpnt0 = 477
12316 CEFBS_UseHVXV60, // V6_ldnt0 = 478
12317 CEFBS_HasV62, // V6_ldntnt0 = 479
12318 CEFBS_UseHVXV62, // V6_ldp0 = 480
12319 CEFBS_UseHVXV62, // V6_ldpnt0 = 481
12320 CEFBS_UseHVXV62, // V6_ldtnp0 = 482
12321 CEFBS_UseHVXV62, // V6_ldtnpnt0 = 483
12322 CEFBS_UseHVXV62, // V6_ldtp0 = 484
12323 CEFBS_UseHVXV62, // V6_ldtpnt0 = 485
12324 CEFBS_UseHVXV60, // V6_ldu0 = 486
12325 CEFBS_UseHVXV60, // V6_lo = 487
12326 CEFBS_UseHVXV60, // V6_st0 = 488
12327 CEFBS_UseHVXV60, // V6_stn0 = 489
12328 CEFBS_UseHVXV60, // V6_stnnt0 = 490
12329 CEFBS_UseHVXV60, // V6_stnp0 = 491
12330 CEFBS_UseHVXV60, // V6_stnpnt0 = 492
12331 CEFBS_UseHVXV60, // V6_stnq0 = 493
12332 CEFBS_UseHVXV60, // V6_stnqnt0 = 494
12333 CEFBS_UseHVXV60, // V6_stnt0 = 495
12334 CEFBS_UseHVXV60, // V6_stp0 = 496
12335 CEFBS_UseHVXV60, // V6_stpnt0 = 497
12336 CEFBS_UseHVXV60, // V6_stq0 = 498
12337 CEFBS_UseHVXV60, // V6_stqnt0 = 499
12338 CEFBS_UseHVXV60, // V6_stu0 = 500
12339 CEFBS_UseHVXV60, // V6_stunp0 = 501
12340 CEFBS_UseHVXV60, // V6_stup0 = 502
12341 CEFBS_UseHVXV65, // V6_vabsb_alt = 503
12342 CEFBS_UseHVXV65, // V6_vabsb_sat_alt = 504
12343 CEFBS_UseHVXV60, // V6_vabsdiffh_alt = 505
12344 CEFBS_UseHVXV60, // V6_vabsdiffub_alt = 506
12345 CEFBS_UseHVXV60, // V6_vabsdiffuh_alt = 507
12346 CEFBS_UseHVXV60, // V6_vabsdiffw_alt = 508
12347 CEFBS_UseHVXV60, // V6_vabsh_alt = 509
12348 CEFBS_UseHVXV60, // V6_vabsh_sat_alt = 510
12349 CEFBS_UseHVXV65, // V6_vabsub_alt = 511
12350 CEFBS_UseHVXV65, // V6_vabsuh_alt = 512
12351 CEFBS_UseHVXV65, // V6_vabsuw_alt = 513
12352 CEFBS_UseHVXV60, // V6_vabsw_alt = 514
12353 CEFBS_UseHVXV60, // V6_vabsw_sat_alt = 515
12354 CEFBS_UseHVXV60, // V6_vaddb_alt = 516
12355 CEFBS_UseHVXV60, // V6_vaddb_dv_alt = 517
12356 CEFBS_UseHVXV60, // V6_vaddbnq_alt = 518
12357 CEFBS_UseHVXV60, // V6_vaddbq_alt = 519
12358 CEFBS_UseHVXV62, // V6_vaddbsat_alt = 520
12359 CEFBS_UseHVXV62, // V6_vaddbsat_dv_alt = 521
12360 CEFBS_UseHVXV60, // V6_vaddh_alt = 522
12361 CEFBS_UseHVXV60, // V6_vaddh_dv_alt = 523
12362 CEFBS_UseHVXV60, // V6_vaddhnq_alt = 524
12363 CEFBS_UseHVXV60, // V6_vaddhq_alt = 525
12364 CEFBS_UseHVXV60, // V6_vaddhsat_alt = 526
12365 CEFBS_UseHVXV60, // V6_vaddhsat_dv_alt = 527
12366 CEFBS_UseHVXV62, // V6_vaddhw_acc_alt = 528
12367 CEFBS_UseHVXV60, // V6_vaddhw_alt = 529
12368 CEFBS_UseHVXV62, // V6_vaddubh_acc_alt = 530
12369 CEFBS_UseHVXV60, // V6_vaddubh_alt = 531
12370 CEFBS_UseHVXV60, // V6_vaddubsat_alt = 532
12371 CEFBS_UseHVXV60, // V6_vaddubsat_dv_alt = 533
12372 CEFBS_UseHVXV60, // V6_vadduhsat_alt = 534
12373 CEFBS_UseHVXV60, // V6_vadduhsat_dv_alt = 535
12374 CEFBS_UseHVXV62, // V6_vadduhw_acc_alt = 536
12375 CEFBS_UseHVXV60, // V6_vadduhw_alt = 537
12376 CEFBS_UseHVXV62, // V6_vadduwsat_alt = 538
12377 CEFBS_UseHVXV62, // V6_vadduwsat_dv_alt = 539
12378 CEFBS_UseHVXV60, // V6_vaddw_alt = 540
12379 CEFBS_UseHVXV60, // V6_vaddw_dv_alt = 541
12380 CEFBS_UseHVXV60, // V6_vaddwnq_alt = 542
12381 CEFBS_UseHVXV60, // V6_vaddwq_alt = 543
12382 CEFBS_UseHVXV60, // V6_vaddwsat_alt = 544
12383 CEFBS_UseHVXV60, // V6_vaddwsat_dv_alt = 545
12384 CEFBS_UseHVXV62, // V6_vandnqrt_acc_alt = 546
12385 CEFBS_UseHVXV62, // V6_vandnqrt_alt = 547
12386 CEFBS_UseHVXV60, // V6_vandqrt_acc_alt = 548
12387 CEFBS_UseHVXV60, // V6_vandqrt_alt = 549
12388 CEFBS_UseHVXV60, // V6_vandvrt_acc_alt = 550
12389 CEFBS_UseHVXV60, // V6_vandvrt_alt = 551
12390 CEFBS_UseHVXV65, // V6_vaslh_acc_alt = 552
12391 CEFBS_UseHVXV60, // V6_vaslh_alt = 553
12392 CEFBS_UseHVXV60, // V6_vaslhv_alt = 554
12393 CEFBS_UseHVXV60, // V6_vaslw_acc_alt = 555
12394 CEFBS_UseHVXV60, // V6_vaslw_alt = 556
12395 CEFBS_UseHVXV60, // V6_vaslwv_alt = 557
12396 CEFBS_UseHVXV66, // V6_vasr_into_alt = 558
12397 CEFBS_UseHVXV65, // V6_vasrh_acc_alt = 559
12398 CEFBS_UseHVXV60, // V6_vasrh_alt = 560
12399 CEFBS_UseHVXV60, // V6_vasrhv_alt = 561
12400 CEFBS_UseHVXV60, // V6_vasrw_acc_alt = 562
12401 CEFBS_UseHVXV60, // V6_vasrw_alt = 563
12402 CEFBS_UseHVXV60, // V6_vasrwv_alt = 564
12403 CEFBS_UseHVXV60, // V6_vassignp = 565
12404 CEFBS_UseHVXV65, // V6_vavgb_alt = 566
12405 CEFBS_UseHVXV65, // V6_vavgbrnd_alt = 567
12406 CEFBS_UseHVXV60, // V6_vavgh_alt = 568
12407 CEFBS_UseHVXV60, // V6_vavghrnd_alt = 569
12408 CEFBS_UseHVXV60, // V6_vavgub_alt = 570
12409 CEFBS_UseHVXV60, // V6_vavgubrnd_alt = 571
12410 CEFBS_UseHVXV60, // V6_vavguh_alt = 572
12411 CEFBS_UseHVXV60, // V6_vavguhrnd_alt = 573
12412 CEFBS_UseHVXV65, // V6_vavguw_alt = 574
12413 CEFBS_UseHVXV65, // V6_vavguwrnd_alt = 575
12414 CEFBS_UseHVXV60, // V6_vavgw_alt = 576
12415 CEFBS_UseHVXV60, // V6_vavgwrnd_alt = 577
12416 CEFBS_UseHVXV60, // V6_vcl0h_alt = 578
12417 CEFBS_UseHVXV60, // V6_vcl0w_alt = 579
12418 CEFBS_UseHVXV60, // V6_vd0 = 580
12419 CEFBS_UseHVXV65, // V6_vdd0 = 581
12420 CEFBS_UseHVXV60, // V6_vdealb4w_alt = 582
12421 CEFBS_UseHVXV60, // V6_vdealb_alt = 583
12422 CEFBS_UseHVXV60, // V6_vdealh_alt = 584
12423 CEFBS_UseHVXV60, // V6_vdmpybus_acc_alt = 585
12424 CEFBS_UseHVXV60, // V6_vdmpybus_alt = 586
12425 CEFBS_UseHVXV60, // V6_vdmpybus_dv_acc_alt = 587
12426 CEFBS_UseHVXV60, // V6_vdmpybus_dv_alt = 588
12427 CEFBS_UseHVXV60, // V6_vdmpyhb_acc_alt = 589
12428 CEFBS_UseHVXV60, // V6_vdmpyhb_alt = 590
12429 CEFBS_UseHVXV60, // V6_vdmpyhb_dv_acc_alt = 591
12430 CEFBS_UseHVXV60, // V6_vdmpyhb_dv_alt = 592
12431 CEFBS_UseHVXV60, // V6_vdmpyhisat_acc_alt = 593
12432 CEFBS_UseHVXV60, // V6_vdmpyhisat_alt = 594
12433 CEFBS_UseHVXV60, // V6_vdmpyhsat_acc_alt = 595
12434 CEFBS_UseHVXV60, // V6_vdmpyhsat_alt = 596
12435 CEFBS_UseHVXV60, // V6_vdmpyhsuisat_acc_alt = 597
12436 CEFBS_UseHVXV60, // V6_vdmpyhsuisat_alt = 598
12437 CEFBS_UseHVXV60, // V6_vdmpyhsusat_acc_alt = 599
12438 CEFBS_UseHVXV60, // V6_vdmpyhsusat_alt = 600
12439 CEFBS_UseHVXV60, // V6_vdmpyhvsat_acc_alt = 601
12440 CEFBS_UseHVXV60, // V6_vdmpyhvsat_alt = 602
12441 CEFBS_UseHVXV60, // V6_vdsaduh_acc_alt = 603
12442 CEFBS_UseHVXV60, // V6_vdsaduh_alt = 604
12443 CEFBS_None, // V6_vgathermh_pseudo = 605
12444 CEFBS_None, // V6_vgathermhq_pseudo = 606
12445 CEFBS_None, // V6_vgathermhw_pseudo = 607
12446 CEFBS_None, // V6_vgathermhwq_pseudo = 608
12447 CEFBS_None, // V6_vgathermw_pseudo = 609
12448 CEFBS_None, // V6_vgathermwq_pseudo = 610
12449 CEFBS_UseHVXV60, // V6_vlsrh_alt = 611
12450 CEFBS_UseHVXV60, // V6_vlsrhv_alt = 612
12451 CEFBS_UseHVXV60, // V6_vlsrw_alt = 613
12452 CEFBS_UseHVXV60, // V6_vlsrwv_alt = 614
12453 CEFBS_UseHVXV62, // V6_vmaxb_alt = 615
12454 CEFBS_UseHVXV60, // V6_vmaxh_alt = 616
12455 CEFBS_UseHVXV60, // V6_vmaxub_alt = 617
12456 CEFBS_UseHVXV60, // V6_vmaxuh_alt = 618
12457 CEFBS_UseHVXV60, // V6_vmaxw_alt = 619
12458 CEFBS_UseHVXV62, // V6_vminb_alt = 620
12459 CEFBS_UseHVXV60, // V6_vminh_alt = 621
12460 CEFBS_UseHVXV60, // V6_vminub_alt = 622
12461 CEFBS_UseHVXV60, // V6_vminuh_alt = 623
12462 CEFBS_UseHVXV60, // V6_vminw_alt = 624
12463 CEFBS_UseHVXV60, // V6_vmpabus_acc_alt = 625
12464 CEFBS_UseHVXV60, // V6_vmpabus_alt = 626
12465 CEFBS_UseHVXV60, // V6_vmpabusv_alt = 627
12466 CEFBS_UseHVXV65, // V6_vmpabuu_acc_alt = 628
12467 CEFBS_UseHVXV65, // V6_vmpabuu_alt = 629
12468 CEFBS_UseHVXV60, // V6_vmpabuuv_alt = 630
12469 CEFBS_UseHVXV60, // V6_vmpahb_acc_alt = 631
12470 CEFBS_UseHVXV60, // V6_vmpahb_alt = 632
12471 CEFBS_UseHVXV62, // V6_vmpauhb_acc_alt = 633
12472 CEFBS_UseHVXV62, // V6_vmpauhb_alt = 634
12473 CEFBS_UseHVXV60, // V6_vmpybus_acc_alt = 635
12474 CEFBS_UseHVXV60, // V6_vmpybus_alt = 636
12475 CEFBS_UseHVXV60, // V6_vmpybusv_acc_alt = 637
12476 CEFBS_UseHVXV60, // V6_vmpybusv_alt = 638
12477 CEFBS_UseHVXV60, // V6_vmpybv_acc_alt = 639
12478 CEFBS_UseHVXV60, // V6_vmpybv_alt = 640
12479 CEFBS_UseHVXV60, // V6_vmpyewuh_alt = 641
12480 CEFBS_UseHVXV65, // V6_vmpyh_acc_alt = 642
12481 CEFBS_UseHVXV60, // V6_vmpyh_alt = 643
12482 CEFBS_UseHVXV60, // V6_vmpyhsat_acc_alt = 644
12483 CEFBS_UseHVXV60, // V6_vmpyhsrs_alt = 645
12484 CEFBS_UseHVXV60, // V6_vmpyhss_alt = 646
12485 CEFBS_UseHVXV60, // V6_vmpyhus_acc_alt = 647
12486 CEFBS_UseHVXV60, // V6_vmpyhus_alt = 648
12487 CEFBS_UseHVXV60, // V6_vmpyhv_acc_alt = 649
12488 CEFBS_UseHVXV60, // V6_vmpyhv_alt = 650
12489 CEFBS_UseHVXV60, // V6_vmpyhvsrs_alt = 651
12490 CEFBS_UseHVXV60, // V6_vmpyiewh_acc_alt = 652
12491 CEFBS_UseHVXV60, // V6_vmpyiewuh_acc_alt = 653
12492 CEFBS_UseHVXV60, // V6_vmpyiewuh_alt = 654
12493 CEFBS_UseHVXV60, // V6_vmpyih_acc_alt = 655
12494 CEFBS_UseHVXV60, // V6_vmpyih_alt = 656
12495 CEFBS_UseHVXV60, // V6_vmpyihb_acc_alt = 657
12496 CEFBS_UseHVXV60, // V6_vmpyihb_alt = 658
12497 CEFBS_UseHVXV60, // V6_vmpyiowh_alt = 659
12498 CEFBS_UseHVXV60, // V6_vmpyiwb_acc_alt = 660
12499 CEFBS_UseHVXV60, // V6_vmpyiwb_alt = 661
12500 CEFBS_UseHVXV60, // V6_vmpyiwh_acc_alt = 662
12501 CEFBS_UseHVXV60, // V6_vmpyiwh_alt = 663
12502 CEFBS_UseHVXV62, // V6_vmpyiwub_acc_alt = 664
12503 CEFBS_UseHVXV62, // V6_vmpyiwub_alt = 665
12504 CEFBS_UseHVXV60, // V6_vmpyowh_alt = 666
12505 CEFBS_UseHVXV60, // V6_vmpyowh_rnd_alt = 667
12506 CEFBS_UseHVXV60, // V6_vmpyowh_rnd_sacc_alt = 668
12507 CEFBS_UseHVXV60, // V6_vmpyowh_sacc_alt = 669
12508 CEFBS_UseHVXV60, // V6_vmpyub_acc_alt = 670
12509 CEFBS_UseHVXV60, // V6_vmpyub_alt = 671
12510 CEFBS_UseHVXV60, // V6_vmpyubv_acc_alt = 672
12511 CEFBS_UseHVXV60, // V6_vmpyubv_alt = 673
12512 CEFBS_UseHVXV60, // V6_vmpyuh_acc_alt = 674
12513 CEFBS_UseHVXV60, // V6_vmpyuh_alt = 675
12514 CEFBS_UseHVXV60, // V6_vmpyuhv_acc_alt = 676
12515 CEFBS_UseHVXV60, // V6_vmpyuhv_alt = 677
12516 CEFBS_UseHVXV65, // V6_vnavgb_alt = 678
12517 CEFBS_UseHVXV60, // V6_vnavgh_alt = 679
12518 CEFBS_UseHVXV60, // V6_vnavgub_alt = 680
12519 CEFBS_UseHVXV60, // V6_vnavgw_alt = 681
12520 CEFBS_UseHVXV60, // V6_vnormamth_alt = 682
12521 CEFBS_UseHVXV60, // V6_vnormamtw_alt = 683
12522 CEFBS_UseHVXV60, // V6_vpackeb_alt = 684
12523 CEFBS_UseHVXV60, // V6_vpackeh_alt = 685
12524 CEFBS_UseHVXV60, // V6_vpackhb_sat_alt = 686
12525 CEFBS_UseHVXV60, // V6_vpackhub_sat_alt = 687
12526 CEFBS_UseHVXV60, // V6_vpackob_alt = 688
12527 CEFBS_UseHVXV60, // V6_vpackoh_alt = 689
12528 CEFBS_UseHVXV60, // V6_vpackwh_sat_alt = 690
12529 CEFBS_UseHVXV60, // V6_vpackwuh_sat_alt = 691
12530 CEFBS_UseHVXV60, // V6_vpopcounth_alt = 692
12531 CEFBS_UseHVXV65, // V6_vrmpybub_rtt_acc_alt = 693
12532 CEFBS_UseHVXV65, // V6_vrmpybub_rtt_alt = 694
12533 CEFBS_UseHVXV60, // V6_vrmpybus_acc_alt = 695
12534 CEFBS_UseHVXV60, // V6_vrmpybus_alt = 696
12535 CEFBS_UseHVXV60, // V6_vrmpybusi_acc_alt = 697
12536 CEFBS_UseHVXV60, // V6_vrmpybusi_alt = 698
12537 CEFBS_UseHVXV60, // V6_vrmpybusv_acc_alt = 699
12538 CEFBS_UseHVXV60, // V6_vrmpybusv_alt = 700
12539 CEFBS_UseHVXV60, // V6_vrmpybv_acc_alt = 701
12540 CEFBS_UseHVXV60, // V6_vrmpybv_alt = 702
12541 CEFBS_UseHVXV60, // V6_vrmpyub_acc_alt = 703
12542 CEFBS_UseHVXV60, // V6_vrmpyub_alt = 704
12543 CEFBS_UseHVXV65, // V6_vrmpyub_rtt_acc_alt = 705
12544 CEFBS_UseHVXV65, // V6_vrmpyub_rtt_alt = 706
12545 CEFBS_UseHVXV60, // V6_vrmpyubi_acc_alt = 707
12546 CEFBS_UseHVXV60, // V6_vrmpyubi_alt = 708
12547 CEFBS_UseHVXV60, // V6_vrmpyubv_acc_alt = 709
12548 CEFBS_UseHVXV60, // V6_vrmpyubv_alt = 710
12549 CEFBS_UseHVXV66, // V6_vrotr_alt = 711
12550 CEFBS_UseHVXV60, // V6_vroundhb_alt = 712
12551 CEFBS_UseHVXV60, // V6_vroundhub_alt = 713
12552 CEFBS_UseHVXV62, // V6_vrounduhub_alt = 714
12553 CEFBS_UseHVXV62, // V6_vrounduwuh_alt = 715
12554 CEFBS_UseHVXV60, // V6_vroundwh_alt = 716
12555 CEFBS_UseHVXV60, // V6_vroundwuh_alt = 717
12556 CEFBS_UseHVXV60, // V6_vrsadubi_acc_alt = 718
12557 CEFBS_UseHVXV60, // V6_vrsadubi_alt = 719
12558 CEFBS_UseHVXV60, // V6_vsathub_alt = 720
12559 CEFBS_UseHVXV62, // V6_vsatuwuh_alt = 721
12560 CEFBS_UseHVXV60, // V6_vsatwh_alt = 722
12561 CEFBS_UseHVXV60, // V6_vsb_alt = 723
12562 CEFBS_UseHVXV65, // V6_vscattermh_add_alt = 724
12563 CEFBS_UseHVXV65, // V6_vscattermh_alt = 725
12564 CEFBS_UseHVXV65, // V6_vscattermhq_alt = 726
12565 CEFBS_UseHVXV65, // V6_vscattermw_add_alt = 727
12566 CEFBS_UseHVXV65, // V6_vscattermw_alt = 728
12567 CEFBS_UseHVXV65, // V6_vscattermwh_add_alt = 729
12568 CEFBS_UseHVXV65, // V6_vscattermwh_alt = 730
12569 CEFBS_UseHVXV65, // V6_vscattermwhq_alt = 731
12570 CEFBS_UseHVXV65, // V6_vscattermwq_alt = 732
12571 CEFBS_UseHVXV60, // V6_vsh_alt = 733
12572 CEFBS_UseHVXV60, // V6_vshufeh_alt = 734
12573 CEFBS_UseHVXV60, // V6_vshuffb_alt = 735
12574 CEFBS_UseHVXV60, // V6_vshuffeb_alt = 736
12575 CEFBS_UseHVXV60, // V6_vshuffh_alt = 737
12576 CEFBS_UseHVXV60, // V6_vshuffob_alt = 738
12577 CEFBS_UseHVXV60, // V6_vshufoeb_alt = 739
12578 CEFBS_UseHVXV60, // V6_vshufoeh_alt = 740
12579 CEFBS_UseHVXV60, // V6_vshufoh_alt = 741
12580 CEFBS_UseHVXV60, // V6_vsubb_alt = 742
12581 CEFBS_UseHVXV60, // V6_vsubb_dv_alt = 743
12582 CEFBS_UseHVXV60, // V6_vsubbnq_alt = 744
12583 CEFBS_UseHVXV60, // V6_vsubbq_alt = 745
12584 CEFBS_UseHVXV62, // V6_vsubbsat_alt = 746
12585 CEFBS_UseHVXV62, // V6_vsubbsat_dv_alt = 747
12586 CEFBS_UseHVXV60, // V6_vsubh_alt = 748
12587 CEFBS_UseHVXV60, // V6_vsubh_dv_alt = 749
12588 CEFBS_UseHVXV60, // V6_vsubhnq_alt = 750
12589 CEFBS_UseHVXV60, // V6_vsubhq_alt = 751
12590 CEFBS_UseHVXV60, // V6_vsubhsat_alt = 752
12591 CEFBS_UseHVXV60, // V6_vsubhsat_dv_alt = 753
12592 CEFBS_UseHVXV60, // V6_vsubhw_alt = 754
12593 CEFBS_UseHVXV60, // V6_vsububh_alt = 755
12594 CEFBS_UseHVXV60, // V6_vsububsat_alt = 756
12595 CEFBS_UseHVXV60, // V6_vsububsat_dv_alt = 757
12596 CEFBS_UseHVXV60, // V6_vsubuhsat_alt = 758
12597 CEFBS_UseHVXV60, // V6_vsubuhsat_dv_alt = 759
12598 CEFBS_UseHVXV60, // V6_vsubuhw_alt = 760
12599 CEFBS_UseHVXV62, // V6_vsubuwsat_alt = 761
12600 CEFBS_UseHVXV62, // V6_vsubuwsat_dv_alt = 762
12601 CEFBS_UseHVXV60, // V6_vsubw_alt = 763
12602 CEFBS_UseHVXV60, // V6_vsubw_dv_alt = 764
12603 CEFBS_UseHVXV60, // V6_vsubwnq_alt = 765
12604 CEFBS_UseHVXV60, // V6_vsubwq_alt = 766
12605 CEFBS_UseHVXV60, // V6_vsubwsat_alt = 767
12606 CEFBS_UseHVXV60, // V6_vsubwsat_dv_alt = 768
12607 CEFBS_UseHVXV60, // V6_vtmpyb_acc_alt = 769
12608 CEFBS_UseHVXV60, // V6_vtmpyb_alt = 770
12609 CEFBS_UseHVXV60, // V6_vtmpybus_acc_alt = 771
12610 CEFBS_UseHVXV60, // V6_vtmpybus_alt = 772
12611 CEFBS_UseHVXV60, // V6_vtmpyhb_acc_alt = 773
12612 CEFBS_UseHVXV60, // V6_vtmpyhb_alt = 774
12613 CEFBS_UseHVXV60, // V6_vtran2x2_map = 775
12614 CEFBS_UseHVXV60, // V6_vunpackb_alt = 776
12615 CEFBS_UseHVXV60, // V6_vunpackh_alt = 777
12616 CEFBS_UseHVXV60, // V6_vunpackob_alt = 778
12617 CEFBS_UseHVXV60, // V6_vunpackoh_alt = 779
12618 CEFBS_UseHVXV60, // V6_vunpackub_alt = 780
12619 CEFBS_UseHVXV60, // V6_vunpackuh_alt = 781
12620 CEFBS_UseHVXV60, // V6_vzb_alt = 782
12621 CEFBS_UseHVXV60, // V6_vzh_alt = 783
12622 CEFBS_UseHVXV66, // V6_zld0 = 784
12623 CEFBS_UseHVXV66, // V6_zldp0 = 785
12624 CEFBS_None, // Y2_dcfetch = 786
12625 CEFBS_HasV67, // dup_A2_add = 787
12626 CEFBS_HasV67, // dup_A2_addi = 788
12627 CEFBS_HasV67, // dup_A2_andir = 789
12628 CEFBS_HasV67, // dup_A2_combineii = 790
12629 CEFBS_HasV67, // dup_A2_sxtb = 791
12630 CEFBS_HasV67, // dup_A2_sxth = 792
12631 CEFBS_HasV67, // dup_A2_tfr = 793
12632 CEFBS_HasV67, // dup_A2_tfrsi = 794
12633 CEFBS_HasV67, // dup_A2_zxtb = 795
12634 CEFBS_HasV67, // dup_A2_zxth = 796
12635 CEFBS_HasV67, // dup_A4_combineii = 797
12636 CEFBS_HasV67, // dup_A4_combineir = 798
12637 CEFBS_HasV67, // dup_A4_combineri = 799
12638 CEFBS_HasV67, // dup_C2_cmoveif = 800
12639 CEFBS_HasV67, // dup_C2_cmoveit = 801
12640 CEFBS_HasV67, // dup_C2_cmovenewif = 802
12641 CEFBS_HasV67, // dup_C2_cmovenewit = 803
12642 CEFBS_HasV67, // dup_C2_cmpeqi = 804
12643 CEFBS_HasV67, // dup_L2_deallocframe = 805
12644 CEFBS_HasV67, // dup_L2_loadrb_io = 806
12645 CEFBS_HasV67, // dup_L2_loadrd_io = 807
12646 CEFBS_HasV67, // dup_L2_loadrh_io = 808
12647 CEFBS_HasV67, // dup_L2_loadri_io = 809
12648 CEFBS_HasV67, // dup_L2_loadrub_io = 810
12649 CEFBS_HasV67, // dup_L2_loadruh_io = 811
12650 CEFBS_HasV67, // dup_S2_allocframe = 812
12651 CEFBS_HasV67, // dup_S2_storerb_io = 813
12652 CEFBS_HasV67, // dup_S2_storerd_io = 814
12653 CEFBS_HasV67, // dup_S2_storerh_io = 815
12654 CEFBS_HasV67, // dup_S2_storeri_io = 816
12655 CEFBS_HasV67, // dup_S4_storeirb_io = 817
12656 CEFBS_HasV67, // dup_S4_storeiri_io = 818
12657 CEFBS_None, // A2_abs = 819
12658 CEFBS_None, // A2_absp = 820
12659 CEFBS_None, // A2_abssat = 821
12660 CEFBS_None, // A2_add = 822
12661 CEFBS_None, // A2_addh_h16_hh = 823
12662 CEFBS_None, // A2_addh_h16_hl = 824
12663 CEFBS_None, // A2_addh_h16_lh = 825
12664 CEFBS_None, // A2_addh_h16_ll = 826
12665 CEFBS_None, // A2_addh_h16_sat_hh = 827
12666 CEFBS_None, // A2_addh_h16_sat_hl = 828
12667 CEFBS_None, // A2_addh_h16_sat_lh = 829
12668 CEFBS_None, // A2_addh_h16_sat_ll = 830
12669 CEFBS_None, // A2_addh_l16_hl = 831
12670 CEFBS_None, // A2_addh_l16_ll = 832
12671 CEFBS_None, // A2_addh_l16_sat_hl = 833
12672 CEFBS_None, // A2_addh_l16_sat_ll = 834
12673 CEFBS_None, // A2_addi = 835
12674 CEFBS_None, // A2_addp = 836
12675 CEFBS_None, // A2_addpsat = 837
12676 CEFBS_None, // A2_addsat = 838
12677 CEFBS_None, // A2_addsph = 839
12678 CEFBS_None, // A2_addspl = 840
12679 CEFBS_None, // A2_and = 841
12680 CEFBS_None, // A2_andir = 842
12681 CEFBS_None, // A2_andp = 843
12682 CEFBS_None, // A2_aslh = 844
12683 CEFBS_None, // A2_asrh = 845
12684 CEFBS_None, // A2_combine_hh = 846
12685 CEFBS_None, // A2_combine_hl = 847
12686 CEFBS_None, // A2_combine_lh = 848
12687 CEFBS_None, // A2_combine_ll = 849
12688 CEFBS_None, // A2_combineii = 850
12689 CEFBS_None, // A2_combinew = 851
12690 CEFBS_None, // A2_max = 852
12691 CEFBS_None, // A2_maxp = 853
12692 CEFBS_None, // A2_maxu = 854
12693 CEFBS_None, // A2_maxup = 855
12694 CEFBS_None, // A2_min = 856
12695 CEFBS_None, // A2_minp = 857
12696 CEFBS_None, // A2_minu = 858
12697 CEFBS_None, // A2_minup = 859
12698 CEFBS_None, // A2_negp = 860
12699 CEFBS_None, // A2_negsat = 861
12700 CEFBS_None, // A2_nop = 862
12701 CEFBS_None, // A2_notp = 863
12702 CEFBS_None, // A2_or = 864
12703 CEFBS_None, // A2_orir = 865
12704 CEFBS_None, // A2_orp = 866
12705 CEFBS_None, // A2_paddf = 867
12706 CEFBS_None, // A2_paddfnew = 868
12707 CEFBS_None, // A2_paddif = 869
12708 CEFBS_None, // A2_paddifnew = 870
12709 CEFBS_None, // A2_paddit = 871
12710 CEFBS_None, // A2_padditnew = 872
12711 CEFBS_None, // A2_paddt = 873
12712 CEFBS_None, // A2_paddtnew = 874
12713 CEFBS_None, // A2_pandf = 875
12714 CEFBS_None, // A2_pandfnew = 876
12715 CEFBS_None, // A2_pandt = 877
12716 CEFBS_None, // A2_pandtnew = 878
12717 CEFBS_None, // A2_porf = 879
12718 CEFBS_None, // A2_porfnew = 880
12719 CEFBS_None, // A2_port = 881
12720 CEFBS_None, // A2_portnew = 882
12721 CEFBS_None, // A2_psubf = 883
12722 CEFBS_None, // A2_psubfnew = 884
12723 CEFBS_None, // A2_psubt = 885
12724 CEFBS_None, // A2_psubtnew = 886
12725 CEFBS_None, // A2_pxorf = 887
12726 CEFBS_None, // A2_pxorfnew = 888
12727 CEFBS_None, // A2_pxort = 889
12728 CEFBS_None, // A2_pxortnew = 890
12729 CEFBS_None, // A2_roundsat = 891
12730 CEFBS_None, // A2_sat = 892
12731 CEFBS_None, // A2_satb = 893
12732 CEFBS_None, // A2_sath = 894
12733 CEFBS_None, // A2_satub = 895
12734 CEFBS_None, // A2_satuh = 896
12735 CEFBS_None, // A2_sub = 897
12736 CEFBS_None, // A2_subh_h16_hh = 898
12737 CEFBS_None, // A2_subh_h16_hl = 899
12738 CEFBS_None, // A2_subh_h16_lh = 900
12739 CEFBS_None, // A2_subh_h16_ll = 901
12740 CEFBS_None, // A2_subh_h16_sat_hh = 902
12741 CEFBS_None, // A2_subh_h16_sat_hl = 903
12742 CEFBS_None, // A2_subh_h16_sat_lh = 904
12743 CEFBS_None, // A2_subh_h16_sat_ll = 905
12744 CEFBS_None, // A2_subh_l16_hl = 906
12745 CEFBS_None, // A2_subh_l16_ll = 907
12746 CEFBS_None, // A2_subh_l16_sat_hl = 908
12747 CEFBS_None, // A2_subh_l16_sat_ll = 909
12748 CEFBS_None, // A2_subp = 910
12749 CEFBS_None, // A2_subri = 911
12750 CEFBS_None, // A2_subsat = 912
12751 CEFBS_None, // A2_svaddh = 913
12752 CEFBS_None, // A2_svaddhs = 914
12753 CEFBS_None, // A2_svadduhs = 915
12754 CEFBS_None, // A2_svavgh = 916
12755 CEFBS_None, // A2_svavghs = 917
12756 CEFBS_None, // A2_svnavgh = 918
12757 CEFBS_None, // A2_svsubh = 919
12758 CEFBS_None, // A2_svsubhs = 920
12759 CEFBS_None, // A2_svsubuhs = 921
12760 CEFBS_None, // A2_swiz = 922
12761 CEFBS_None, // A2_sxtb = 923
12762 CEFBS_None, // A2_sxth = 924
12763 CEFBS_None, // A2_sxtw = 925
12764 CEFBS_None, // A2_tfr = 926
12765 CEFBS_None, // A2_tfrcrr = 927
12766 CEFBS_None, // A2_tfrih = 928
12767 CEFBS_None, // A2_tfril = 929
12768 CEFBS_None, // A2_tfrrcr = 930
12769 CEFBS_None, // A2_tfrsi = 931
12770 CEFBS_None, // A2_vabsh = 932
12771 CEFBS_None, // A2_vabshsat = 933
12772 CEFBS_None, // A2_vabsw = 934
12773 CEFBS_None, // A2_vabswsat = 935
12774 CEFBS_None, // A2_vaddh = 936
12775 CEFBS_None, // A2_vaddhs = 937
12776 CEFBS_None, // A2_vaddub = 938
12777 CEFBS_None, // A2_vaddubs = 939
12778 CEFBS_None, // A2_vadduhs = 940
12779 CEFBS_None, // A2_vaddw = 941
12780 CEFBS_None, // A2_vaddws = 942
12781 CEFBS_None, // A2_vavgh = 943
12782 CEFBS_None, // A2_vavghcr = 944
12783 CEFBS_None, // A2_vavghr = 945
12784 CEFBS_None, // A2_vavgub = 946
12785 CEFBS_None, // A2_vavgubr = 947
12786 CEFBS_None, // A2_vavguh = 948
12787 CEFBS_None, // A2_vavguhr = 949
12788 CEFBS_None, // A2_vavguw = 950
12789 CEFBS_None, // A2_vavguwr = 951
12790 CEFBS_None, // A2_vavgw = 952
12791 CEFBS_None, // A2_vavgwcr = 953
12792 CEFBS_None, // A2_vavgwr = 954
12793 CEFBS_None, // A2_vcmpbeq = 955
12794 CEFBS_None, // A2_vcmpbgtu = 956
12795 CEFBS_None, // A2_vcmpheq = 957
12796 CEFBS_None, // A2_vcmphgt = 958
12797 CEFBS_None, // A2_vcmphgtu = 959
12798 CEFBS_None, // A2_vcmpweq = 960
12799 CEFBS_None, // A2_vcmpwgt = 961
12800 CEFBS_None, // A2_vcmpwgtu = 962
12801 CEFBS_None, // A2_vconj = 963
12802 CEFBS_None, // A2_vmaxb = 964
12803 CEFBS_None, // A2_vmaxh = 965
12804 CEFBS_None, // A2_vmaxub = 966
12805 CEFBS_None, // A2_vmaxuh = 967
12806 CEFBS_None, // A2_vmaxuw = 968
12807 CEFBS_None, // A2_vmaxw = 969
12808 CEFBS_None, // A2_vminb = 970
12809 CEFBS_None, // A2_vminh = 971
12810 CEFBS_None, // A2_vminub = 972
12811 CEFBS_None, // A2_vminuh = 973
12812 CEFBS_None, // A2_vminuw = 974
12813 CEFBS_None, // A2_vminw = 975
12814 CEFBS_None, // A2_vnavgh = 976
12815 CEFBS_None, // A2_vnavghcr = 977
12816 CEFBS_None, // A2_vnavghr = 978
12817 CEFBS_None, // A2_vnavgw = 979
12818 CEFBS_None, // A2_vnavgwcr = 980
12819 CEFBS_None, // A2_vnavgwr = 981
12820 CEFBS_None, // A2_vraddub = 982
12821 CEFBS_None, // A2_vraddub_acc = 983
12822 CEFBS_None, // A2_vrsadub = 984
12823 CEFBS_None, // A2_vrsadub_acc = 985
12824 CEFBS_None, // A2_vsubh = 986
12825 CEFBS_None, // A2_vsubhs = 987
12826 CEFBS_None, // A2_vsubub = 988
12827 CEFBS_None, // A2_vsububs = 989
12828 CEFBS_None, // A2_vsubuhs = 990
12829 CEFBS_None, // A2_vsubw = 991
12830 CEFBS_None, // A2_vsubws = 992
12831 CEFBS_None, // A2_xor = 993
12832 CEFBS_None, // A2_xorp = 994
12833 CEFBS_None, // A2_zxth = 995
12834 CEFBS_None, // A4_addp_c = 996
12835 CEFBS_None, // A4_andn = 997
12836 CEFBS_None, // A4_andnp = 998
12837 CEFBS_None, // A4_bitsplit = 999
12838 CEFBS_None, // A4_bitspliti = 1000
12839 CEFBS_None, // A4_boundscheck_hi = 1001
12840 CEFBS_None, // A4_boundscheck_lo = 1002
12841 CEFBS_None, // A4_cmpbeq = 1003
12842 CEFBS_None, // A4_cmpbeqi = 1004
12843 CEFBS_None, // A4_cmpbgt = 1005
12844 CEFBS_None, // A4_cmpbgti = 1006
12845 CEFBS_None, // A4_cmpbgtu = 1007
12846 CEFBS_None, // A4_cmpbgtui = 1008
12847 CEFBS_None, // A4_cmpheq = 1009
12848 CEFBS_None, // A4_cmpheqi = 1010
12849 CEFBS_None, // A4_cmphgt = 1011
12850 CEFBS_None, // A4_cmphgti = 1012
12851 CEFBS_None, // A4_cmphgtu = 1013
12852 CEFBS_None, // A4_cmphgtui = 1014
12853 CEFBS_None, // A4_combineii = 1015
12854 CEFBS_None, // A4_combineir = 1016
12855 CEFBS_None, // A4_combineri = 1017
12856 CEFBS_None, // A4_cround_ri = 1018
12857 CEFBS_None, // A4_cround_rr = 1019
12858 CEFBS_None, // A4_ext = 1020
12859 CEFBS_None, // A4_modwrapu = 1021
12860 CEFBS_None, // A4_orn = 1022
12861 CEFBS_None, // A4_ornp = 1023
12862 CEFBS_None, // A4_paslhf = 1024
12863 CEFBS_None, // A4_paslhfnew = 1025
12864 CEFBS_None, // A4_paslht = 1026
12865 CEFBS_None, // A4_paslhtnew = 1027
12866 CEFBS_None, // A4_pasrhf = 1028
12867 CEFBS_None, // A4_pasrhfnew = 1029
12868 CEFBS_None, // A4_pasrht = 1030
12869 CEFBS_None, // A4_pasrhtnew = 1031
12870 CEFBS_None, // A4_psxtbf = 1032
12871 CEFBS_None, // A4_psxtbfnew = 1033
12872 CEFBS_None, // A4_psxtbt = 1034
12873 CEFBS_None, // A4_psxtbtnew = 1035
12874 CEFBS_None, // A4_psxthf = 1036
12875 CEFBS_None, // A4_psxthfnew = 1037
12876 CEFBS_None, // A4_psxtht = 1038
12877 CEFBS_None, // A4_psxthtnew = 1039
12878 CEFBS_None, // A4_pzxtbf = 1040
12879 CEFBS_None, // A4_pzxtbfnew = 1041
12880 CEFBS_None, // A4_pzxtbt = 1042
12881 CEFBS_None, // A4_pzxtbtnew = 1043
12882 CEFBS_None, // A4_pzxthf = 1044
12883 CEFBS_None, // A4_pzxthfnew = 1045
12884 CEFBS_None, // A4_pzxtht = 1046
12885 CEFBS_None, // A4_pzxthtnew = 1047
12886 CEFBS_None, // A4_rcmpeq = 1048
12887 CEFBS_None, // A4_rcmpeqi = 1049
12888 CEFBS_None, // A4_rcmpneq = 1050
12889 CEFBS_None, // A4_rcmpneqi = 1051
12890 CEFBS_None, // A4_round_ri = 1052
12891 CEFBS_None, // A4_round_ri_sat = 1053
12892 CEFBS_None, // A4_round_rr = 1054
12893 CEFBS_None, // A4_round_rr_sat = 1055
12894 CEFBS_None, // A4_subp_c = 1056
12895 CEFBS_None, // A4_tfrcpp = 1057
12896 CEFBS_None, // A4_tfrpcp = 1058
12897 CEFBS_None, // A4_tlbmatch = 1059
12898 CEFBS_None, // A4_vcmpbeq_any = 1060
12899 CEFBS_None, // A4_vcmpbeqi = 1061
12900 CEFBS_None, // A4_vcmpbgt = 1062
12901 CEFBS_None, // A4_vcmpbgti = 1063
12902 CEFBS_None, // A4_vcmpbgtui = 1064
12903 CEFBS_None, // A4_vcmpheqi = 1065
12904 CEFBS_None, // A4_vcmphgti = 1066
12905 CEFBS_None, // A4_vcmphgtui = 1067
12906 CEFBS_None, // A4_vcmpweqi = 1068
12907 CEFBS_None, // A4_vcmpwgti = 1069
12908 CEFBS_None, // A4_vcmpwgtui = 1070
12909 CEFBS_None, // A4_vrmaxh = 1071
12910 CEFBS_None, // A4_vrmaxuh = 1072
12911 CEFBS_None, // A4_vrmaxuw = 1073
12912 CEFBS_None, // A4_vrmaxw = 1074
12913 CEFBS_None, // A4_vrminh = 1075
12914 CEFBS_None, // A4_vrminuh = 1076
12915 CEFBS_None, // A4_vrminuw = 1077
12916 CEFBS_None, // A4_vrminw = 1078
12917 CEFBS_HasV55, // A5_ACS = 1079
12918 CEFBS_None, // A5_vaddhubs = 1080
12919 CEFBS_HasV65, // A6_vcmpbeq_notany = 1081
12920 CEFBS_HasV62, // A6_vminub_RdP = 1082
12921 CEFBS_HasV67_UseAudio, // A7_clip = 1083
12922 CEFBS_HasV67_UseAudio, // A7_croundd_ri = 1084
12923 CEFBS_HasV67_UseAudio, // A7_croundd_rr = 1085
12924 CEFBS_HasV67_UseAudio, // A7_vclip = 1086
12925 CEFBS_None, // C2_all8 = 1087
12926 CEFBS_None, // C2_and = 1088
12927 CEFBS_None, // C2_andn = 1089
12928 CEFBS_None, // C2_any8 = 1090
12929 CEFBS_None, // C2_bitsclr = 1091
12930 CEFBS_None, // C2_bitsclri = 1092
12931 CEFBS_None, // C2_bitsset = 1093
12932 CEFBS_None, // C2_ccombinewf = 1094
12933 CEFBS_None, // C2_ccombinewnewf = 1095
12934 CEFBS_None, // C2_ccombinewnewt = 1096
12935 CEFBS_None, // C2_ccombinewt = 1097
12936 CEFBS_None, // C2_cmoveif = 1098
12937 CEFBS_None, // C2_cmoveit = 1099
12938 CEFBS_None, // C2_cmovenewif = 1100
12939 CEFBS_None, // C2_cmovenewit = 1101
12940 CEFBS_None, // C2_cmpeq = 1102
12941 CEFBS_None, // C2_cmpeqi = 1103
12942 CEFBS_None, // C2_cmpeqp = 1104
12943 CEFBS_None, // C2_cmpgt = 1105
12944 CEFBS_None, // C2_cmpgti = 1106
12945 CEFBS_None, // C2_cmpgtp = 1107
12946 CEFBS_None, // C2_cmpgtu = 1108
12947 CEFBS_None, // C2_cmpgtui = 1109
12948 CEFBS_None, // C2_cmpgtup = 1110
12949 CEFBS_None, // C2_mask = 1111
12950 CEFBS_None, // C2_mux = 1112
12951 CEFBS_None, // C2_muxii = 1113
12952 CEFBS_None, // C2_muxir = 1114
12953 CEFBS_None, // C2_muxri = 1115
12954 CEFBS_None, // C2_not = 1116
12955 CEFBS_None, // C2_or = 1117
12956 CEFBS_None, // C2_orn = 1118
12957 CEFBS_None, // C2_tfrpr = 1119
12958 CEFBS_None, // C2_tfrrp = 1120
12959 CEFBS_None, // C2_vitpack = 1121
12960 CEFBS_None, // C2_vmux = 1122
12961 CEFBS_None, // C2_xor = 1123
12962 CEFBS_None, // C4_addipc = 1124
12963 CEFBS_None, // C4_and_and = 1125
12964 CEFBS_None, // C4_and_andn = 1126
12965 CEFBS_None, // C4_and_or = 1127
12966 CEFBS_None, // C4_and_orn = 1128
12967 CEFBS_None, // C4_cmplte = 1129
12968 CEFBS_None, // C4_cmpltei = 1130
12969 CEFBS_None, // C4_cmplteu = 1131
12970 CEFBS_None, // C4_cmplteui = 1132
12971 CEFBS_None, // C4_cmpneq = 1133
12972 CEFBS_None, // C4_cmpneqi = 1134
12973 CEFBS_None, // C4_fastcorner9 = 1135
12974 CEFBS_None, // C4_fastcorner9_not = 1136
12975 CEFBS_None, // C4_nbitsclr = 1137
12976 CEFBS_None, // C4_nbitsclri = 1138
12977 CEFBS_None, // C4_nbitsset = 1139
12978 CEFBS_None, // C4_or_and = 1140
12979 CEFBS_None, // C4_or_andn = 1141
12980 CEFBS_None, // C4_or_or = 1142
12981 CEFBS_None, // C4_or_orn = 1143
12982 CEFBS_None, // CALLProfile = 1144
12983 CEFBS_None, // CONST32 = 1145
12984 CEFBS_None, // CONST64 = 1146
12985 CEFBS_None, // DuplexIClass0 = 1147
12986 CEFBS_None, // DuplexIClass1 = 1148
12987 CEFBS_None, // DuplexIClass2 = 1149
12988 CEFBS_None, // DuplexIClass3 = 1150
12989 CEFBS_None, // DuplexIClass4 = 1151
12990 CEFBS_None, // DuplexIClass5 = 1152
12991 CEFBS_None, // DuplexIClass6 = 1153
12992 CEFBS_None, // DuplexIClass7 = 1154
12993 CEFBS_None, // DuplexIClass8 = 1155
12994 CEFBS_None, // DuplexIClass9 = 1156
12995 CEFBS_None, // DuplexIClassA = 1157
12996 CEFBS_None, // DuplexIClassB = 1158
12997 CEFBS_None, // DuplexIClassC = 1159
12998 CEFBS_None, // DuplexIClassD = 1160
12999 CEFBS_None, // DuplexIClassE = 1161
13000 CEFBS_None, // DuplexIClassF = 1162
13001 CEFBS_None, // EH_RETURN_JMPR = 1163
13002 CEFBS_None, // F2_conv_d2df = 1164
13003 CEFBS_None, // F2_conv_d2sf = 1165
13004 CEFBS_None, // F2_conv_df2d = 1166
13005 CEFBS_None, // F2_conv_df2d_chop = 1167
13006 CEFBS_None, // F2_conv_df2sf = 1168
13007 CEFBS_None, // F2_conv_df2ud = 1169
13008 CEFBS_None, // F2_conv_df2ud_chop = 1170
13009 CEFBS_None, // F2_conv_df2uw = 1171
13010 CEFBS_None, // F2_conv_df2uw_chop = 1172
13011 CEFBS_None, // F2_conv_df2w = 1173
13012 CEFBS_None, // F2_conv_df2w_chop = 1174
13013 CEFBS_None, // F2_conv_sf2d = 1175
13014 CEFBS_None, // F2_conv_sf2d_chop = 1176
13015 CEFBS_None, // F2_conv_sf2df = 1177
13016 CEFBS_None, // F2_conv_sf2ud = 1178
13017 CEFBS_None, // F2_conv_sf2ud_chop = 1179
13018 CEFBS_None, // F2_conv_sf2uw = 1180
13019 CEFBS_None, // F2_conv_sf2uw_chop = 1181
13020 CEFBS_None, // F2_conv_sf2w = 1182
13021 CEFBS_None, // F2_conv_sf2w_chop = 1183
13022 CEFBS_None, // F2_conv_ud2df = 1184
13023 CEFBS_None, // F2_conv_ud2sf = 1185
13024 CEFBS_None, // F2_conv_uw2df = 1186
13025 CEFBS_None, // F2_conv_uw2sf = 1187
13026 CEFBS_None, // F2_conv_w2df = 1188
13027 CEFBS_None, // F2_conv_w2sf = 1189
13028 CEFBS_HasV66, // F2_dfadd = 1190
13029 CEFBS_None, // F2_dfclass = 1191
13030 CEFBS_None, // F2_dfcmpeq = 1192
13031 CEFBS_None, // F2_dfcmpge = 1193
13032 CEFBS_None, // F2_dfcmpgt = 1194
13033 CEFBS_None, // F2_dfcmpuo = 1195
13034 CEFBS_None, // F2_dfimm_n = 1196
13035 CEFBS_None, // F2_dfimm_p = 1197
13036 CEFBS_HasV67, // F2_dfmax = 1198
13037 CEFBS_HasV67, // F2_dfmin = 1199
13038 CEFBS_HasV67, // F2_dfmpyfix = 1200
13039 CEFBS_HasV67, // F2_dfmpyhh = 1201
13040 CEFBS_HasV67, // F2_dfmpylh = 1202
13041 CEFBS_HasV67, // F2_dfmpyll = 1203
13042 CEFBS_HasV66, // F2_dfsub = 1204
13043 CEFBS_None, // F2_sfadd = 1205
13044 CEFBS_None, // F2_sfclass = 1206
13045 CEFBS_None, // F2_sfcmpeq = 1207
13046 CEFBS_None, // F2_sfcmpge = 1208
13047 CEFBS_None, // F2_sfcmpgt = 1209
13048 CEFBS_None, // F2_sfcmpuo = 1210
13049 CEFBS_None, // F2_sffixupd = 1211
13050 CEFBS_None, // F2_sffixupn = 1212
13051 CEFBS_None, // F2_sffixupr = 1213
13052 CEFBS_None, // F2_sffma = 1214
13053 CEFBS_None, // F2_sffma_lib = 1215
13054 CEFBS_None, // F2_sffma_sc = 1216
13055 CEFBS_None, // F2_sffms = 1217
13056 CEFBS_None, // F2_sffms_lib = 1218
13057 CEFBS_None, // F2_sfimm_n = 1219
13058 CEFBS_None, // F2_sfimm_p = 1220
13059 CEFBS_None, // F2_sfinvsqrta = 1221
13060 CEFBS_None, // F2_sfmax = 1222
13061 CEFBS_None, // F2_sfmin = 1223
13062 CEFBS_None, // F2_sfmpy = 1224
13063 CEFBS_None, // F2_sfrecipa = 1225
13064 CEFBS_None, // F2_sfsub = 1226
13065 CEFBS_None, // G4_tfrgcpp = 1227
13066 CEFBS_None, // G4_tfrgcrr = 1228
13067 CEFBS_None, // G4_tfrgpcp = 1229
13068 CEFBS_None, // G4_tfrgrcr = 1230
13069 CEFBS_None, // HI = 1231
13070 CEFBS_None, // J2_call = 1232
13071 CEFBS_None, // J2_callf = 1233
13072 CEFBS_None, // J2_callr = 1234
13073 CEFBS_None, // J2_callrf = 1235
13074 CEFBS_None, // J2_callrt = 1236
13075 CEFBS_None, // J2_callt = 1237
13076 CEFBS_None, // J2_jump = 1238
13077 CEFBS_None, // J2_jumpf = 1239
13078 CEFBS_None, // J2_jumpfnew = 1240
13079 CEFBS_None, // J2_jumpfnewpt = 1241
13080 CEFBS_HasV60, // J2_jumpfpt = 1242
13081 CEFBS_None, // J2_jumpr = 1243
13082 CEFBS_None, // J2_jumprf = 1244
13083 CEFBS_None, // J2_jumprfnew = 1245
13084 CEFBS_None, // J2_jumprfnewpt = 1246
13085 CEFBS_HasV60, // J2_jumprfpt = 1247
13086 CEFBS_None, // J2_jumprgtez = 1248
13087 CEFBS_None, // J2_jumprgtezpt = 1249
13088 CEFBS_None, // J2_jumprltez = 1250
13089 CEFBS_None, // J2_jumprltezpt = 1251
13090 CEFBS_None, // J2_jumprnz = 1252
13091 CEFBS_None, // J2_jumprnzpt = 1253
13092 CEFBS_None, // J2_jumprt = 1254
13093 CEFBS_None, // J2_jumprtnew = 1255
13094 CEFBS_None, // J2_jumprtnewpt = 1256
13095 CEFBS_HasV60, // J2_jumprtpt = 1257
13096 CEFBS_None, // J2_jumprz = 1258
13097 CEFBS_None, // J2_jumprzpt = 1259
13098 CEFBS_None, // J2_jumpt = 1260
13099 CEFBS_None, // J2_jumptnew = 1261
13100 CEFBS_None, // J2_jumptnewpt = 1262
13101 CEFBS_HasV60, // J2_jumptpt = 1263
13102 CEFBS_None, // J2_loop0i = 1264
13103 CEFBS_None, // J2_loop0iext = 1265
13104 CEFBS_None, // J2_loop0r = 1266
13105 CEFBS_None, // J2_loop0rext = 1267
13106 CEFBS_None, // J2_loop1i = 1268
13107 CEFBS_None, // J2_loop1iext = 1269
13108 CEFBS_None, // J2_loop1r = 1270
13109 CEFBS_None, // J2_loop1rext = 1271
13110 CEFBS_None, // J2_pause = 1272
13111 CEFBS_None, // J2_ploop1si = 1273
13112 CEFBS_None, // J2_ploop1sr = 1274
13113 CEFBS_None, // J2_ploop2si = 1275
13114 CEFBS_None, // J2_ploop2sr = 1276
13115 CEFBS_None, // J2_ploop3si = 1277
13116 CEFBS_None, // J2_ploop3sr = 1278
13117 CEFBS_None, // J2_trap0 = 1279
13118 CEFBS_HasV65, // J2_trap1 = 1280
13119 CEFBS_None, // J4_cmpeq_f_jumpnv_nt = 1281
13120 CEFBS_None, // J4_cmpeq_f_jumpnv_t = 1282
13121 CEFBS_None, // J4_cmpeq_fp0_jump_nt = 1283
13122 CEFBS_None, // J4_cmpeq_fp0_jump_t = 1284
13123 CEFBS_None, // J4_cmpeq_fp1_jump_nt = 1285
13124 CEFBS_None, // J4_cmpeq_fp1_jump_t = 1286
13125 CEFBS_None, // J4_cmpeq_t_jumpnv_nt = 1287
13126 CEFBS_None, // J4_cmpeq_t_jumpnv_t = 1288
13127 CEFBS_None, // J4_cmpeq_tp0_jump_nt = 1289
13128 CEFBS_None, // J4_cmpeq_tp0_jump_t = 1290
13129 CEFBS_None, // J4_cmpeq_tp1_jump_nt = 1291
13130 CEFBS_None, // J4_cmpeq_tp1_jump_t = 1292
13131 CEFBS_None, // J4_cmpeqi_f_jumpnv_nt = 1293
13132 CEFBS_None, // J4_cmpeqi_f_jumpnv_t = 1294
13133 CEFBS_None, // J4_cmpeqi_fp0_jump_nt = 1295
13134 CEFBS_None, // J4_cmpeqi_fp0_jump_t = 1296
13135 CEFBS_None, // J4_cmpeqi_fp1_jump_nt = 1297
13136 CEFBS_None, // J4_cmpeqi_fp1_jump_t = 1298
13137 CEFBS_None, // J4_cmpeqi_t_jumpnv_nt = 1299
13138 CEFBS_None, // J4_cmpeqi_t_jumpnv_t = 1300
13139 CEFBS_None, // J4_cmpeqi_tp0_jump_nt = 1301
13140 CEFBS_None, // J4_cmpeqi_tp0_jump_t = 1302
13141 CEFBS_None, // J4_cmpeqi_tp1_jump_nt = 1303
13142 CEFBS_None, // J4_cmpeqi_tp1_jump_t = 1304
13143 CEFBS_None, // J4_cmpeqn1_f_jumpnv_nt = 1305
13144 CEFBS_None, // J4_cmpeqn1_f_jumpnv_t = 1306
13145 CEFBS_None, // J4_cmpeqn1_fp0_jump_nt = 1307
13146 CEFBS_None, // J4_cmpeqn1_fp0_jump_t = 1308
13147 CEFBS_None, // J4_cmpeqn1_fp1_jump_nt = 1309
13148 CEFBS_None, // J4_cmpeqn1_fp1_jump_t = 1310
13149 CEFBS_None, // J4_cmpeqn1_t_jumpnv_nt = 1311
13150 CEFBS_None, // J4_cmpeqn1_t_jumpnv_t = 1312
13151 CEFBS_None, // J4_cmpeqn1_tp0_jump_nt = 1313
13152 CEFBS_None, // J4_cmpeqn1_tp0_jump_t = 1314
13153 CEFBS_None, // J4_cmpeqn1_tp1_jump_nt = 1315
13154 CEFBS_None, // J4_cmpeqn1_tp1_jump_t = 1316
13155 CEFBS_None, // J4_cmpgt_f_jumpnv_nt = 1317
13156 CEFBS_None, // J4_cmpgt_f_jumpnv_t = 1318
13157 CEFBS_None, // J4_cmpgt_fp0_jump_nt = 1319
13158 CEFBS_None, // J4_cmpgt_fp0_jump_t = 1320
13159 CEFBS_None, // J4_cmpgt_fp1_jump_nt = 1321
13160 CEFBS_None, // J4_cmpgt_fp1_jump_t = 1322
13161 CEFBS_None, // J4_cmpgt_t_jumpnv_nt = 1323
13162 CEFBS_None, // J4_cmpgt_t_jumpnv_t = 1324
13163 CEFBS_None, // J4_cmpgt_tp0_jump_nt = 1325
13164 CEFBS_None, // J4_cmpgt_tp0_jump_t = 1326
13165 CEFBS_None, // J4_cmpgt_tp1_jump_nt = 1327
13166 CEFBS_None, // J4_cmpgt_tp1_jump_t = 1328
13167 CEFBS_None, // J4_cmpgti_f_jumpnv_nt = 1329
13168 CEFBS_None, // J4_cmpgti_f_jumpnv_t = 1330
13169 CEFBS_None, // J4_cmpgti_fp0_jump_nt = 1331
13170 CEFBS_None, // J4_cmpgti_fp0_jump_t = 1332
13171 CEFBS_None, // J4_cmpgti_fp1_jump_nt = 1333
13172 CEFBS_None, // J4_cmpgti_fp1_jump_t = 1334
13173 CEFBS_None, // J4_cmpgti_t_jumpnv_nt = 1335
13174 CEFBS_None, // J4_cmpgti_t_jumpnv_t = 1336
13175 CEFBS_None, // J4_cmpgti_tp0_jump_nt = 1337
13176 CEFBS_None, // J4_cmpgti_tp0_jump_t = 1338
13177 CEFBS_None, // J4_cmpgti_tp1_jump_nt = 1339
13178 CEFBS_None, // J4_cmpgti_tp1_jump_t = 1340
13179 CEFBS_None, // J4_cmpgtn1_f_jumpnv_nt = 1341
13180 CEFBS_None, // J4_cmpgtn1_f_jumpnv_t = 1342
13181 CEFBS_None, // J4_cmpgtn1_fp0_jump_nt = 1343
13182 CEFBS_None, // J4_cmpgtn1_fp0_jump_t = 1344
13183 CEFBS_None, // J4_cmpgtn1_fp1_jump_nt = 1345
13184 CEFBS_None, // J4_cmpgtn1_fp1_jump_t = 1346
13185 CEFBS_None, // J4_cmpgtn1_t_jumpnv_nt = 1347
13186 CEFBS_None, // J4_cmpgtn1_t_jumpnv_t = 1348
13187 CEFBS_None, // J4_cmpgtn1_tp0_jump_nt = 1349
13188 CEFBS_None, // J4_cmpgtn1_tp0_jump_t = 1350
13189 CEFBS_None, // J4_cmpgtn1_tp1_jump_nt = 1351
13190 CEFBS_None, // J4_cmpgtn1_tp1_jump_t = 1352
13191 CEFBS_None, // J4_cmpgtu_f_jumpnv_nt = 1353
13192 CEFBS_None, // J4_cmpgtu_f_jumpnv_t = 1354
13193 CEFBS_None, // J4_cmpgtu_fp0_jump_nt = 1355
13194 CEFBS_None, // J4_cmpgtu_fp0_jump_t = 1356
13195 CEFBS_None, // J4_cmpgtu_fp1_jump_nt = 1357
13196 CEFBS_None, // J4_cmpgtu_fp1_jump_t = 1358
13197 CEFBS_None, // J4_cmpgtu_t_jumpnv_nt = 1359
13198 CEFBS_None, // J4_cmpgtu_t_jumpnv_t = 1360
13199 CEFBS_None, // J4_cmpgtu_tp0_jump_nt = 1361
13200 CEFBS_None, // J4_cmpgtu_tp0_jump_t = 1362
13201 CEFBS_None, // J4_cmpgtu_tp1_jump_nt = 1363
13202 CEFBS_None, // J4_cmpgtu_tp1_jump_t = 1364
13203 CEFBS_None, // J4_cmpgtui_f_jumpnv_nt = 1365
13204 CEFBS_None, // J4_cmpgtui_f_jumpnv_t = 1366
13205 CEFBS_None, // J4_cmpgtui_fp0_jump_nt = 1367
13206 CEFBS_None, // J4_cmpgtui_fp0_jump_t = 1368
13207 CEFBS_None, // J4_cmpgtui_fp1_jump_nt = 1369
13208 CEFBS_None, // J4_cmpgtui_fp1_jump_t = 1370
13209 CEFBS_None, // J4_cmpgtui_t_jumpnv_nt = 1371
13210 CEFBS_None, // J4_cmpgtui_t_jumpnv_t = 1372
13211 CEFBS_None, // J4_cmpgtui_tp0_jump_nt = 1373
13212 CEFBS_None, // J4_cmpgtui_tp0_jump_t = 1374
13213 CEFBS_None, // J4_cmpgtui_tp1_jump_nt = 1375
13214 CEFBS_None, // J4_cmpgtui_tp1_jump_t = 1376
13215 CEFBS_None, // J4_cmplt_f_jumpnv_nt = 1377
13216 CEFBS_None, // J4_cmplt_f_jumpnv_t = 1378
13217 CEFBS_None, // J4_cmplt_t_jumpnv_nt = 1379
13218 CEFBS_None, // J4_cmplt_t_jumpnv_t = 1380
13219 CEFBS_None, // J4_cmpltu_f_jumpnv_nt = 1381
13220 CEFBS_None, // J4_cmpltu_f_jumpnv_t = 1382
13221 CEFBS_None, // J4_cmpltu_t_jumpnv_nt = 1383
13222 CEFBS_None, // J4_cmpltu_t_jumpnv_t = 1384
13223 CEFBS_None, // J4_hintjumpr = 1385
13224 CEFBS_None, // J4_jumpseti = 1386
13225 CEFBS_None, // J4_jumpsetr = 1387
13226 CEFBS_None, // J4_tstbit0_f_jumpnv_nt = 1388
13227 CEFBS_None, // J4_tstbit0_f_jumpnv_t = 1389
13228 CEFBS_None, // J4_tstbit0_fp0_jump_nt = 1390
13229 CEFBS_None, // J4_tstbit0_fp0_jump_t = 1391
13230 CEFBS_None, // J4_tstbit0_fp1_jump_nt = 1392
13231 CEFBS_None, // J4_tstbit0_fp1_jump_t = 1393
13232 CEFBS_None, // J4_tstbit0_t_jumpnv_nt = 1394
13233 CEFBS_None, // J4_tstbit0_t_jumpnv_t = 1395
13234 CEFBS_None, // J4_tstbit0_tp0_jump_nt = 1396
13235 CEFBS_None, // J4_tstbit0_tp0_jump_t = 1397
13236 CEFBS_None, // J4_tstbit0_tp1_jump_nt = 1398
13237 CEFBS_None, // J4_tstbit0_tp1_jump_t = 1399
13238 CEFBS_None, // L2_deallocframe = 1400
13239 CEFBS_None, // L2_loadalignb_io = 1401
13240 CEFBS_None, // L2_loadalignb_pbr = 1402
13241 CEFBS_None, // L2_loadalignb_pci = 1403
13242 CEFBS_None, // L2_loadalignb_pcr = 1404
13243 CEFBS_None, // L2_loadalignb_pi = 1405
13244 CEFBS_None, // L2_loadalignb_pr = 1406
13245 CEFBS_None, // L2_loadalignh_io = 1407
13246 CEFBS_None, // L2_loadalignh_pbr = 1408
13247 CEFBS_None, // L2_loadalignh_pci = 1409
13248 CEFBS_None, // L2_loadalignh_pcr = 1410
13249 CEFBS_None, // L2_loadalignh_pi = 1411
13250 CEFBS_None, // L2_loadalignh_pr = 1412
13251 CEFBS_None, // L2_loadbsw2_io = 1413
13252 CEFBS_None, // L2_loadbsw2_pbr = 1414
13253 CEFBS_None, // L2_loadbsw2_pci = 1415
13254 CEFBS_None, // L2_loadbsw2_pcr = 1416
13255 CEFBS_None, // L2_loadbsw2_pi = 1417
13256 CEFBS_None, // L2_loadbsw2_pr = 1418
13257 CEFBS_None, // L2_loadbsw4_io = 1419
13258 CEFBS_None, // L2_loadbsw4_pbr = 1420
13259 CEFBS_None, // L2_loadbsw4_pci = 1421
13260 CEFBS_None, // L2_loadbsw4_pcr = 1422
13261 CEFBS_None, // L2_loadbsw4_pi = 1423
13262 CEFBS_None, // L2_loadbsw4_pr = 1424
13263 CEFBS_None, // L2_loadbzw2_io = 1425
13264 CEFBS_None, // L2_loadbzw2_pbr = 1426
13265 CEFBS_None, // L2_loadbzw2_pci = 1427
13266 CEFBS_None, // L2_loadbzw2_pcr = 1428
13267 CEFBS_None, // L2_loadbzw2_pi = 1429
13268 CEFBS_None, // L2_loadbzw2_pr = 1430
13269 CEFBS_None, // L2_loadbzw4_io = 1431
13270 CEFBS_None, // L2_loadbzw4_pbr = 1432
13271 CEFBS_None, // L2_loadbzw4_pci = 1433
13272 CEFBS_None, // L2_loadbzw4_pcr = 1434
13273 CEFBS_None, // L2_loadbzw4_pi = 1435
13274 CEFBS_None, // L2_loadbzw4_pr = 1436
13275 CEFBS_None, // L2_loadrb_io = 1437
13276 CEFBS_None, // L2_loadrb_pbr = 1438
13277 CEFBS_None, // L2_loadrb_pci = 1439
13278 CEFBS_None, // L2_loadrb_pcr = 1440
13279 CEFBS_None, // L2_loadrb_pi = 1441
13280 CEFBS_None, // L2_loadrb_pr = 1442
13281 CEFBS_None, // L2_loadrbgp = 1443
13282 CEFBS_None, // L2_loadrd_io = 1444
13283 CEFBS_None, // L2_loadrd_pbr = 1445
13284 CEFBS_None, // L2_loadrd_pci = 1446
13285 CEFBS_None, // L2_loadrd_pcr = 1447
13286 CEFBS_None, // L2_loadrd_pi = 1448
13287 CEFBS_None, // L2_loadrd_pr = 1449
13288 CEFBS_None, // L2_loadrdgp = 1450
13289 CEFBS_None, // L2_loadrh_io = 1451
13290 CEFBS_None, // L2_loadrh_pbr = 1452
13291 CEFBS_None, // L2_loadrh_pci = 1453
13292 CEFBS_None, // L2_loadrh_pcr = 1454
13293 CEFBS_None, // L2_loadrh_pi = 1455
13294 CEFBS_None, // L2_loadrh_pr = 1456
13295 CEFBS_None, // L2_loadrhgp = 1457
13296 CEFBS_None, // L2_loadri_io = 1458
13297 CEFBS_None, // L2_loadri_pbr = 1459
13298 CEFBS_None, // L2_loadri_pci = 1460
13299 CEFBS_None, // L2_loadri_pcr = 1461
13300 CEFBS_None, // L2_loadri_pi = 1462
13301 CEFBS_None, // L2_loadri_pr = 1463
13302 CEFBS_None, // L2_loadrigp = 1464
13303 CEFBS_None, // L2_loadrub_io = 1465
13304 CEFBS_None, // L2_loadrub_pbr = 1466
13305 CEFBS_None, // L2_loadrub_pci = 1467
13306 CEFBS_None, // L2_loadrub_pcr = 1468
13307 CEFBS_None, // L2_loadrub_pi = 1469
13308 CEFBS_None, // L2_loadrub_pr = 1470
13309 CEFBS_None, // L2_loadrubgp = 1471
13310 CEFBS_None, // L2_loadruh_io = 1472
13311 CEFBS_None, // L2_loadruh_pbr = 1473
13312 CEFBS_None, // L2_loadruh_pci = 1474
13313 CEFBS_None, // L2_loadruh_pcr = 1475
13314 CEFBS_None, // L2_loadruh_pi = 1476
13315 CEFBS_None, // L2_loadruh_pr = 1477
13316 CEFBS_None, // L2_loadruhgp = 1478
13317 CEFBS_None, // L2_loadw_locked = 1479
13318 CEFBS_None, // L2_ploadrbf_io = 1480
13319 CEFBS_None, // L2_ploadrbf_pi = 1481
13320 CEFBS_None, // L2_ploadrbfnew_io = 1482
13321 CEFBS_None, // L2_ploadrbfnew_pi = 1483
13322 CEFBS_None, // L2_ploadrbt_io = 1484
13323 CEFBS_None, // L2_ploadrbt_pi = 1485
13324 CEFBS_None, // L2_ploadrbtnew_io = 1486
13325 CEFBS_None, // L2_ploadrbtnew_pi = 1487
13326 CEFBS_None, // L2_ploadrdf_io = 1488
13327 CEFBS_None, // L2_ploadrdf_pi = 1489
13328 CEFBS_None, // L2_ploadrdfnew_io = 1490
13329 CEFBS_None, // L2_ploadrdfnew_pi = 1491
13330 CEFBS_None, // L2_ploadrdt_io = 1492
13331 CEFBS_None, // L2_ploadrdt_pi = 1493
13332 CEFBS_None, // L2_ploadrdtnew_io = 1494
13333 CEFBS_None, // L2_ploadrdtnew_pi = 1495
13334 CEFBS_None, // L2_ploadrhf_io = 1496
13335 CEFBS_None, // L2_ploadrhf_pi = 1497
13336 CEFBS_None, // L2_ploadrhfnew_io = 1498
13337 CEFBS_None, // L2_ploadrhfnew_pi = 1499
13338 CEFBS_None, // L2_ploadrht_io = 1500
13339 CEFBS_None, // L2_ploadrht_pi = 1501
13340 CEFBS_None, // L2_ploadrhtnew_io = 1502
13341 CEFBS_None, // L2_ploadrhtnew_pi = 1503
13342 CEFBS_None, // L2_ploadrif_io = 1504
13343 CEFBS_None, // L2_ploadrif_pi = 1505
13344 CEFBS_None, // L2_ploadrifnew_io = 1506
13345 CEFBS_None, // L2_ploadrifnew_pi = 1507
13346 CEFBS_None, // L2_ploadrit_io = 1508
13347 CEFBS_None, // L2_ploadrit_pi = 1509
13348 CEFBS_None, // L2_ploadritnew_io = 1510
13349 CEFBS_None, // L2_ploadritnew_pi = 1511
13350 CEFBS_None, // L2_ploadrubf_io = 1512
13351 CEFBS_None, // L2_ploadrubf_pi = 1513
13352 CEFBS_None, // L2_ploadrubfnew_io = 1514
13353 CEFBS_None, // L2_ploadrubfnew_pi = 1515
13354 CEFBS_None, // L2_ploadrubt_io = 1516
13355 CEFBS_None, // L2_ploadrubt_pi = 1517
13356 CEFBS_None, // L2_ploadrubtnew_io = 1518
13357 CEFBS_None, // L2_ploadrubtnew_pi = 1519
13358 CEFBS_None, // L2_ploadruhf_io = 1520
13359 CEFBS_None, // L2_ploadruhf_pi = 1521
13360 CEFBS_None, // L2_ploadruhfnew_io = 1522
13361 CEFBS_None, // L2_ploadruhfnew_pi = 1523
13362 CEFBS_None, // L2_ploadruht_io = 1524
13363 CEFBS_None, // L2_ploadruht_pi = 1525
13364 CEFBS_None, // L2_ploadruhtnew_io = 1526
13365 CEFBS_None, // L2_ploadruhtnew_pi = 1527
13366 CEFBS_None, // L4_add_memopb_io = 1528
13367 CEFBS_None, // L4_add_memoph_io = 1529
13368 CEFBS_None, // L4_add_memopw_io = 1530
13369 CEFBS_None, // L4_and_memopb_io = 1531
13370 CEFBS_None, // L4_and_memoph_io = 1532
13371 CEFBS_None, // L4_and_memopw_io = 1533
13372 CEFBS_None, // L4_iadd_memopb_io = 1534
13373 CEFBS_None, // L4_iadd_memoph_io = 1535
13374 CEFBS_None, // L4_iadd_memopw_io = 1536
13375 CEFBS_None, // L4_iand_memopb_io = 1537
13376 CEFBS_None, // L4_iand_memoph_io = 1538
13377 CEFBS_None, // L4_iand_memopw_io = 1539
13378 CEFBS_None, // L4_ior_memopb_io = 1540
13379 CEFBS_None, // L4_ior_memoph_io = 1541
13380 CEFBS_None, // L4_ior_memopw_io = 1542
13381 CEFBS_None, // L4_isub_memopb_io = 1543
13382 CEFBS_None, // L4_isub_memoph_io = 1544
13383 CEFBS_None, // L4_isub_memopw_io = 1545
13384 CEFBS_None, // L4_loadalignb_ap = 1546
13385 CEFBS_None, // L4_loadalignb_ur = 1547
13386 CEFBS_None, // L4_loadalignh_ap = 1548
13387 CEFBS_None, // L4_loadalignh_ur = 1549
13388 CEFBS_None, // L4_loadbsw2_ap = 1550
13389 CEFBS_None, // L4_loadbsw2_ur = 1551
13390 CEFBS_None, // L4_loadbsw4_ap = 1552
13391 CEFBS_None, // L4_loadbsw4_ur = 1553
13392 CEFBS_None, // L4_loadbzw2_ap = 1554
13393 CEFBS_None, // L4_loadbzw2_ur = 1555
13394 CEFBS_None, // L4_loadbzw4_ap = 1556
13395 CEFBS_None, // L4_loadbzw4_ur = 1557
13396 CEFBS_None, // L4_loadd_locked = 1558
13397 CEFBS_None, // L4_loadrb_ap = 1559
13398 CEFBS_None, // L4_loadrb_rr = 1560
13399 CEFBS_None, // L4_loadrb_ur = 1561
13400 CEFBS_None, // L4_loadrd_ap = 1562
13401 CEFBS_None, // L4_loadrd_rr = 1563
13402 CEFBS_None, // L4_loadrd_ur = 1564
13403 CEFBS_None, // L4_loadrh_ap = 1565
13404 CEFBS_None, // L4_loadrh_rr = 1566
13405 CEFBS_None, // L4_loadrh_ur = 1567
13406 CEFBS_None, // L4_loadri_ap = 1568
13407 CEFBS_None, // L4_loadri_rr = 1569
13408 CEFBS_None, // L4_loadri_ur = 1570
13409 CEFBS_None, // L4_loadrub_ap = 1571
13410 CEFBS_None, // L4_loadrub_rr = 1572
13411 CEFBS_None, // L4_loadrub_ur = 1573
13412 CEFBS_None, // L4_loadruh_ap = 1574
13413 CEFBS_None, // L4_loadruh_rr = 1575
13414 CEFBS_None, // L4_loadruh_ur = 1576
13415 CEFBS_None, // L4_or_memopb_io = 1577
13416 CEFBS_None, // L4_or_memoph_io = 1578
13417 CEFBS_None, // L4_or_memopw_io = 1579
13418 CEFBS_None, // L4_ploadrbf_abs = 1580
13419 CEFBS_None, // L4_ploadrbf_rr = 1581
13420 CEFBS_None, // L4_ploadrbfnew_abs = 1582
13421 CEFBS_None, // L4_ploadrbfnew_rr = 1583
13422 CEFBS_None, // L4_ploadrbt_abs = 1584
13423 CEFBS_None, // L4_ploadrbt_rr = 1585
13424 CEFBS_None, // L4_ploadrbtnew_abs = 1586
13425 CEFBS_None, // L4_ploadrbtnew_rr = 1587
13426 CEFBS_None, // L4_ploadrdf_abs = 1588
13427 CEFBS_None, // L4_ploadrdf_rr = 1589
13428 CEFBS_None, // L4_ploadrdfnew_abs = 1590
13429 CEFBS_None, // L4_ploadrdfnew_rr = 1591
13430 CEFBS_None, // L4_ploadrdt_abs = 1592
13431 CEFBS_None, // L4_ploadrdt_rr = 1593
13432 CEFBS_None, // L4_ploadrdtnew_abs = 1594
13433 CEFBS_None, // L4_ploadrdtnew_rr = 1595
13434 CEFBS_None, // L4_ploadrhf_abs = 1596
13435 CEFBS_None, // L4_ploadrhf_rr = 1597
13436 CEFBS_None, // L4_ploadrhfnew_abs = 1598
13437 CEFBS_None, // L4_ploadrhfnew_rr = 1599
13438 CEFBS_None, // L4_ploadrht_abs = 1600
13439 CEFBS_None, // L4_ploadrht_rr = 1601
13440 CEFBS_None, // L4_ploadrhtnew_abs = 1602
13441 CEFBS_None, // L4_ploadrhtnew_rr = 1603
13442 CEFBS_None, // L4_ploadrif_abs = 1604
13443 CEFBS_None, // L4_ploadrif_rr = 1605
13444 CEFBS_None, // L4_ploadrifnew_abs = 1606
13445 CEFBS_None, // L4_ploadrifnew_rr = 1607
13446 CEFBS_None, // L4_ploadrit_abs = 1608
13447 CEFBS_None, // L4_ploadrit_rr = 1609
13448 CEFBS_None, // L4_ploadritnew_abs = 1610
13449 CEFBS_None, // L4_ploadritnew_rr = 1611
13450 CEFBS_None, // L4_ploadrubf_abs = 1612
13451 CEFBS_None, // L4_ploadrubf_rr = 1613
13452 CEFBS_None, // L4_ploadrubfnew_abs = 1614
13453 CEFBS_None, // L4_ploadrubfnew_rr = 1615
13454 CEFBS_None, // L4_ploadrubt_abs = 1616
13455 CEFBS_None, // L4_ploadrubt_rr = 1617
13456 CEFBS_None, // L4_ploadrubtnew_abs = 1618
13457 CEFBS_None, // L4_ploadrubtnew_rr = 1619
13458 CEFBS_None, // L4_ploadruhf_abs = 1620
13459 CEFBS_None, // L4_ploadruhf_rr = 1621
13460 CEFBS_None, // L4_ploadruhfnew_abs = 1622
13461 CEFBS_None, // L4_ploadruhfnew_rr = 1623
13462 CEFBS_None, // L4_ploadruht_abs = 1624
13463 CEFBS_None, // L4_ploadruht_rr = 1625
13464 CEFBS_None, // L4_ploadruhtnew_abs = 1626
13465 CEFBS_None, // L4_ploadruhtnew_rr = 1627
13466 CEFBS_None, // L4_return = 1628
13467 CEFBS_None, // L4_return_f = 1629
13468 CEFBS_None, // L4_return_fnew_pnt = 1630
13469 CEFBS_None, // L4_return_fnew_pt = 1631
13470 CEFBS_None, // L4_return_t = 1632
13471 CEFBS_None, // L4_return_tnew_pnt = 1633
13472 CEFBS_None, // L4_return_tnew_pt = 1634
13473 CEFBS_None, // L4_sub_memopb_io = 1635
13474 CEFBS_None, // L4_sub_memoph_io = 1636
13475 CEFBS_None, // L4_sub_memopw_io = 1637
13476 CEFBS_HasV66, // L6_memcpy = 1638
13477 CEFBS_None, // LO = 1639
13478 CEFBS_None, // M2_acci = 1640
13479 CEFBS_None, // M2_accii = 1641
13480 CEFBS_None, // M2_cmaci_s0 = 1642
13481 CEFBS_None, // M2_cmacr_s0 = 1643
13482 CEFBS_None, // M2_cmacs_s0 = 1644
13483 CEFBS_None, // M2_cmacs_s1 = 1645
13484 CEFBS_None, // M2_cmacsc_s0 = 1646
13485 CEFBS_None, // M2_cmacsc_s1 = 1647
13486 CEFBS_None, // M2_cmpyi_s0 = 1648
13487 CEFBS_None, // M2_cmpyr_s0 = 1649
13488 CEFBS_None, // M2_cmpyrs_s0 = 1650
13489 CEFBS_None, // M2_cmpyrs_s1 = 1651
13490 CEFBS_None, // M2_cmpyrsc_s0 = 1652
13491 CEFBS_None, // M2_cmpyrsc_s1 = 1653
13492 CEFBS_None, // M2_cmpys_s0 = 1654
13493 CEFBS_None, // M2_cmpys_s1 = 1655
13494 CEFBS_None, // M2_cmpysc_s0 = 1656
13495 CEFBS_None, // M2_cmpysc_s1 = 1657
13496 CEFBS_None, // M2_cnacs_s0 = 1658
13497 CEFBS_None, // M2_cnacs_s1 = 1659
13498 CEFBS_None, // M2_cnacsc_s0 = 1660
13499 CEFBS_None, // M2_cnacsc_s1 = 1661
13500 CEFBS_None, // M2_dpmpyss_acc_s0 = 1662
13501 CEFBS_None, // M2_dpmpyss_nac_s0 = 1663
13502 CEFBS_None, // M2_dpmpyss_rnd_s0 = 1664
13503 CEFBS_None, // M2_dpmpyss_s0 = 1665
13504 CEFBS_None, // M2_dpmpyuu_acc_s0 = 1666
13505 CEFBS_None, // M2_dpmpyuu_nac_s0 = 1667
13506 CEFBS_None, // M2_dpmpyuu_s0 = 1668
13507 CEFBS_None, // M2_hmmpyh_rs1 = 1669
13508 CEFBS_None, // M2_hmmpyh_s1 = 1670
13509 CEFBS_None, // M2_hmmpyl_rs1 = 1671
13510 CEFBS_None, // M2_hmmpyl_s1 = 1672
13511 CEFBS_None, // M2_maci = 1673
13512 CEFBS_None, // M2_macsin = 1674
13513 CEFBS_None, // M2_macsip = 1675
13514 CEFBS_None, // M2_mmachs_rs0 = 1676
13515 CEFBS_None, // M2_mmachs_rs1 = 1677
13516 CEFBS_None, // M2_mmachs_s0 = 1678
13517 CEFBS_None, // M2_mmachs_s1 = 1679
13518 CEFBS_None, // M2_mmacls_rs0 = 1680
13519 CEFBS_None, // M2_mmacls_rs1 = 1681
13520 CEFBS_None, // M2_mmacls_s0 = 1682
13521 CEFBS_None, // M2_mmacls_s1 = 1683
13522 CEFBS_None, // M2_mmacuhs_rs0 = 1684
13523 CEFBS_None, // M2_mmacuhs_rs1 = 1685
13524 CEFBS_None, // M2_mmacuhs_s0 = 1686
13525 CEFBS_None, // M2_mmacuhs_s1 = 1687
13526 CEFBS_None, // M2_mmaculs_rs0 = 1688
13527 CEFBS_None, // M2_mmaculs_rs1 = 1689
13528 CEFBS_None, // M2_mmaculs_s0 = 1690
13529 CEFBS_None, // M2_mmaculs_s1 = 1691
13530 CEFBS_None, // M2_mmpyh_rs0 = 1692
13531 CEFBS_None, // M2_mmpyh_rs1 = 1693
13532 CEFBS_None, // M2_mmpyh_s0 = 1694
13533 CEFBS_None, // M2_mmpyh_s1 = 1695
13534 CEFBS_None, // M2_mmpyl_rs0 = 1696
13535 CEFBS_None, // M2_mmpyl_rs1 = 1697
13536 CEFBS_None, // M2_mmpyl_s0 = 1698
13537 CEFBS_None, // M2_mmpyl_s1 = 1699
13538 CEFBS_None, // M2_mmpyuh_rs0 = 1700
13539 CEFBS_None, // M2_mmpyuh_rs1 = 1701
13540 CEFBS_None, // M2_mmpyuh_s0 = 1702
13541 CEFBS_None, // M2_mmpyuh_s1 = 1703
13542 CEFBS_None, // M2_mmpyul_rs0 = 1704
13543 CEFBS_None, // M2_mmpyul_rs1 = 1705
13544 CEFBS_None, // M2_mmpyul_s0 = 1706
13545 CEFBS_None, // M2_mmpyul_s1 = 1707
13546 CEFBS_HasV66, // M2_mnaci = 1708
13547 CEFBS_None, // M2_mpy_acc_hh_s0 = 1709
13548 CEFBS_None, // M2_mpy_acc_hh_s1 = 1710
13549 CEFBS_None, // M2_mpy_acc_hl_s0 = 1711
13550 CEFBS_None, // M2_mpy_acc_hl_s1 = 1712
13551 CEFBS_None, // M2_mpy_acc_lh_s0 = 1713
13552 CEFBS_None, // M2_mpy_acc_lh_s1 = 1714
13553 CEFBS_None, // M2_mpy_acc_ll_s0 = 1715
13554 CEFBS_None, // M2_mpy_acc_ll_s1 = 1716
13555 CEFBS_None, // M2_mpy_acc_sat_hh_s0 = 1717
13556 CEFBS_None, // M2_mpy_acc_sat_hh_s1 = 1718
13557 CEFBS_None, // M2_mpy_acc_sat_hl_s0 = 1719
13558 CEFBS_None, // M2_mpy_acc_sat_hl_s1 = 1720
13559 CEFBS_None, // M2_mpy_acc_sat_lh_s0 = 1721
13560 CEFBS_None, // M2_mpy_acc_sat_lh_s1 = 1722
13561 CEFBS_None, // M2_mpy_acc_sat_ll_s0 = 1723
13562 CEFBS_None, // M2_mpy_acc_sat_ll_s1 = 1724
13563 CEFBS_None, // M2_mpy_hh_s0 = 1725
13564 CEFBS_None, // M2_mpy_hh_s1 = 1726
13565 CEFBS_None, // M2_mpy_hl_s0 = 1727
13566 CEFBS_None, // M2_mpy_hl_s1 = 1728
13567 CEFBS_None, // M2_mpy_lh_s0 = 1729
13568 CEFBS_None, // M2_mpy_lh_s1 = 1730
13569 CEFBS_None, // M2_mpy_ll_s0 = 1731
13570 CEFBS_None, // M2_mpy_ll_s1 = 1732
13571 CEFBS_None, // M2_mpy_nac_hh_s0 = 1733
13572 CEFBS_None, // M2_mpy_nac_hh_s1 = 1734
13573 CEFBS_None, // M2_mpy_nac_hl_s0 = 1735
13574 CEFBS_None, // M2_mpy_nac_hl_s1 = 1736
13575 CEFBS_None, // M2_mpy_nac_lh_s0 = 1737
13576 CEFBS_None, // M2_mpy_nac_lh_s1 = 1738
13577 CEFBS_None, // M2_mpy_nac_ll_s0 = 1739
13578 CEFBS_None, // M2_mpy_nac_ll_s1 = 1740
13579 CEFBS_None, // M2_mpy_nac_sat_hh_s0 = 1741
13580 CEFBS_None, // M2_mpy_nac_sat_hh_s1 = 1742
13581 CEFBS_None, // M2_mpy_nac_sat_hl_s0 = 1743
13582 CEFBS_None, // M2_mpy_nac_sat_hl_s1 = 1744
13583 CEFBS_None, // M2_mpy_nac_sat_lh_s0 = 1745
13584 CEFBS_None, // M2_mpy_nac_sat_lh_s1 = 1746
13585 CEFBS_None, // M2_mpy_nac_sat_ll_s0 = 1747
13586 CEFBS_None, // M2_mpy_nac_sat_ll_s1 = 1748
13587 CEFBS_None, // M2_mpy_rnd_hh_s0 = 1749
13588 CEFBS_None, // M2_mpy_rnd_hh_s1 = 1750
13589 CEFBS_None, // M2_mpy_rnd_hl_s0 = 1751
13590 CEFBS_None, // M2_mpy_rnd_hl_s1 = 1752
13591 CEFBS_None, // M2_mpy_rnd_lh_s0 = 1753
13592 CEFBS_None, // M2_mpy_rnd_lh_s1 = 1754
13593 CEFBS_None, // M2_mpy_rnd_ll_s0 = 1755
13594 CEFBS_None, // M2_mpy_rnd_ll_s1 = 1756
13595 CEFBS_None, // M2_mpy_sat_hh_s0 = 1757
13596 CEFBS_None, // M2_mpy_sat_hh_s1 = 1758
13597 CEFBS_None, // M2_mpy_sat_hl_s0 = 1759
13598 CEFBS_None, // M2_mpy_sat_hl_s1 = 1760
13599 CEFBS_None, // M2_mpy_sat_lh_s0 = 1761
13600 CEFBS_None, // M2_mpy_sat_lh_s1 = 1762
13601 CEFBS_None, // M2_mpy_sat_ll_s0 = 1763
13602 CEFBS_None, // M2_mpy_sat_ll_s1 = 1764
13603 CEFBS_None, // M2_mpy_sat_rnd_hh_s0 = 1765
13604 CEFBS_None, // M2_mpy_sat_rnd_hh_s1 = 1766
13605 CEFBS_None, // M2_mpy_sat_rnd_hl_s0 = 1767
13606 CEFBS_None, // M2_mpy_sat_rnd_hl_s1 = 1768
13607 CEFBS_None, // M2_mpy_sat_rnd_lh_s0 = 1769
13608 CEFBS_None, // M2_mpy_sat_rnd_lh_s1 = 1770
13609 CEFBS_None, // M2_mpy_sat_rnd_ll_s0 = 1771
13610 CEFBS_None, // M2_mpy_sat_rnd_ll_s1 = 1772
13611 CEFBS_None, // M2_mpy_up = 1773
13612 CEFBS_None, // M2_mpy_up_s1 = 1774
13613 CEFBS_None, // M2_mpy_up_s1_sat = 1775
13614 CEFBS_None, // M2_mpyd_acc_hh_s0 = 1776
13615 CEFBS_None, // M2_mpyd_acc_hh_s1 = 1777
13616 CEFBS_None, // M2_mpyd_acc_hl_s0 = 1778
13617 CEFBS_None, // M2_mpyd_acc_hl_s1 = 1779
13618 CEFBS_None, // M2_mpyd_acc_lh_s0 = 1780
13619 CEFBS_None, // M2_mpyd_acc_lh_s1 = 1781
13620 CEFBS_None, // M2_mpyd_acc_ll_s0 = 1782
13621 CEFBS_None, // M2_mpyd_acc_ll_s1 = 1783
13622 CEFBS_None, // M2_mpyd_hh_s0 = 1784
13623 CEFBS_None, // M2_mpyd_hh_s1 = 1785
13624 CEFBS_None, // M2_mpyd_hl_s0 = 1786
13625 CEFBS_None, // M2_mpyd_hl_s1 = 1787
13626 CEFBS_None, // M2_mpyd_lh_s0 = 1788
13627 CEFBS_None, // M2_mpyd_lh_s1 = 1789
13628 CEFBS_None, // M2_mpyd_ll_s0 = 1790
13629 CEFBS_None, // M2_mpyd_ll_s1 = 1791
13630 CEFBS_None, // M2_mpyd_nac_hh_s0 = 1792
13631 CEFBS_None, // M2_mpyd_nac_hh_s1 = 1793
13632 CEFBS_None, // M2_mpyd_nac_hl_s0 = 1794
13633 CEFBS_None, // M2_mpyd_nac_hl_s1 = 1795
13634 CEFBS_None, // M2_mpyd_nac_lh_s0 = 1796
13635 CEFBS_None, // M2_mpyd_nac_lh_s1 = 1797
13636 CEFBS_None, // M2_mpyd_nac_ll_s0 = 1798
13637 CEFBS_None, // M2_mpyd_nac_ll_s1 = 1799
13638 CEFBS_None, // M2_mpyd_rnd_hh_s0 = 1800
13639 CEFBS_None, // M2_mpyd_rnd_hh_s1 = 1801
13640 CEFBS_None, // M2_mpyd_rnd_hl_s0 = 1802
13641 CEFBS_None, // M2_mpyd_rnd_hl_s1 = 1803
13642 CEFBS_None, // M2_mpyd_rnd_lh_s0 = 1804
13643 CEFBS_None, // M2_mpyd_rnd_lh_s1 = 1805
13644 CEFBS_None, // M2_mpyd_rnd_ll_s0 = 1806
13645 CEFBS_None, // M2_mpyd_rnd_ll_s1 = 1807
13646 CEFBS_None, // M2_mpyi = 1808
13647 CEFBS_None, // M2_mpysin = 1809
13648 CEFBS_None, // M2_mpysip = 1810
13649 CEFBS_None, // M2_mpysu_up = 1811
13650 CEFBS_None, // M2_mpyu_acc_hh_s0 = 1812
13651 CEFBS_None, // M2_mpyu_acc_hh_s1 = 1813
13652 CEFBS_None, // M2_mpyu_acc_hl_s0 = 1814
13653 CEFBS_None, // M2_mpyu_acc_hl_s1 = 1815
13654 CEFBS_None, // M2_mpyu_acc_lh_s0 = 1816
13655 CEFBS_None, // M2_mpyu_acc_lh_s1 = 1817
13656 CEFBS_None, // M2_mpyu_acc_ll_s0 = 1818
13657 CEFBS_None, // M2_mpyu_acc_ll_s1 = 1819
13658 CEFBS_None, // M2_mpyu_hh_s0 = 1820
13659 CEFBS_None, // M2_mpyu_hh_s1 = 1821
13660 CEFBS_None, // M2_mpyu_hl_s0 = 1822
13661 CEFBS_None, // M2_mpyu_hl_s1 = 1823
13662 CEFBS_None, // M2_mpyu_lh_s0 = 1824
13663 CEFBS_None, // M2_mpyu_lh_s1 = 1825
13664 CEFBS_None, // M2_mpyu_ll_s0 = 1826
13665 CEFBS_None, // M2_mpyu_ll_s1 = 1827
13666 CEFBS_None, // M2_mpyu_nac_hh_s0 = 1828
13667 CEFBS_None, // M2_mpyu_nac_hh_s1 = 1829
13668 CEFBS_None, // M2_mpyu_nac_hl_s0 = 1830
13669 CEFBS_None, // M2_mpyu_nac_hl_s1 = 1831
13670 CEFBS_None, // M2_mpyu_nac_lh_s0 = 1832
13671 CEFBS_None, // M2_mpyu_nac_lh_s1 = 1833
13672 CEFBS_None, // M2_mpyu_nac_ll_s0 = 1834
13673 CEFBS_None, // M2_mpyu_nac_ll_s1 = 1835
13674 CEFBS_None, // M2_mpyu_up = 1836
13675 CEFBS_None, // M2_mpyud_acc_hh_s0 = 1837
13676 CEFBS_None, // M2_mpyud_acc_hh_s1 = 1838
13677 CEFBS_None, // M2_mpyud_acc_hl_s0 = 1839
13678 CEFBS_None, // M2_mpyud_acc_hl_s1 = 1840
13679 CEFBS_None, // M2_mpyud_acc_lh_s0 = 1841
13680 CEFBS_None, // M2_mpyud_acc_lh_s1 = 1842
13681 CEFBS_None, // M2_mpyud_acc_ll_s0 = 1843
13682 CEFBS_None, // M2_mpyud_acc_ll_s1 = 1844
13683 CEFBS_None, // M2_mpyud_hh_s0 = 1845
13684 CEFBS_None, // M2_mpyud_hh_s1 = 1846
13685 CEFBS_None, // M2_mpyud_hl_s0 = 1847
13686 CEFBS_None, // M2_mpyud_hl_s1 = 1848
13687 CEFBS_None, // M2_mpyud_lh_s0 = 1849
13688 CEFBS_None, // M2_mpyud_lh_s1 = 1850
13689 CEFBS_None, // M2_mpyud_ll_s0 = 1851
13690 CEFBS_None, // M2_mpyud_ll_s1 = 1852
13691 CEFBS_None, // M2_mpyud_nac_hh_s0 = 1853
13692 CEFBS_None, // M2_mpyud_nac_hh_s1 = 1854
13693 CEFBS_None, // M2_mpyud_nac_hl_s0 = 1855
13694 CEFBS_None, // M2_mpyud_nac_hl_s1 = 1856
13695 CEFBS_None, // M2_mpyud_nac_lh_s0 = 1857
13696 CEFBS_None, // M2_mpyud_nac_lh_s1 = 1858
13697 CEFBS_None, // M2_mpyud_nac_ll_s0 = 1859
13698 CEFBS_None, // M2_mpyud_nac_ll_s1 = 1860
13699 CEFBS_None, // M2_nacci = 1861
13700 CEFBS_None, // M2_naccii = 1862
13701 CEFBS_None, // M2_subacc = 1863
13702 CEFBS_None, // M2_vabsdiffh = 1864
13703 CEFBS_None, // M2_vabsdiffw = 1865
13704 CEFBS_None, // M2_vcmac_s0_sat_i = 1866
13705 CEFBS_None, // M2_vcmac_s0_sat_r = 1867
13706 CEFBS_None, // M2_vcmpy_s0_sat_i = 1868
13707 CEFBS_None, // M2_vcmpy_s0_sat_r = 1869
13708 CEFBS_None, // M2_vcmpy_s1_sat_i = 1870
13709 CEFBS_None, // M2_vcmpy_s1_sat_r = 1871
13710 CEFBS_None, // M2_vdmacs_s0 = 1872
13711 CEFBS_None, // M2_vdmacs_s1 = 1873
13712 CEFBS_None, // M2_vdmpyrs_s0 = 1874
13713 CEFBS_None, // M2_vdmpyrs_s1 = 1875
13714 CEFBS_None, // M2_vdmpys_s0 = 1876
13715 CEFBS_None, // M2_vdmpys_s1 = 1877
13716 CEFBS_None, // M2_vmac2 = 1878
13717 CEFBS_None, // M2_vmac2es = 1879
13718 CEFBS_None, // M2_vmac2es_s0 = 1880
13719 CEFBS_None, // M2_vmac2es_s1 = 1881
13720 CEFBS_None, // M2_vmac2s_s0 = 1882
13721 CEFBS_None, // M2_vmac2s_s1 = 1883
13722 CEFBS_None, // M2_vmac2su_s0 = 1884
13723 CEFBS_None, // M2_vmac2su_s1 = 1885
13724 CEFBS_None, // M2_vmpy2es_s0 = 1886
13725 CEFBS_None, // M2_vmpy2es_s1 = 1887
13726 CEFBS_None, // M2_vmpy2s_s0 = 1888
13727 CEFBS_None, // M2_vmpy2s_s0pack = 1889
13728 CEFBS_None, // M2_vmpy2s_s1 = 1890
13729 CEFBS_None, // M2_vmpy2s_s1pack = 1891
13730 CEFBS_None, // M2_vmpy2su_s0 = 1892
13731 CEFBS_None, // M2_vmpy2su_s1 = 1893
13732 CEFBS_None, // M2_vraddh = 1894
13733 CEFBS_None, // M2_vradduh = 1895
13734 CEFBS_None, // M2_vrcmaci_s0 = 1896
13735 CEFBS_None, // M2_vrcmaci_s0c = 1897
13736 CEFBS_None, // M2_vrcmacr_s0 = 1898
13737 CEFBS_None, // M2_vrcmacr_s0c = 1899
13738 CEFBS_None, // M2_vrcmpyi_s0 = 1900
13739 CEFBS_None, // M2_vrcmpyi_s0c = 1901
13740 CEFBS_None, // M2_vrcmpyr_s0 = 1902
13741 CEFBS_None, // M2_vrcmpyr_s0c = 1903
13742 CEFBS_None, // M2_vrcmpys_acc_s1_h = 1904
13743 CEFBS_None, // M2_vrcmpys_acc_s1_l = 1905
13744 CEFBS_None, // M2_vrcmpys_s1_h = 1906
13745 CEFBS_None, // M2_vrcmpys_s1_l = 1907
13746 CEFBS_None, // M2_vrcmpys_s1rp_h = 1908
13747 CEFBS_None, // M2_vrcmpys_s1rp_l = 1909
13748 CEFBS_None, // M2_vrmac_s0 = 1910
13749 CEFBS_None, // M2_vrmpy_s0 = 1911
13750 CEFBS_None, // M2_xor_xacc = 1912
13751 CEFBS_None, // M4_and_and = 1913
13752 CEFBS_None, // M4_and_andn = 1914
13753 CEFBS_None, // M4_and_or = 1915
13754 CEFBS_None, // M4_and_xor = 1916
13755 CEFBS_None, // M4_cmpyi_wh = 1917
13756 CEFBS_None, // M4_cmpyi_whc = 1918
13757 CEFBS_None, // M4_cmpyr_wh = 1919
13758 CEFBS_None, // M4_cmpyr_whc = 1920
13759 CEFBS_None, // M4_mac_up_s1_sat = 1921
13760 CEFBS_None, // M4_mpyri_addi = 1922
13761 CEFBS_None, // M4_mpyri_addr = 1923
13762 CEFBS_None, // M4_mpyri_addr_u2 = 1924
13763 CEFBS_None, // M4_mpyrr_addi = 1925
13764 CEFBS_None, // M4_mpyrr_addr = 1926
13765 CEFBS_None, // M4_nac_up_s1_sat = 1927
13766 CEFBS_None, // M4_or_and = 1928
13767 CEFBS_None, // M4_or_andn = 1929
13768 CEFBS_None, // M4_or_or = 1930
13769 CEFBS_None, // M4_or_xor = 1931
13770 CEFBS_None, // M4_pmpyw = 1932
13771 CEFBS_None, // M4_pmpyw_acc = 1933
13772 CEFBS_None, // M4_vpmpyh = 1934
13773 CEFBS_None, // M4_vpmpyh_acc = 1935
13774 CEFBS_None, // M4_vrmpyeh_acc_s0 = 1936
13775 CEFBS_None, // M4_vrmpyeh_acc_s1 = 1937
13776 CEFBS_None, // M4_vrmpyeh_s0 = 1938
13777 CEFBS_None, // M4_vrmpyeh_s1 = 1939
13778 CEFBS_None, // M4_vrmpyoh_acc_s0 = 1940
13779 CEFBS_None, // M4_vrmpyoh_acc_s1 = 1941
13780 CEFBS_None, // M4_vrmpyoh_s0 = 1942
13781 CEFBS_None, // M4_vrmpyoh_s1 = 1943
13782 CEFBS_None, // M4_xor_and = 1944
13783 CEFBS_None, // M4_xor_andn = 1945
13784 CEFBS_None, // M4_xor_or = 1946
13785 CEFBS_None, // M4_xor_xacc = 1947
13786 CEFBS_None, // M5_vdmacbsu = 1948
13787 CEFBS_None, // M5_vdmpybsu = 1949
13788 CEFBS_None, // M5_vmacbsu = 1950
13789 CEFBS_None, // M5_vmacbuu = 1951
13790 CEFBS_None, // M5_vmpybsu = 1952
13791 CEFBS_None, // M5_vmpybuu = 1953
13792 CEFBS_None, // M5_vrmacbsu = 1954
13793 CEFBS_None, // M5_vrmacbuu = 1955
13794 CEFBS_None, // M5_vrmpybsu = 1956
13795 CEFBS_None, // M5_vrmpybuu = 1957
13796 CEFBS_HasV62, // M6_vabsdiffb = 1958
13797 CEFBS_HasV62, // M6_vabsdiffub = 1959
13798 CEFBS_HasV67_UseAudio, // M7_dcmpyiw = 1960
13799 CEFBS_HasV67_UseAudio, // M7_dcmpyiw_acc = 1961
13800 CEFBS_HasV67_UseAudio, // M7_dcmpyiwc = 1962
13801 CEFBS_HasV67_UseAudio, // M7_dcmpyiwc_acc = 1963
13802 CEFBS_HasV67_UseAudio, // M7_dcmpyrw = 1964
13803 CEFBS_HasV67_UseAudio, // M7_dcmpyrw_acc = 1965
13804 CEFBS_HasV67_UseAudio, // M7_dcmpyrwc = 1966
13805 CEFBS_HasV67_UseAudio, // M7_dcmpyrwc_acc = 1967
13806 CEFBS_HasV67_UseAudio, // M7_wcmpyiw = 1968
13807 CEFBS_HasV67_UseAudio, // M7_wcmpyiw_rnd = 1969
13808 CEFBS_HasV67_UseAudio, // M7_wcmpyiwc = 1970
13809 CEFBS_HasV67_UseAudio, // M7_wcmpyiwc_rnd = 1971
13810 CEFBS_HasV67_UseAudio, // M7_wcmpyrw = 1972
13811 CEFBS_HasV67_UseAudio, // M7_wcmpyrw_rnd = 1973
13812 CEFBS_HasV67_UseAudio, // M7_wcmpyrwc = 1974
13813 CEFBS_HasV67_UseAudio, // M7_wcmpyrwc_rnd = 1975
13814 CEFBS_None, // PS_call_stk = 1976
13815 CEFBS_None, // PS_callr_nr = 1977
13816 CEFBS_None, // PS_jmpret = 1978
13817 CEFBS_None, // PS_jmpretf = 1979
13818 CEFBS_None, // PS_jmpretfnew = 1980
13819 CEFBS_None, // PS_jmpretfnewpt = 1981
13820 CEFBS_None, // PS_jmprett = 1982
13821 CEFBS_None, // PS_jmprettnew = 1983
13822 CEFBS_None, // PS_jmprettnewpt = 1984
13823 CEFBS_None, // PS_loadrbabs = 1985
13824 CEFBS_None, // PS_loadrdabs = 1986
13825 CEFBS_None, // PS_loadrhabs = 1987
13826 CEFBS_None, // PS_loadriabs = 1988
13827 CEFBS_None, // PS_loadrubabs = 1989
13828 CEFBS_None, // PS_loadruhabs = 1990
13829 CEFBS_None, // PS_storerbabs = 1991
13830 CEFBS_None, // PS_storerbnewabs = 1992
13831 CEFBS_None, // PS_storerdabs = 1993
13832 CEFBS_None, // PS_storerfabs = 1994
13833 CEFBS_None, // PS_storerhabs = 1995
13834 CEFBS_None, // PS_storerhnewabs = 1996
13835 CEFBS_None, // PS_storeriabs = 1997
13836 CEFBS_None, // PS_storerinewabs = 1998
13837 CEFBS_HasPreV65, // PS_trap1 = 1999
13838 CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4 = 2000
13839 CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT = 2001
13840 CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC = 2002
13841 CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC = 2003
13842 CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4 = 2004
13843 CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4_EXT = 2005
13844 CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC = 2006
13845 CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4_PIC = 2007
13846 CEFBS_None, // S2_addasl_rrri = 2008
13847 CEFBS_None, // S2_allocframe = 2009
13848 CEFBS_None, // S2_asl_i_p = 2010
13849 CEFBS_None, // S2_asl_i_p_acc = 2011
13850 CEFBS_None, // S2_asl_i_p_and = 2012
13851 CEFBS_None, // S2_asl_i_p_nac = 2013
13852 CEFBS_None, // S2_asl_i_p_or = 2014
13853 CEFBS_None, // S2_asl_i_p_xacc = 2015
13854 CEFBS_None, // S2_asl_i_r = 2016
13855 CEFBS_None, // S2_asl_i_r_acc = 2017
13856 CEFBS_None, // S2_asl_i_r_and = 2018
13857 CEFBS_None, // S2_asl_i_r_nac = 2019
13858 CEFBS_None, // S2_asl_i_r_or = 2020
13859 CEFBS_None, // S2_asl_i_r_sat = 2021
13860 CEFBS_None, // S2_asl_i_r_xacc = 2022
13861 CEFBS_None, // S2_asl_i_vh = 2023
13862 CEFBS_None, // S2_asl_i_vw = 2024
13863 CEFBS_None, // S2_asl_r_p = 2025
13864 CEFBS_None, // S2_asl_r_p_acc = 2026
13865 CEFBS_None, // S2_asl_r_p_and = 2027
13866 CEFBS_None, // S2_asl_r_p_nac = 2028
13867 CEFBS_None, // S2_asl_r_p_or = 2029
13868 CEFBS_None, // S2_asl_r_p_xor = 2030
13869 CEFBS_None, // S2_asl_r_r = 2031
13870 CEFBS_None, // S2_asl_r_r_acc = 2032
13871 CEFBS_None, // S2_asl_r_r_and = 2033
13872 CEFBS_None, // S2_asl_r_r_nac = 2034
13873 CEFBS_None, // S2_asl_r_r_or = 2035
13874 CEFBS_None, // S2_asl_r_r_sat = 2036
13875 CEFBS_None, // S2_asl_r_vh = 2037
13876 CEFBS_None, // S2_asl_r_vw = 2038
13877 CEFBS_None, // S2_asr_i_p = 2039
13878 CEFBS_None, // S2_asr_i_p_acc = 2040
13879 CEFBS_None, // S2_asr_i_p_and = 2041
13880 CEFBS_None, // S2_asr_i_p_nac = 2042
13881 CEFBS_None, // S2_asr_i_p_or = 2043
13882 CEFBS_None, // S2_asr_i_p_rnd = 2044
13883 CEFBS_None, // S2_asr_i_r = 2045
13884 CEFBS_None, // S2_asr_i_r_acc = 2046
13885 CEFBS_None, // S2_asr_i_r_and = 2047
13886 CEFBS_None, // S2_asr_i_r_nac = 2048
13887 CEFBS_None, // S2_asr_i_r_or = 2049
13888 CEFBS_None, // S2_asr_i_r_rnd = 2050
13889 CEFBS_None, // S2_asr_i_svw_trun = 2051
13890 CEFBS_None, // S2_asr_i_vh = 2052
13891 CEFBS_None, // S2_asr_i_vw = 2053
13892 CEFBS_None, // S2_asr_r_p = 2054
13893 CEFBS_None, // S2_asr_r_p_acc = 2055
13894 CEFBS_None, // S2_asr_r_p_and = 2056
13895 CEFBS_None, // S2_asr_r_p_nac = 2057
13896 CEFBS_None, // S2_asr_r_p_or = 2058
13897 CEFBS_None, // S2_asr_r_p_xor = 2059
13898 CEFBS_None, // S2_asr_r_r = 2060
13899 CEFBS_None, // S2_asr_r_r_acc = 2061
13900 CEFBS_None, // S2_asr_r_r_and = 2062
13901 CEFBS_None, // S2_asr_r_r_nac = 2063
13902 CEFBS_None, // S2_asr_r_r_or = 2064
13903 CEFBS_None, // S2_asr_r_r_sat = 2065
13904 CEFBS_None, // S2_asr_r_svw_trun = 2066
13905 CEFBS_None, // S2_asr_r_vh = 2067
13906 CEFBS_None, // S2_asr_r_vw = 2068
13907 CEFBS_None, // S2_brev = 2069
13908 CEFBS_None, // S2_brevp = 2070
13909 CEFBS_None, // S2_cabacdecbin = 2071
13910 CEFBS_None, // S2_cl0 = 2072
13911 CEFBS_None, // S2_cl0p = 2073
13912 CEFBS_None, // S2_cl1 = 2074
13913 CEFBS_None, // S2_cl1p = 2075
13914 CEFBS_None, // S2_clb = 2076
13915 CEFBS_None, // S2_clbnorm = 2077
13916 CEFBS_None, // S2_clbp = 2078
13917 CEFBS_None, // S2_clrbit_i = 2079
13918 CEFBS_None, // S2_clrbit_r = 2080
13919 CEFBS_None, // S2_ct0 = 2081
13920 CEFBS_None, // S2_ct0p = 2082
13921 CEFBS_None, // S2_ct1 = 2083
13922 CEFBS_None, // S2_ct1p = 2084
13923 CEFBS_None, // S2_deinterleave = 2085
13924 CEFBS_None, // S2_extractu = 2086
13925 CEFBS_None, // S2_extractu_rp = 2087
13926 CEFBS_None, // S2_extractup = 2088
13927 CEFBS_None, // S2_extractup_rp = 2089
13928 CEFBS_None, // S2_insert = 2090
13929 CEFBS_None, // S2_insert_rp = 2091
13930 CEFBS_None, // S2_insertp = 2092
13931 CEFBS_None, // S2_insertp_rp = 2093
13932 CEFBS_None, // S2_interleave = 2094
13933 CEFBS_None, // S2_lfsp = 2095
13934 CEFBS_None, // S2_lsl_r_p = 2096
13935 CEFBS_None, // S2_lsl_r_p_acc = 2097
13936 CEFBS_None, // S2_lsl_r_p_and = 2098
13937 CEFBS_None, // S2_lsl_r_p_nac = 2099
13938 CEFBS_None, // S2_lsl_r_p_or = 2100
13939 CEFBS_None, // S2_lsl_r_p_xor = 2101
13940 CEFBS_None, // S2_lsl_r_r = 2102
13941 CEFBS_None, // S2_lsl_r_r_acc = 2103
13942 CEFBS_None, // S2_lsl_r_r_and = 2104
13943 CEFBS_None, // S2_lsl_r_r_nac = 2105
13944 CEFBS_None, // S2_lsl_r_r_or = 2106
13945 CEFBS_None, // S2_lsl_r_vh = 2107
13946 CEFBS_None, // S2_lsl_r_vw = 2108
13947 CEFBS_None, // S2_lsr_i_p = 2109
13948 CEFBS_None, // S2_lsr_i_p_acc = 2110
13949 CEFBS_None, // S2_lsr_i_p_and = 2111
13950 CEFBS_None, // S2_lsr_i_p_nac = 2112
13951 CEFBS_None, // S2_lsr_i_p_or = 2113
13952 CEFBS_None, // S2_lsr_i_p_xacc = 2114
13953 CEFBS_None, // S2_lsr_i_r = 2115
13954 CEFBS_None, // S2_lsr_i_r_acc = 2116
13955 CEFBS_None, // S2_lsr_i_r_and = 2117
13956 CEFBS_None, // S2_lsr_i_r_nac = 2118
13957 CEFBS_None, // S2_lsr_i_r_or = 2119
13958 CEFBS_None, // S2_lsr_i_r_xacc = 2120
13959 CEFBS_None, // S2_lsr_i_vh = 2121
13960 CEFBS_None, // S2_lsr_i_vw = 2122
13961 CEFBS_None, // S2_lsr_r_p = 2123
13962 CEFBS_None, // S2_lsr_r_p_acc = 2124
13963 CEFBS_None, // S2_lsr_r_p_and = 2125
13964 CEFBS_None, // S2_lsr_r_p_nac = 2126
13965 CEFBS_None, // S2_lsr_r_p_or = 2127
13966 CEFBS_None, // S2_lsr_r_p_xor = 2128
13967 CEFBS_None, // S2_lsr_r_r = 2129
13968 CEFBS_None, // S2_lsr_r_r_acc = 2130
13969 CEFBS_None, // S2_lsr_r_r_and = 2131
13970 CEFBS_None, // S2_lsr_r_r_nac = 2132
13971 CEFBS_None, // S2_lsr_r_r_or = 2133
13972 CEFBS_None, // S2_lsr_r_vh = 2134
13973 CEFBS_None, // S2_lsr_r_vw = 2135
13974 CEFBS_HasV66, // S2_mask = 2136
13975 CEFBS_None, // S2_packhl = 2137
13976 CEFBS_None, // S2_parityp = 2138
13977 CEFBS_None, // S2_pstorerbf_io = 2139
13978 CEFBS_None, // S2_pstorerbf_pi = 2140
13979 CEFBS_None, // S2_pstorerbfnew_pi = 2141
13980 CEFBS_None, // S2_pstorerbnewf_io = 2142
13981 CEFBS_None, // S2_pstorerbnewf_pi = 2143
13982 CEFBS_None, // S2_pstorerbnewfnew_pi = 2144
13983 CEFBS_None, // S2_pstorerbnewt_io = 2145
13984 CEFBS_None, // S2_pstorerbnewt_pi = 2146
13985 CEFBS_None, // S2_pstorerbnewtnew_pi = 2147
13986 CEFBS_None, // S2_pstorerbt_io = 2148
13987 CEFBS_None, // S2_pstorerbt_pi = 2149
13988 CEFBS_None, // S2_pstorerbtnew_pi = 2150
13989 CEFBS_None, // S2_pstorerdf_io = 2151
13990 CEFBS_None, // S2_pstorerdf_pi = 2152
13991 CEFBS_None, // S2_pstorerdfnew_pi = 2153
13992 CEFBS_None, // S2_pstorerdt_io = 2154
13993 CEFBS_None, // S2_pstorerdt_pi = 2155
13994 CEFBS_None, // S2_pstorerdtnew_pi = 2156
13995 CEFBS_None, // S2_pstorerff_io = 2157
13996 CEFBS_None, // S2_pstorerff_pi = 2158
13997 CEFBS_None, // S2_pstorerffnew_pi = 2159
13998 CEFBS_None, // S2_pstorerft_io = 2160
13999 CEFBS_None, // S2_pstorerft_pi = 2161
14000 CEFBS_None, // S2_pstorerftnew_pi = 2162
14001 CEFBS_None, // S2_pstorerhf_io = 2163
14002 CEFBS_None, // S2_pstorerhf_pi = 2164
14003 CEFBS_None, // S2_pstorerhfnew_pi = 2165
14004 CEFBS_None, // S2_pstorerhnewf_io = 2166
14005 CEFBS_None, // S2_pstorerhnewf_pi = 2167
14006 CEFBS_None, // S2_pstorerhnewfnew_pi = 2168
14007 CEFBS_None, // S2_pstorerhnewt_io = 2169
14008 CEFBS_None, // S2_pstorerhnewt_pi = 2170
14009 CEFBS_None, // S2_pstorerhnewtnew_pi = 2171
14010 CEFBS_None, // S2_pstorerht_io = 2172
14011 CEFBS_None, // S2_pstorerht_pi = 2173
14012 CEFBS_None, // S2_pstorerhtnew_pi = 2174
14013 CEFBS_None, // S2_pstorerif_io = 2175
14014 CEFBS_None, // S2_pstorerif_pi = 2176
14015 CEFBS_None, // S2_pstorerifnew_pi = 2177
14016 CEFBS_None, // S2_pstorerinewf_io = 2178
14017 CEFBS_None, // S2_pstorerinewf_pi = 2179
14018 CEFBS_None, // S2_pstorerinewfnew_pi = 2180
14019 CEFBS_None, // S2_pstorerinewt_io = 2181
14020 CEFBS_None, // S2_pstorerinewt_pi = 2182
14021 CEFBS_None, // S2_pstorerinewtnew_pi = 2183
14022 CEFBS_None, // S2_pstorerit_io = 2184
14023 CEFBS_None, // S2_pstorerit_pi = 2185
14024 CEFBS_None, // S2_pstoreritnew_pi = 2186
14025 CEFBS_None, // S2_setbit_i = 2187
14026 CEFBS_None, // S2_setbit_r = 2188
14027 CEFBS_None, // S2_shuffeb = 2189
14028 CEFBS_None, // S2_shuffeh = 2190
14029 CEFBS_None, // S2_shuffob = 2191
14030 CEFBS_None, // S2_shuffoh = 2192
14031 CEFBS_None, // S2_storerb_io = 2193
14032 CEFBS_None, // S2_storerb_pbr = 2194
14033 CEFBS_None, // S2_storerb_pci = 2195
14034 CEFBS_None, // S2_storerb_pcr = 2196
14035 CEFBS_None, // S2_storerb_pi = 2197
14036 CEFBS_None, // S2_storerb_pr = 2198
14037 CEFBS_None, // S2_storerbgp = 2199
14038 CEFBS_None, // S2_storerbnew_io = 2200
14039 CEFBS_None, // S2_storerbnew_pbr = 2201
14040 CEFBS_None, // S2_storerbnew_pci = 2202
14041 CEFBS_None, // S2_storerbnew_pcr = 2203
14042 CEFBS_None, // S2_storerbnew_pi = 2204
14043 CEFBS_None, // S2_storerbnew_pr = 2205
14044 CEFBS_None, // S2_storerbnewgp = 2206
14045 CEFBS_None, // S2_storerd_io = 2207
14046 CEFBS_None, // S2_storerd_pbr = 2208
14047 CEFBS_None, // S2_storerd_pci = 2209
14048 CEFBS_None, // S2_storerd_pcr = 2210
14049 CEFBS_None, // S2_storerd_pi = 2211
14050 CEFBS_None, // S2_storerd_pr = 2212
14051 CEFBS_None, // S2_storerdgp = 2213
14052 CEFBS_None, // S2_storerf_io = 2214
14053 CEFBS_None, // S2_storerf_pbr = 2215
14054 CEFBS_None, // S2_storerf_pci = 2216
14055 CEFBS_None, // S2_storerf_pcr = 2217
14056 CEFBS_None, // S2_storerf_pi = 2218
14057 CEFBS_None, // S2_storerf_pr = 2219
14058 CEFBS_None, // S2_storerfgp = 2220
14059 CEFBS_None, // S2_storerh_io = 2221
14060 CEFBS_None, // S2_storerh_pbr = 2222
14061 CEFBS_None, // S2_storerh_pci = 2223
14062 CEFBS_None, // S2_storerh_pcr = 2224
14063 CEFBS_None, // S2_storerh_pi = 2225
14064 CEFBS_None, // S2_storerh_pr = 2226
14065 CEFBS_None, // S2_storerhgp = 2227
14066 CEFBS_None, // S2_storerhnew_io = 2228
14067 CEFBS_None, // S2_storerhnew_pbr = 2229
14068 CEFBS_None, // S2_storerhnew_pci = 2230
14069 CEFBS_None, // S2_storerhnew_pcr = 2231
14070 CEFBS_None, // S2_storerhnew_pi = 2232
14071 CEFBS_None, // S2_storerhnew_pr = 2233
14072 CEFBS_None, // S2_storerhnewgp = 2234
14073 CEFBS_None, // S2_storeri_io = 2235
14074 CEFBS_None, // S2_storeri_pbr = 2236
14075 CEFBS_None, // S2_storeri_pci = 2237
14076 CEFBS_None, // S2_storeri_pcr = 2238
14077 CEFBS_None, // S2_storeri_pi = 2239
14078 CEFBS_None, // S2_storeri_pr = 2240
14079 CEFBS_None, // S2_storerigp = 2241
14080 CEFBS_None, // S2_storerinew_io = 2242
14081 CEFBS_None, // S2_storerinew_pbr = 2243
14082 CEFBS_None, // S2_storerinew_pci = 2244
14083 CEFBS_None, // S2_storerinew_pcr = 2245
14084 CEFBS_None, // S2_storerinew_pi = 2246
14085 CEFBS_None, // S2_storerinew_pr = 2247
14086 CEFBS_None, // S2_storerinewgp = 2248
14087 CEFBS_None, // S2_storew_locked = 2249
14088 CEFBS_None, // S2_svsathb = 2250
14089 CEFBS_None, // S2_svsathub = 2251
14090 CEFBS_None, // S2_tableidxb = 2252
14091 CEFBS_None, // S2_tableidxd = 2253
14092 CEFBS_None, // S2_tableidxh = 2254
14093 CEFBS_None, // S2_tableidxw = 2255
14094 CEFBS_None, // S2_togglebit_i = 2256
14095 CEFBS_None, // S2_togglebit_r = 2257
14096 CEFBS_None, // S2_tstbit_i = 2258
14097 CEFBS_None, // S2_tstbit_r = 2259
14098 CEFBS_None, // S2_valignib = 2260
14099 CEFBS_None, // S2_valignrb = 2261
14100 CEFBS_None, // S2_vcnegh = 2262
14101 CEFBS_None, // S2_vcrotate = 2263
14102 CEFBS_None, // S2_vrcnegh = 2264
14103 CEFBS_None, // S2_vrndpackwh = 2265
14104 CEFBS_None, // S2_vrndpackwhs = 2266
14105 CEFBS_None, // S2_vsathb = 2267
14106 CEFBS_None, // S2_vsathb_nopack = 2268
14107 CEFBS_None, // S2_vsathub = 2269
14108 CEFBS_None, // S2_vsathub_nopack = 2270
14109 CEFBS_None, // S2_vsatwh = 2271
14110 CEFBS_None, // S2_vsatwh_nopack = 2272
14111 CEFBS_None, // S2_vsatwuh = 2273
14112 CEFBS_None, // S2_vsatwuh_nopack = 2274
14113 CEFBS_None, // S2_vsplatrb = 2275
14114 CEFBS_None, // S2_vsplatrh = 2276
14115 CEFBS_None, // S2_vspliceib = 2277
14116 CEFBS_None, // S2_vsplicerb = 2278
14117 CEFBS_None, // S2_vsxtbh = 2279
14118 CEFBS_None, // S2_vsxthw = 2280
14119 CEFBS_None, // S2_vtrunehb = 2281
14120 CEFBS_None, // S2_vtrunewh = 2282
14121 CEFBS_None, // S2_vtrunohb = 2283
14122 CEFBS_None, // S2_vtrunowh = 2284
14123 CEFBS_None, // S2_vzxtbh = 2285
14124 CEFBS_None, // S2_vzxthw = 2286
14125 CEFBS_None, // S4_addaddi = 2287
14126 CEFBS_None, // S4_addi_asl_ri = 2288
14127 CEFBS_None, // S4_addi_lsr_ri = 2289
14128 CEFBS_None, // S4_andi_asl_ri = 2290
14129 CEFBS_None, // S4_andi_lsr_ri = 2291
14130 CEFBS_None, // S4_clbaddi = 2292
14131 CEFBS_None, // S4_clbpaddi = 2293
14132 CEFBS_None, // S4_clbpnorm = 2294
14133 CEFBS_None, // S4_extract = 2295
14134 CEFBS_None, // S4_extract_rp = 2296
14135 CEFBS_None, // S4_extractp = 2297
14136 CEFBS_None, // S4_extractp_rp = 2298
14137 CEFBS_None, // S4_lsli = 2299
14138 CEFBS_None, // S4_ntstbit_i = 2300
14139 CEFBS_None, // S4_ntstbit_r = 2301
14140 CEFBS_None, // S4_or_andi = 2302
14141 CEFBS_None, // S4_or_andix = 2303
14142 CEFBS_None, // S4_or_ori = 2304
14143 CEFBS_None, // S4_ori_asl_ri = 2305
14144 CEFBS_None, // S4_ori_lsr_ri = 2306
14145 CEFBS_None, // S4_parity = 2307
14146 CEFBS_None, // S4_pstorerbf_abs = 2308
14147 CEFBS_None, // S4_pstorerbf_rr = 2309
14148 CEFBS_None, // S4_pstorerbfnew_abs = 2310
14149 CEFBS_None, // S4_pstorerbfnew_io = 2311
14150 CEFBS_None, // S4_pstorerbfnew_rr = 2312
14151 CEFBS_None, // S4_pstorerbnewf_abs = 2313
14152 CEFBS_None, // S4_pstorerbnewf_rr = 2314
14153 CEFBS_None, // S4_pstorerbnewfnew_abs = 2315
14154 CEFBS_None, // S4_pstorerbnewfnew_io = 2316
14155 CEFBS_None, // S4_pstorerbnewfnew_rr = 2317
14156 CEFBS_None, // S4_pstorerbnewt_abs = 2318
14157 CEFBS_None, // S4_pstorerbnewt_rr = 2319
14158 CEFBS_None, // S4_pstorerbnewtnew_abs = 2320
14159 CEFBS_None, // S4_pstorerbnewtnew_io = 2321
14160 CEFBS_None, // S4_pstorerbnewtnew_rr = 2322
14161 CEFBS_None, // S4_pstorerbt_abs = 2323
14162 CEFBS_None, // S4_pstorerbt_rr = 2324
14163 CEFBS_None, // S4_pstorerbtnew_abs = 2325
14164 CEFBS_None, // S4_pstorerbtnew_io = 2326
14165 CEFBS_None, // S4_pstorerbtnew_rr = 2327
14166 CEFBS_None, // S4_pstorerdf_abs = 2328
14167 CEFBS_None, // S4_pstorerdf_rr = 2329
14168 CEFBS_None, // S4_pstorerdfnew_abs = 2330
14169 CEFBS_None, // S4_pstorerdfnew_io = 2331
14170 CEFBS_None, // S4_pstorerdfnew_rr = 2332
14171 CEFBS_None, // S4_pstorerdt_abs = 2333
14172 CEFBS_None, // S4_pstorerdt_rr = 2334
14173 CEFBS_None, // S4_pstorerdtnew_abs = 2335
14174 CEFBS_None, // S4_pstorerdtnew_io = 2336
14175 CEFBS_None, // S4_pstorerdtnew_rr = 2337
14176 CEFBS_None, // S4_pstorerff_abs = 2338
14177 CEFBS_None, // S4_pstorerff_rr = 2339
14178 CEFBS_None, // S4_pstorerffnew_abs = 2340
14179 CEFBS_None, // S4_pstorerffnew_io = 2341
14180 CEFBS_None, // S4_pstorerffnew_rr = 2342
14181 CEFBS_None, // S4_pstorerft_abs = 2343
14182 CEFBS_None, // S4_pstorerft_rr = 2344
14183 CEFBS_None, // S4_pstorerftnew_abs = 2345
14184 CEFBS_None, // S4_pstorerftnew_io = 2346
14185 CEFBS_None, // S4_pstorerftnew_rr = 2347
14186 CEFBS_None, // S4_pstorerhf_abs = 2348
14187 CEFBS_None, // S4_pstorerhf_rr = 2349
14188 CEFBS_None, // S4_pstorerhfnew_abs = 2350
14189 CEFBS_None, // S4_pstorerhfnew_io = 2351
14190 CEFBS_None, // S4_pstorerhfnew_rr = 2352
14191 CEFBS_None, // S4_pstorerhnewf_abs = 2353
14192 CEFBS_None, // S4_pstorerhnewf_rr = 2354
14193 CEFBS_None, // S4_pstorerhnewfnew_abs = 2355
14194 CEFBS_None, // S4_pstorerhnewfnew_io = 2356
14195 CEFBS_None, // S4_pstorerhnewfnew_rr = 2357
14196 CEFBS_None, // S4_pstorerhnewt_abs = 2358
14197 CEFBS_None, // S4_pstorerhnewt_rr = 2359
14198 CEFBS_None, // S4_pstorerhnewtnew_abs = 2360
14199 CEFBS_None, // S4_pstorerhnewtnew_io = 2361
14200 CEFBS_None, // S4_pstorerhnewtnew_rr = 2362
14201 CEFBS_None, // S4_pstorerht_abs = 2363
14202 CEFBS_None, // S4_pstorerht_rr = 2364
14203 CEFBS_None, // S4_pstorerhtnew_abs = 2365
14204 CEFBS_None, // S4_pstorerhtnew_io = 2366
14205 CEFBS_None, // S4_pstorerhtnew_rr = 2367
14206 CEFBS_None, // S4_pstorerif_abs = 2368
14207 CEFBS_None, // S4_pstorerif_rr = 2369
14208 CEFBS_None, // S4_pstorerifnew_abs = 2370
14209 CEFBS_None, // S4_pstorerifnew_io = 2371
14210 CEFBS_None, // S4_pstorerifnew_rr = 2372
14211 CEFBS_None, // S4_pstorerinewf_abs = 2373
14212 CEFBS_None, // S4_pstorerinewf_rr = 2374
14213 CEFBS_None, // S4_pstorerinewfnew_abs = 2375
14214 CEFBS_None, // S4_pstorerinewfnew_io = 2376
14215 CEFBS_None, // S4_pstorerinewfnew_rr = 2377
14216 CEFBS_None, // S4_pstorerinewt_abs = 2378
14217 CEFBS_None, // S4_pstorerinewt_rr = 2379
14218 CEFBS_None, // S4_pstorerinewtnew_abs = 2380
14219 CEFBS_None, // S4_pstorerinewtnew_io = 2381
14220 CEFBS_None, // S4_pstorerinewtnew_rr = 2382
14221 CEFBS_None, // S4_pstorerit_abs = 2383
14222 CEFBS_None, // S4_pstorerit_rr = 2384
14223 CEFBS_None, // S4_pstoreritnew_abs = 2385
14224 CEFBS_None, // S4_pstoreritnew_io = 2386
14225 CEFBS_None, // S4_pstoreritnew_rr = 2387
14226 CEFBS_None, // S4_stored_locked = 2388
14227 CEFBS_None, // S4_storeirb_io = 2389
14228 CEFBS_None, // S4_storeirbf_io = 2390
14229 CEFBS_None, // S4_storeirbfnew_io = 2391
14230 CEFBS_None, // S4_storeirbt_io = 2392
14231 CEFBS_None, // S4_storeirbtnew_io = 2393
14232 CEFBS_None, // S4_storeirh_io = 2394
14233 CEFBS_None, // S4_storeirhf_io = 2395
14234 CEFBS_None, // S4_storeirhfnew_io = 2396
14235 CEFBS_None, // S4_storeirht_io = 2397
14236 CEFBS_None, // S4_storeirhtnew_io = 2398
14237 CEFBS_None, // S4_storeiri_io = 2399
14238 CEFBS_None, // S4_storeirif_io = 2400
14239 CEFBS_None, // S4_storeirifnew_io = 2401
14240 CEFBS_None, // S4_storeirit_io = 2402
14241 CEFBS_None, // S4_storeiritnew_io = 2403
14242 CEFBS_None, // S4_storerb_ap = 2404
14243 CEFBS_None, // S4_storerb_rr = 2405
14244 CEFBS_None, // S4_storerb_ur = 2406
14245 CEFBS_None, // S4_storerbnew_ap = 2407
14246 CEFBS_None, // S4_storerbnew_rr = 2408
14247 CEFBS_None, // S4_storerbnew_ur = 2409
14248 CEFBS_None, // S4_storerd_ap = 2410
14249 CEFBS_None, // S4_storerd_rr = 2411
14250 CEFBS_None, // S4_storerd_ur = 2412
14251 CEFBS_None, // S4_storerf_ap = 2413
14252 CEFBS_None, // S4_storerf_rr = 2414
14253 CEFBS_None, // S4_storerf_ur = 2415
14254 CEFBS_None, // S4_storerh_ap = 2416
14255 CEFBS_None, // S4_storerh_rr = 2417
14256 CEFBS_None, // S4_storerh_ur = 2418
14257 CEFBS_None, // S4_storerhnew_ap = 2419
14258 CEFBS_None, // S4_storerhnew_rr = 2420
14259 CEFBS_None, // S4_storerhnew_ur = 2421
14260 CEFBS_None, // S4_storeri_ap = 2422
14261 CEFBS_None, // S4_storeri_rr = 2423
14262 CEFBS_None, // S4_storeri_ur = 2424
14263 CEFBS_None, // S4_storerinew_ap = 2425
14264 CEFBS_None, // S4_storerinew_rr = 2426
14265 CEFBS_None, // S4_storerinew_ur = 2427
14266 CEFBS_None, // S4_subaddi = 2428
14267 CEFBS_None, // S4_subi_asl_ri = 2429
14268 CEFBS_None, // S4_subi_lsr_ri = 2430
14269 CEFBS_None, // S4_vrcrotate = 2431
14270 CEFBS_None, // S4_vrcrotate_acc = 2432
14271 CEFBS_None, // S4_vxaddsubh = 2433
14272 CEFBS_None, // S4_vxaddsubhr = 2434
14273 CEFBS_None, // S4_vxaddsubw = 2435
14274 CEFBS_None, // S4_vxsubaddh = 2436
14275 CEFBS_None, // S4_vxsubaddhr = 2437
14276 CEFBS_None, // S4_vxsubaddw = 2438
14277 CEFBS_None, // S5_asrhub_rnd_sat = 2439
14278 CEFBS_None, // S5_asrhub_sat = 2440
14279 CEFBS_None, // S5_popcountp = 2441
14280 CEFBS_None, // S5_vasrhrnd = 2442
14281 CEFBS_HasV60, // S6_rol_i_p = 2443
14282 CEFBS_HasV60, // S6_rol_i_p_acc = 2444
14283 CEFBS_HasV60, // S6_rol_i_p_and = 2445
14284 CEFBS_HasV60, // S6_rol_i_p_nac = 2446
14285 CEFBS_HasV60, // S6_rol_i_p_or = 2447
14286 CEFBS_HasV60, // S6_rol_i_p_xacc = 2448
14287 CEFBS_HasV60, // S6_rol_i_r = 2449
14288 CEFBS_HasV60, // S6_rol_i_r_acc = 2450
14289 CEFBS_HasV60, // S6_rol_i_r_and = 2451
14290 CEFBS_HasV60, // S6_rol_i_r_nac = 2452
14291 CEFBS_HasV60, // S6_rol_i_r_or = 2453
14292 CEFBS_HasV60, // S6_rol_i_r_xacc = 2454
14293 CEFBS_HasV62, // S6_vsplatrbp = 2455
14294 CEFBS_HasV62, // S6_vtrunehb_ppp = 2456
14295 CEFBS_HasV62, // S6_vtrunohb_ppp = 2457
14296 CEFBS_None, // SA1_addi = 2458
14297 CEFBS_None, // SA1_addrx = 2459
14298 CEFBS_None, // SA1_addsp = 2460
14299 CEFBS_None, // SA1_and1 = 2461
14300 CEFBS_None, // SA1_clrf = 2462
14301 CEFBS_None, // SA1_clrfnew = 2463
14302 CEFBS_None, // SA1_clrt = 2464
14303 CEFBS_None, // SA1_clrtnew = 2465
14304 CEFBS_None, // SA1_cmpeqi = 2466
14305 CEFBS_None, // SA1_combine0i = 2467
14306 CEFBS_None, // SA1_combine1i = 2468
14307 CEFBS_None, // SA1_combine2i = 2469
14308 CEFBS_None, // SA1_combine3i = 2470
14309 CEFBS_None, // SA1_combinerz = 2471
14310 CEFBS_None, // SA1_combinezr = 2472
14311 CEFBS_None, // SA1_dec = 2473
14312 CEFBS_None, // SA1_inc = 2474
14313 CEFBS_None, // SA1_seti = 2475
14314 CEFBS_None, // SA1_setin1 = 2476
14315 CEFBS_None, // SA1_sxtb = 2477
14316 CEFBS_None, // SA1_sxth = 2478
14317 CEFBS_None, // SA1_tfr = 2479
14318 CEFBS_None, // SA1_zxtb = 2480
14319 CEFBS_None, // SA1_zxth = 2481
14320 CEFBS_None, // SAVE_REGISTERS_CALL_V4 = 2482
14321 CEFBS_None, // SAVE_REGISTERS_CALL_V4STK = 2483
14322 CEFBS_None, // SAVE_REGISTERS_CALL_V4STK_EXT = 2484
14323 CEFBS_None, // SAVE_REGISTERS_CALL_V4STK_EXT_PIC = 2485
14324 CEFBS_None, // SAVE_REGISTERS_CALL_V4STK_PIC = 2486
14325 CEFBS_None, // SAVE_REGISTERS_CALL_V4_EXT = 2487
14326 CEFBS_None, // SAVE_REGISTERS_CALL_V4_EXT_PIC = 2488
14327 CEFBS_None, // SAVE_REGISTERS_CALL_V4_PIC = 2489
14328 CEFBS_None, // SL1_loadri_io = 2490
14329 CEFBS_None, // SL1_loadrub_io = 2491
14330 CEFBS_None, // SL2_deallocframe = 2492
14331 CEFBS_None, // SL2_jumpr31 = 2493
14332 CEFBS_None, // SL2_jumpr31_f = 2494
14333 CEFBS_None, // SL2_jumpr31_fnew = 2495
14334 CEFBS_None, // SL2_jumpr31_t = 2496
14335 CEFBS_None, // SL2_jumpr31_tnew = 2497
14336 CEFBS_None, // SL2_loadrb_io = 2498
14337 CEFBS_None, // SL2_loadrd_sp = 2499
14338 CEFBS_None, // SL2_loadrh_io = 2500
14339 CEFBS_None, // SL2_loadri_sp = 2501
14340 CEFBS_None, // SL2_loadruh_io = 2502
14341 CEFBS_None, // SL2_return = 2503
14342 CEFBS_None, // SL2_return_f = 2504
14343 CEFBS_None, // SL2_return_fnew = 2505
14344 CEFBS_None, // SL2_return_t = 2506
14345 CEFBS_None, // SL2_return_tnew = 2507
14346 CEFBS_None, // SS1_storeb_io = 2508
14347 CEFBS_None, // SS1_storew_io = 2509
14348 CEFBS_None, // SS2_allocframe = 2510
14349 CEFBS_None, // SS2_storebi0 = 2511
14350 CEFBS_None, // SS2_storebi1 = 2512
14351 CEFBS_None, // SS2_stored_sp = 2513
14352 CEFBS_None, // SS2_storeh_io = 2514
14353 CEFBS_None, // SS2_storew_sp = 2515
14354 CEFBS_None, // SS2_storewi0 = 2516
14355 CEFBS_None, // SS2_storewi1 = 2517
14356 CEFBS_None, // TFRI64_V2_ext = 2518
14357 CEFBS_None, // TFRI64_V4 = 2519
14358 CEFBS_UseHVXV60, // V6_extractw = 2520
14359 CEFBS_UseHVXV62, // V6_lvsplatb = 2521
14360 CEFBS_UseHVXV62, // V6_lvsplath = 2522
14361 CEFBS_UseHVXV60, // V6_lvsplatw = 2523
14362 CEFBS_UseHVXV60, // V6_pred_and = 2524
14363 CEFBS_UseHVXV60, // V6_pred_and_n = 2525
14364 CEFBS_UseHVXV60, // V6_pred_not = 2526
14365 CEFBS_UseHVXV60, // V6_pred_or = 2527
14366 CEFBS_UseHVXV60, // V6_pred_or_n = 2528
14367 CEFBS_UseHVXV60, // V6_pred_scalar2 = 2529
14368 CEFBS_UseHVXV62, // V6_pred_scalar2v2 = 2530
14369 CEFBS_UseHVXV60, // V6_pred_xor = 2531
14370 CEFBS_UseHVXV62, // V6_shuffeqh = 2532
14371 CEFBS_UseHVXV62, // V6_shuffeqw = 2533
14372 CEFBS_UseHVXV60, // V6_vL32Ub_ai = 2534
14373 CEFBS_UseHVXV60, // V6_vL32Ub_pi = 2535
14374 CEFBS_UseHVXV60, // V6_vL32Ub_ppu = 2536
14375 CEFBS_UseHVXV60, // V6_vL32b_ai = 2537
14376 CEFBS_UseHVXV60, // V6_vL32b_cur_ai = 2538
14377 CEFBS_UseHVXV62, // V6_vL32b_cur_npred_ai = 2539
14378 CEFBS_UseHVXV62, // V6_vL32b_cur_npred_pi = 2540
14379 CEFBS_UseHVXV62, // V6_vL32b_cur_npred_ppu = 2541
14380 CEFBS_UseHVXV60, // V6_vL32b_cur_pi = 2542
14381 CEFBS_UseHVXV60, // V6_vL32b_cur_ppu = 2543
14382 CEFBS_UseHVXV62, // V6_vL32b_cur_pred_ai = 2544
14383 CEFBS_UseHVXV62, // V6_vL32b_cur_pred_pi = 2545
14384 CEFBS_UseHVXV62, // V6_vL32b_cur_pred_ppu = 2546
14385 CEFBS_UseHVXV62, // V6_vL32b_npred_ai = 2547
14386 CEFBS_UseHVXV62, // V6_vL32b_npred_pi = 2548
14387 CEFBS_UseHVXV62, // V6_vL32b_npred_ppu = 2549
14388 CEFBS_UseHVXV60, // V6_vL32b_nt_ai = 2550
14389 CEFBS_UseHVXV60, // V6_vL32b_nt_cur_ai = 2551
14390 CEFBS_UseHVXV62, // V6_vL32b_nt_cur_npred_ai = 2552
14391 CEFBS_UseHVXV62, // V6_vL32b_nt_cur_npred_pi = 2553
14392 CEFBS_UseHVXV62, // V6_vL32b_nt_cur_npred_ppu = 2554
14393 CEFBS_UseHVXV60, // V6_vL32b_nt_cur_pi = 2555
14394 CEFBS_UseHVXV60, // V6_vL32b_nt_cur_ppu = 2556
14395 CEFBS_UseHVXV62, // V6_vL32b_nt_cur_pred_ai = 2557
14396 CEFBS_UseHVXV62, // V6_vL32b_nt_cur_pred_pi = 2558
14397 CEFBS_UseHVXV62, // V6_vL32b_nt_cur_pred_ppu = 2559
14398 CEFBS_UseHVXV62, // V6_vL32b_nt_npred_ai = 2560
14399 CEFBS_UseHVXV62, // V6_vL32b_nt_npred_pi = 2561
14400 CEFBS_UseHVXV62, // V6_vL32b_nt_npred_ppu = 2562
14401 CEFBS_UseHVXV60, // V6_vL32b_nt_pi = 2563
14402 CEFBS_UseHVXV60, // V6_vL32b_nt_ppu = 2564
14403 CEFBS_UseHVXV62, // V6_vL32b_nt_pred_ai = 2565
14404 CEFBS_UseHVXV62, // V6_vL32b_nt_pred_pi = 2566
14405 CEFBS_UseHVXV62, // V6_vL32b_nt_pred_ppu = 2567
14406 CEFBS_UseHVXV60, // V6_vL32b_nt_tmp_ai = 2568
14407 CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_npred_ai = 2569
14408 CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_npred_pi = 2570
14409 CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_npred_ppu = 2571
14410 CEFBS_UseHVXV60, // V6_vL32b_nt_tmp_pi = 2572
14411 CEFBS_UseHVXV60, // V6_vL32b_nt_tmp_ppu = 2573
14412 CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_pred_ai = 2574
14413 CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_pred_pi = 2575
14414 CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_pred_ppu = 2576
14415 CEFBS_UseHVXV60, // V6_vL32b_pi = 2577
14416 CEFBS_UseHVXV60, // V6_vL32b_ppu = 2578
14417 CEFBS_UseHVXV62, // V6_vL32b_pred_ai = 2579
14418 CEFBS_UseHVXV62, // V6_vL32b_pred_pi = 2580
14419 CEFBS_UseHVXV62, // V6_vL32b_pred_ppu = 2581
14420 CEFBS_UseHVXV60, // V6_vL32b_tmp_ai = 2582
14421 CEFBS_UseHVXV62, // V6_vL32b_tmp_npred_ai = 2583
14422 CEFBS_UseHVXV62, // V6_vL32b_tmp_npred_pi = 2584
14423 CEFBS_UseHVXV62, // V6_vL32b_tmp_npred_ppu = 2585
14424 CEFBS_UseHVXV60, // V6_vL32b_tmp_pi = 2586
14425 CEFBS_UseHVXV60, // V6_vL32b_tmp_ppu = 2587
14426 CEFBS_UseHVXV62, // V6_vL32b_tmp_pred_ai = 2588
14427 CEFBS_UseHVXV62, // V6_vL32b_tmp_pred_pi = 2589
14428 CEFBS_UseHVXV62, // V6_vL32b_tmp_pred_ppu = 2590
14429 CEFBS_UseHVXV60, // V6_vS32Ub_ai = 2591
14430 CEFBS_UseHVXV60, // V6_vS32Ub_npred_ai = 2592
14431 CEFBS_UseHVXV60, // V6_vS32Ub_npred_pi = 2593
14432 CEFBS_UseHVXV60, // V6_vS32Ub_npred_ppu = 2594
14433 CEFBS_UseHVXV60, // V6_vS32Ub_pi = 2595
14434 CEFBS_UseHVXV60, // V6_vS32Ub_ppu = 2596
14435 CEFBS_UseHVXV60, // V6_vS32Ub_pred_ai = 2597
14436 CEFBS_UseHVXV60, // V6_vS32Ub_pred_pi = 2598
14437 CEFBS_UseHVXV60, // V6_vS32Ub_pred_ppu = 2599
14438 CEFBS_UseHVXV60, // V6_vS32b_ai = 2600
14439 CEFBS_UseHVXV60, // V6_vS32b_new_ai = 2601
14440 CEFBS_UseHVXV60, // V6_vS32b_new_npred_ai = 2602
14441 CEFBS_UseHVXV60, // V6_vS32b_new_npred_pi = 2603
14442 CEFBS_UseHVXV60, // V6_vS32b_new_npred_ppu = 2604
14443 CEFBS_UseHVXV60, // V6_vS32b_new_pi = 2605
14444 CEFBS_UseHVXV60, // V6_vS32b_new_ppu = 2606
14445 CEFBS_UseHVXV60, // V6_vS32b_new_pred_ai = 2607
14446 CEFBS_UseHVXV60, // V6_vS32b_new_pred_pi = 2608
14447 CEFBS_UseHVXV60, // V6_vS32b_new_pred_ppu = 2609
14448 CEFBS_UseHVXV60, // V6_vS32b_npred_ai = 2610
14449 CEFBS_UseHVXV60, // V6_vS32b_npred_pi = 2611
14450 CEFBS_UseHVXV60, // V6_vS32b_npred_ppu = 2612
14451 CEFBS_UseHVXV60, // V6_vS32b_nqpred_ai = 2613
14452 CEFBS_UseHVXV60, // V6_vS32b_nqpred_pi = 2614
14453 CEFBS_UseHVXV60, // V6_vS32b_nqpred_ppu = 2615
14454 CEFBS_UseHVXV60, // V6_vS32b_nt_ai = 2616
14455 CEFBS_UseHVXV60, // V6_vS32b_nt_new_ai = 2617
14456 CEFBS_UseHVXV60, // V6_vS32b_nt_new_npred_ai = 2618
14457 CEFBS_UseHVXV60, // V6_vS32b_nt_new_npred_pi = 2619
14458 CEFBS_UseHVXV60, // V6_vS32b_nt_new_npred_ppu = 2620
14459 CEFBS_UseHVXV60, // V6_vS32b_nt_new_pi = 2621
14460 CEFBS_UseHVXV60, // V6_vS32b_nt_new_ppu = 2622
14461 CEFBS_UseHVXV60, // V6_vS32b_nt_new_pred_ai = 2623
14462 CEFBS_UseHVXV60, // V6_vS32b_nt_new_pred_pi = 2624
14463 CEFBS_UseHVXV60, // V6_vS32b_nt_new_pred_ppu = 2625
14464 CEFBS_UseHVXV60, // V6_vS32b_nt_npred_ai = 2626
14465 CEFBS_UseHVXV60, // V6_vS32b_nt_npred_pi = 2627
14466 CEFBS_UseHVXV60, // V6_vS32b_nt_npred_ppu = 2628
14467 CEFBS_UseHVXV60, // V6_vS32b_nt_nqpred_ai = 2629
14468 CEFBS_UseHVXV60, // V6_vS32b_nt_nqpred_pi = 2630
14469 CEFBS_UseHVXV60, // V6_vS32b_nt_nqpred_ppu = 2631
14470 CEFBS_UseHVXV60, // V6_vS32b_nt_pi = 2632
14471 CEFBS_UseHVXV60, // V6_vS32b_nt_ppu = 2633
14472 CEFBS_UseHVXV60, // V6_vS32b_nt_pred_ai = 2634
14473 CEFBS_UseHVXV60, // V6_vS32b_nt_pred_pi = 2635
14474 CEFBS_UseHVXV60, // V6_vS32b_nt_pred_ppu = 2636
14475 CEFBS_UseHVXV60, // V6_vS32b_nt_qpred_ai = 2637
14476 CEFBS_UseHVXV60, // V6_vS32b_nt_qpred_pi = 2638
14477 CEFBS_UseHVXV60, // V6_vS32b_nt_qpred_ppu = 2639
14478 CEFBS_UseHVXV60, // V6_vS32b_pi = 2640
14479 CEFBS_UseHVXV60, // V6_vS32b_ppu = 2641
14480 CEFBS_UseHVXV60, // V6_vS32b_pred_ai = 2642
14481 CEFBS_UseHVXV60, // V6_vS32b_pred_pi = 2643
14482 CEFBS_UseHVXV60, // V6_vS32b_pred_ppu = 2644
14483 CEFBS_UseHVXV60, // V6_vS32b_qpred_ai = 2645
14484 CEFBS_UseHVXV60, // V6_vS32b_qpred_pi = 2646
14485 CEFBS_UseHVXV60, // V6_vS32b_qpred_ppu = 2647
14486 CEFBS_UseHVXV65, // V6_vS32b_srls_ai = 2648
14487 CEFBS_UseHVXV65, // V6_vS32b_srls_pi = 2649
14488 CEFBS_UseHVXV65, // V6_vS32b_srls_ppu = 2650
14489 CEFBS_UseHVXV65, // V6_vabsb = 2651
14490 CEFBS_UseHVXV65, // V6_vabsb_sat = 2652
14491 CEFBS_UseHVXV60, // V6_vabsdiffh = 2653
14492 CEFBS_UseHVXV60, // V6_vabsdiffub = 2654
14493 CEFBS_UseHVXV60, // V6_vabsdiffuh = 2655
14494 CEFBS_UseHVXV60, // V6_vabsdiffw = 2656
14495 CEFBS_UseHVXV60, // V6_vabsh = 2657
14496 CEFBS_UseHVXV60, // V6_vabsh_sat = 2658
14497 CEFBS_UseHVXV60, // V6_vabsw = 2659
14498 CEFBS_UseHVXV60, // V6_vabsw_sat = 2660
14499 CEFBS_UseHVXV60, // V6_vaddb = 2661
14500 CEFBS_UseHVXV60, // V6_vaddb_dv = 2662
14501 CEFBS_UseHVXV60, // V6_vaddbnq = 2663
14502 CEFBS_UseHVXV60, // V6_vaddbq = 2664
14503 CEFBS_UseHVXV62, // V6_vaddbsat = 2665
14504 CEFBS_UseHVXV62, // V6_vaddbsat_dv = 2666
14505 CEFBS_UseHVXV62, // V6_vaddcarry = 2667
14506 CEFBS_UseHVXV66, // V6_vaddcarryo = 2668
14507 CEFBS_UseHVXV66, // V6_vaddcarrysat = 2669
14508 CEFBS_UseHVXV62, // V6_vaddclbh = 2670
14509 CEFBS_UseHVXV62, // V6_vaddclbw = 2671
14510 CEFBS_UseHVXV60, // V6_vaddh = 2672
14511 CEFBS_UseHVXV60, // V6_vaddh_dv = 2673
14512 CEFBS_UseHVXV60, // V6_vaddhnq = 2674
14513 CEFBS_UseHVXV60, // V6_vaddhq = 2675
14514 CEFBS_UseHVXV60, // V6_vaddhsat = 2676
14515 CEFBS_UseHVXV60, // V6_vaddhsat_dv = 2677
14516 CEFBS_UseHVXV60, // V6_vaddhw = 2678
14517 CEFBS_UseHVXV62, // V6_vaddhw_acc = 2679
14518 CEFBS_UseHVXV60, // V6_vaddubh = 2680
14519 CEFBS_UseHVXV62, // V6_vaddubh_acc = 2681
14520 CEFBS_UseHVXV60, // V6_vaddubsat = 2682
14521 CEFBS_UseHVXV60, // V6_vaddubsat_dv = 2683
14522 CEFBS_UseHVXV62, // V6_vaddububb_sat = 2684
14523 CEFBS_UseHVXV60, // V6_vadduhsat = 2685
14524 CEFBS_UseHVXV60, // V6_vadduhsat_dv = 2686
14525 CEFBS_UseHVXV60, // V6_vadduhw = 2687
14526 CEFBS_UseHVXV62, // V6_vadduhw_acc = 2688
14527 CEFBS_UseHVXV62, // V6_vadduwsat = 2689
14528 CEFBS_UseHVXV62, // V6_vadduwsat_dv = 2690
14529 CEFBS_UseHVXV60, // V6_vaddw = 2691
14530 CEFBS_UseHVXV60, // V6_vaddw_dv = 2692
14531 CEFBS_UseHVXV60, // V6_vaddwnq = 2693
14532 CEFBS_UseHVXV60, // V6_vaddwq = 2694
14533 CEFBS_UseHVXV60, // V6_vaddwsat = 2695
14534 CEFBS_UseHVXV60, // V6_vaddwsat_dv = 2696
14535 CEFBS_UseHVXV60, // V6_valignb = 2697
14536 CEFBS_UseHVXV60, // V6_valignbi = 2698
14537 CEFBS_UseHVXV60, // V6_vand = 2699
14538 CEFBS_UseHVXV62, // V6_vandnqrt = 2700
14539 CEFBS_UseHVXV62, // V6_vandnqrt_acc = 2701
14540 CEFBS_UseHVXV60, // V6_vandqrt = 2702
14541 CEFBS_UseHVXV60, // V6_vandqrt_acc = 2703
14542 CEFBS_UseHVXV62, // V6_vandvnqv = 2704
14543 CEFBS_UseHVXV62, // V6_vandvqv = 2705
14544 CEFBS_UseHVXV60, // V6_vandvrt = 2706
14545 CEFBS_UseHVXV60, // V6_vandvrt_acc = 2707
14546 CEFBS_UseHVXV60, // V6_vaslh = 2708
14547 CEFBS_UseHVXV65, // V6_vaslh_acc = 2709
14548 CEFBS_UseHVXV60, // V6_vaslhv = 2710
14549 CEFBS_UseHVXV60, // V6_vaslw = 2711
14550 CEFBS_UseHVXV60, // V6_vaslw_acc = 2712
14551 CEFBS_UseHVXV60, // V6_vaslwv = 2713
14552 CEFBS_UseHVXV66, // V6_vasr_into = 2714
14553 CEFBS_UseHVXV60, // V6_vasrh = 2715
14554 CEFBS_UseHVXV65, // V6_vasrh_acc = 2716
14555 CEFBS_UseHVXV60, // V6_vasrhbrndsat = 2717
14556 CEFBS_UseHVXV62, // V6_vasrhbsat = 2718
14557 CEFBS_UseHVXV60, // V6_vasrhubrndsat = 2719
14558 CEFBS_UseHVXV60, // V6_vasrhubsat = 2720
14559 CEFBS_UseHVXV60, // V6_vasrhv = 2721
14560 CEFBS_UseHVXV65, // V6_vasruhubrndsat = 2722
14561 CEFBS_UseHVXV65, // V6_vasruhubsat = 2723
14562 CEFBS_UseHVXV62, // V6_vasruwuhrndsat = 2724
14563 CEFBS_UseHVXV65, // V6_vasruwuhsat = 2725
14564 CEFBS_UseHVXV60, // V6_vasrw = 2726
14565 CEFBS_UseHVXV60, // V6_vasrw_acc = 2727
14566 CEFBS_UseHVXV60, // V6_vasrwh = 2728
14567 CEFBS_UseHVXV60, // V6_vasrwhrndsat = 2729
14568 CEFBS_UseHVXV60, // V6_vasrwhsat = 2730
14569 CEFBS_UseHVXV62, // V6_vasrwuhrndsat = 2731
14570 CEFBS_UseHVXV60, // V6_vasrwuhsat = 2732
14571 CEFBS_UseHVXV60, // V6_vasrwv = 2733
14572 CEFBS_UseHVXV60, // V6_vassign = 2734
14573 CEFBS_UseHVXV65, // V6_vavgb = 2735
14574 CEFBS_UseHVXV65, // V6_vavgbrnd = 2736
14575 CEFBS_UseHVXV60, // V6_vavgh = 2737
14576 CEFBS_UseHVXV60, // V6_vavghrnd = 2738
14577 CEFBS_UseHVXV60, // V6_vavgub = 2739
14578 CEFBS_UseHVXV60, // V6_vavgubrnd = 2740
14579 CEFBS_UseHVXV60, // V6_vavguh = 2741
14580 CEFBS_UseHVXV60, // V6_vavguhrnd = 2742
14581 CEFBS_UseHVXV65, // V6_vavguw = 2743
14582 CEFBS_UseHVXV65, // V6_vavguwrnd = 2744
14583 CEFBS_UseHVXV60, // V6_vavgw = 2745
14584 CEFBS_UseHVXV60, // V6_vavgwrnd = 2746
14585 CEFBS_UseHVXV60, // V6_vccombine = 2747
14586 CEFBS_UseHVXV60, // V6_vcl0h = 2748
14587 CEFBS_UseHVXV60, // V6_vcl0w = 2749
14588 CEFBS_UseHVXV60, // V6_vcmov = 2750
14589 CEFBS_UseHVXV60, // V6_vcombine = 2751
14590 CEFBS_UseHVXV60, // V6_vdeal = 2752
14591 CEFBS_UseHVXV60, // V6_vdealb = 2753
14592 CEFBS_UseHVXV60, // V6_vdealb4w = 2754
14593 CEFBS_UseHVXV60, // V6_vdealh = 2755
14594 CEFBS_UseHVXV60, // V6_vdealvdd = 2756
14595 CEFBS_UseHVXV60, // V6_vdelta = 2757
14596 CEFBS_UseHVXV60, // V6_vdmpybus = 2758
14597 CEFBS_UseHVXV60, // V6_vdmpybus_acc = 2759
14598 CEFBS_UseHVXV60, // V6_vdmpybus_dv = 2760
14599 CEFBS_UseHVXV60, // V6_vdmpybus_dv_acc = 2761
14600 CEFBS_UseHVXV60, // V6_vdmpyhb = 2762
14601 CEFBS_UseHVXV60, // V6_vdmpyhb_acc = 2763
14602 CEFBS_UseHVXV60, // V6_vdmpyhb_dv = 2764
14603 CEFBS_UseHVXV60, // V6_vdmpyhb_dv_acc = 2765
14604 CEFBS_UseHVXV60, // V6_vdmpyhisat = 2766
14605 CEFBS_UseHVXV60, // V6_vdmpyhisat_acc = 2767
14606 CEFBS_UseHVXV60, // V6_vdmpyhsat = 2768
14607 CEFBS_UseHVXV60, // V6_vdmpyhsat_acc = 2769
14608 CEFBS_UseHVXV60, // V6_vdmpyhsuisat = 2770
14609 CEFBS_UseHVXV60, // V6_vdmpyhsuisat_acc = 2771
14610 CEFBS_UseHVXV60, // V6_vdmpyhsusat = 2772
14611 CEFBS_UseHVXV60, // V6_vdmpyhsusat_acc = 2773
14612 CEFBS_UseHVXV60, // V6_vdmpyhvsat = 2774
14613 CEFBS_UseHVXV60, // V6_vdmpyhvsat_acc = 2775
14614 CEFBS_UseHVXV60, // V6_vdsaduh = 2776
14615 CEFBS_UseHVXV60, // V6_vdsaduh_acc = 2777
14616 CEFBS_UseHVXV60, // V6_veqb = 2778
14617 CEFBS_UseHVXV60, // V6_veqb_and = 2779
14618 CEFBS_UseHVXV60, // V6_veqb_or = 2780
14619 CEFBS_UseHVXV60, // V6_veqb_xor = 2781
14620 CEFBS_UseHVXV60, // V6_veqh = 2782
14621 CEFBS_UseHVXV60, // V6_veqh_and = 2783
14622 CEFBS_UseHVXV60, // V6_veqh_or = 2784
14623 CEFBS_UseHVXV60, // V6_veqh_xor = 2785
14624 CEFBS_UseHVXV60, // V6_veqw = 2786
14625 CEFBS_UseHVXV60, // V6_veqw_and = 2787
14626 CEFBS_UseHVXV60, // V6_veqw_or = 2788
14627 CEFBS_UseHVXV60, // V6_veqw_xor = 2789
14628 CEFBS_UseHVXV65, // V6_vgathermh = 2790
14629 CEFBS_UseHVXV65, // V6_vgathermhq = 2791
14630 CEFBS_UseHVXV65, // V6_vgathermhw = 2792
14631 CEFBS_UseHVXV65, // V6_vgathermhwq = 2793
14632 CEFBS_UseHVXV65, // V6_vgathermw = 2794
14633 CEFBS_UseHVXV65, // V6_vgathermwq = 2795
14634 CEFBS_UseHVXV60, // V6_vgtb = 2796
14635 CEFBS_UseHVXV60, // V6_vgtb_and = 2797
14636 CEFBS_UseHVXV60, // V6_vgtb_or = 2798
14637 CEFBS_UseHVXV60, // V6_vgtb_xor = 2799
14638 CEFBS_UseHVXV60, // V6_vgth = 2800
14639 CEFBS_UseHVXV60, // V6_vgth_and = 2801
14640 CEFBS_UseHVXV60, // V6_vgth_or = 2802
14641 CEFBS_UseHVXV60, // V6_vgth_xor = 2803
14642 CEFBS_UseHVXV60, // V6_vgtub = 2804
14643 CEFBS_UseHVXV60, // V6_vgtub_and = 2805
14644 CEFBS_UseHVXV60, // V6_vgtub_or = 2806
14645 CEFBS_UseHVXV60, // V6_vgtub_xor = 2807
14646 CEFBS_UseHVXV60, // V6_vgtuh = 2808
14647 CEFBS_UseHVXV60, // V6_vgtuh_and = 2809
14648 CEFBS_UseHVXV60, // V6_vgtuh_or = 2810
14649 CEFBS_UseHVXV60, // V6_vgtuh_xor = 2811
14650 CEFBS_UseHVXV60, // V6_vgtuw = 2812
14651 CEFBS_UseHVXV60, // V6_vgtuw_and = 2813
14652 CEFBS_UseHVXV60, // V6_vgtuw_or = 2814
14653 CEFBS_UseHVXV60, // V6_vgtuw_xor = 2815
14654 CEFBS_UseHVXV60, // V6_vgtw = 2816
14655 CEFBS_UseHVXV60, // V6_vgtw_and = 2817
14656 CEFBS_UseHVXV60, // V6_vgtw_or = 2818
14657 CEFBS_UseHVXV60, // V6_vgtw_xor = 2819
14658 CEFBS_UseHVXV60, // V6_vhist = 2820
14659 CEFBS_UseHVXV60, // V6_vhistq = 2821
14660 CEFBS_UseHVXV60, // V6_vinsertwr = 2822
14661 CEFBS_UseHVXV60, // V6_vlalignb = 2823
14662 CEFBS_UseHVXV60, // V6_vlalignbi = 2824
14663 CEFBS_UseHVXV62, // V6_vlsrb = 2825
14664 CEFBS_UseHVXV60, // V6_vlsrh = 2826
14665 CEFBS_UseHVXV60, // V6_vlsrhv = 2827
14666 CEFBS_UseHVXV60, // V6_vlsrw = 2828
14667 CEFBS_UseHVXV60, // V6_vlsrwv = 2829
14668 CEFBS_UseHVXV65, // V6_vlut4 = 2830
14669 CEFBS_UseHVXV60, // V6_vlutvvb = 2831
14670 CEFBS_UseHVXV62, // V6_vlutvvb_nm = 2832
14671 CEFBS_UseHVXV60, // V6_vlutvvb_oracc = 2833
14672 CEFBS_UseHVXV62, // V6_vlutvvb_oracci = 2834
14673 CEFBS_UseHVXV62, // V6_vlutvvbi = 2835
14674 CEFBS_UseHVXV60, // V6_vlutvwh = 2836
14675 CEFBS_UseHVXV62, // V6_vlutvwh_nm = 2837
14676 CEFBS_UseHVXV60, // V6_vlutvwh_oracc = 2838
14677 CEFBS_UseHVXV62, // V6_vlutvwh_oracci = 2839
14678 CEFBS_UseHVXV62, // V6_vlutvwhi = 2840
14679 CEFBS_UseHVXV62, // V6_vmaxb = 2841
14680 CEFBS_UseHVXV60, // V6_vmaxh = 2842
14681 CEFBS_UseHVXV60, // V6_vmaxub = 2843
14682 CEFBS_UseHVXV60, // V6_vmaxuh = 2844
14683 CEFBS_UseHVXV60, // V6_vmaxw = 2845
14684 CEFBS_UseHVXV62, // V6_vminb = 2846
14685 CEFBS_UseHVXV60, // V6_vminh = 2847
14686 CEFBS_UseHVXV60, // V6_vminub = 2848
14687 CEFBS_UseHVXV60, // V6_vminuh = 2849
14688 CEFBS_UseHVXV60, // V6_vminw = 2850
14689 CEFBS_UseHVXV60, // V6_vmpabus = 2851
14690 CEFBS_UseHVXV60, // V6_vmpabus_acc = 2852
14691 CEFBS_UseHVXV60, // V6_vmpabusv = 2853
14692 CEFBS_UseHVXV65, // V6_vmpabuu = 2854
14693 CEFBS_UseHVXV65, // V6_vmpabuu_acc = 2855
14694 CEFBS_UseHVXV60, // V6_vmpabuuv = 2856
14695 CEFBS_UseHVXV60, // V6_vmpahb = 2857
14696 CEFBS_UseHVXV60, // V6_vmpahb_acc = 2858
14697 CEFBS_UseHVXV65, // V6_vmpahhsat = 2859
14698 CEFBS_UseHVXV62, // V6_vmpauhb = 2860
14699 CEFBS_UseHVXV62, // V6_vmpauhb_acc = 2861
14700 CEFBS_UseHVXV65, // V6_vmpauhuhsat = 2862
14701 CEFBS_UseHVXV65, // V6_vmpsuhuhsat = 2863
14702 CEFBS_UseHVXV60, // V6_vmpybus = 2864
14703 CEFBS_UseHVXV60, // V6_vmpybus_acc = 2865
14704 CEFBS_UseHVXV60, // V6_vmpybusv = 2866
14705 CEFBS_UseHVXV60, // V6_vmpybusv_acc = 2867
14706 CEFBS_UseHVXV60, // V6_vmpybv = 2868
14707 CEFBS_UseHVXV60, // V6_vmpybv_acc = 2869
14708 CEFBS_UseHVXV60, // V6_vmpyewuh = 2870
14709 CEFBS_UseHVXV62, // V6_vmpyewuh_64 = 2871
14710 CEFBS_UseHVXV60, // V6_vmpyh = 2872
14711 CEFBS_UseHVXV65, // V6_vmpyh_acc = 2873
14712 CEFBS_UseHVXV60, // V6_vmpyhsat_acc = 2874
14713 CEFBS_UseHVXV60, // V6_vmpyhsrs = 2875
14714 CEFBS_UseHVXV60, // V6_vmpyhss = 2876
14715 CEFBS_UseHVXV60, // V6_vmpyhus = 2877
14716 CEFBS_UseHVXV60, // V6_vmpyhus_acc = 2878
14717 CEFBS_UseHVXV60, // V6_vmpyhv = 2879
14718 CEFBS_UseHVXV60, // V6_vmpyhv_acc = 2880
14719 CEFBS_UseHVXV60, // V6_vmpyhvsrs = 2881
14720 CEFBS_UseHVXV60, // V6_vmpyieoh = 2882
14721 CEFBS_UseHVXV60, // V6_vmpyiewh_acc = 2883
14722 CEFBS_UseHVXV60, // V6_vmpyiewuh = 2884
14723 CEFBS_UseHVXV60, // V6_vmpyiewuh_acc = 2885
14724 CEFBS_UseHVXV60, // V6_vmpyih = 2886
14725 CEFBS_UseHVXV60, // V6_vmpyih_acc = 2887
14726 CEFBS_UseHVXV60, // V6_vmpyihb = 2888
14727 CEFBS_UseHVXV60, // V6_vmpyihb_acc = 2889
14728 CEFBS_UseHVXV60, // V6_vmpyiowh = 2890
14729 CEFBS_UseHVXV60, // V6_vmpyiwb = 2891
14730 CEFBS_UseHVXV60, // V6_vmpyiwb_acc = 2892
14731 CEFBS_UseHVXV60, // V6_vmpyiwh = 2893
14732 CEFBS_UseHVXV60, // V6_vmpyiwh_acc = 2894
14733 CEFBS_UseHVXV62, // V6_vmpyiwub = 2895
14734 CEFBS_UseHVXV62, // V6_vmpyiwub_acc = 2896
14735 CEFBS_UseHVXV60, // V6_vmpyowh = 2897
14736 CEFBS_UseHVXV62, // V6_vmpyowh_64_acc = 2898
14737 CEFBS_UseHVXV60, // V6_vmpyowh_rnd = 2899
14738 CEFBS_UseHVXV60, // V6_vmpyowh_rnd_sacc = 2900
14739 CEFBS_UseHVXV60, // V6_vmpyowh_sacc = 2901
14740 CEFBS_UseHVXV60, // V6_vmpyub = 2902
14741 CEFBS_UseHVXV60, // V6_vmpyub_acc = 2903
14742 CEFBS_UseHVXV60, // V6_vmpyubv = 2904
14743 CEFBS_UseHVXV60, // V6_vmpyubv_acc = 2905
14744 CEFBS_UseHVXV60, // V6_vmpyuh = 2906
14745 CEFBS_UseHVXV60, // V6_vmpyuh_acc = 2907
14746 CEFBS_UseHVXV65, // V6_vmpyuhe = 2908
14747 CEFBS_UseHVXV65, // V6_vmpyuhe_acc = 2909
14748 CEFBS_UseHVXV60, // V6_vmpyuhv = 2910
14749 CEFBS_UseHVXV60, // V6_vmpyuhv_acc = 2911
14750 CEFBS_UseHVXV60, // V6_vmux = 2912
14751 CEFBS_UseHVXV65, // V6_vnavgb = 2913
14752 CEFBS_UseHVXV60, // V6_vnavgh = 2914
14753 CEFBS_UseHVXV60, // V6_vnavgub = 2915
14754 CEFBS_UseHVXV60, // V6_vnavgw = 2916
14755 CEFBS_UseHVXV60, // V6_vnccombine = 2917
14756 CEFBS_UseHVXV60, // V6_vncmov = 2918
14757 CEFBS_UseHVXV60, // V6_vnormamth = 2919
14758 CEFBS_UseHVXV60, // V6_vnormamtw = 2920
14759 CEFBS_UseHVXV60, // V6_vnot = 2921
14760 CEFBS_UseHVXV60, // V6_vor = 2922
14761 CEFBS_UseHVXV60, // V6_vpackeb = 2923
14762 CEFBS_UseHVXV60, // V6_vpackeh = 2924
14763 CEFBS_UseHVXV60, // V6_vpackhb_sat = 2925
14764 CEFBS_UseHVXV60, // V6_vpackhub_sat = 2926
14765 CEFBS_UseHVXV60, // V6_vpackob = 2927
14766 CEFBS_UseHVXV60, // V6_vpackoh = 2928
14767 CEFBS_UseHVXV60, // V6_vpackwh_sat = 2929
14768 CEFBS_UseHVXV60, // V6_vpackwuh_sat = 2930
14769 CEFBS_UseHVXV60, // V6_vpopcounth = 2931
14770 CEFBS_UseHVXV65, // V6_vprefixqb = 2932
14771 CEFBS_UseHVXV65, // V6_vprefixqh = 2933
14772 CEFBS_UseHVXV65, // V6_vprefixqw = 2934
14773 CEFBS_UseHVXV60, // V6_vrdelta = 2935
14774 CEFBS_UseHVXV65, // V6_vrmpybub_rtt = 2936
14775 CEFBS_UseHVXV65, // V6_vrmpybub_rtt_acc = 2937
14776 CEFBS_UseHVXV60, // V6_vrmpybus = 2938
14777 CEFBS_UseHVXV60, // V6_vrmpybus_acc = 2939
14778 CEFBS_UseHVXV60, // V6_vrmpybusi = 2940
14779 CEFBS_UseHVXV60, // V6_vrmpybusi_acc = 2941
14780 CEFBS_UseHVXV60, // V6_vrmpybusv = 2942
14781 CEFBS_UseHVXV60, // V6_vrmpybusv_acc = 2943
14782 CEFBS_UseHVXV60, // V6_vrmpybv = 2944
14783 CEFBS_UseHVXV60, // V6_vrmpybv_acc = 2945
14784 CEFBS_UseHVXV60, // V6_vrmpyub = 2946
14785 CEFBS_UseHVXV60, // V6_vrmpyub_acc = 2947
14786 CEFBS_UseHVXV65, // V6_vrmpyub_rtt = 2948
14787 CEFBS_UseHVXV65, // V6_vrmpyub_rtt_acc = 2949
14788 CEFBS_UseHVXV60, // V6_vrmpyubi = 2950
14789 CEFBS_UseHVXV60, // V6_vrmpyubi_acc = 2951
14790 CEFBS_UseHVXV60, // V6_vrmpyubv = 2952
14791 CEFBS_UseHVXV60, // V6_vrmpyubv_acc = 2953
14792 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rt = 2954
14793 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rt_acc = 2955
14794 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rx = 2956
14795 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rx_acc = 2957
14796 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rt = 2958
14797 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rt_acc = 2959
14798 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rx = 2960
14799 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rx_acc = 2961
14800 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rt = 2962
14801 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rt_acc = 2963
14802 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rx = 2964
14803 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rx_acc = 2965
14804 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rt = 2966
14805 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rt_acc = 2967
14806 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rx = 2968
14807 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rx_acc = 2969
14808 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rt = 2970
14809 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rt_acc = 2971
14810 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rx = 2972
14811 CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rx_acc = 2973
14812 CEFBS_UseHVXV60, // V6_vror = 2974
14813 CEFBS_UseHVXV66, // V6_vrotr = 2975
14814 CEFBS_UseHVXV60, // V6_vroundhb = 2976
14815 CEFBS_UseHVXV60, // V6_vroundhub = 2977
14816 CEFBS_UseHVXV62, // V6_vrounduhub = 2978
14817 CEFBS_UseHVXV62, // V6_vrounduwuh = 2979
14818 CEFBS_UseHVXV60, // V6_vroundwh = 2980
14819 CEFBS_UseHVXV60, // V6_vroundwuh = 2981
14820 CEFBS_UseHVXV60, // V6_vrsadubi = 2982
14821 CEFBS_UseHVXV60, // V6_vrsadubi_acc = 2983
14822 CEFBS_UseHVXV66, // V6_vsatdw = 2984
14823 CEFBS_UseHVXV60, // V6_vsathub = 2985
14824 CEFBS_UseHVXV62, // V6_vsatuwuh = 2986
14825 CEFBS_UseHVXV60, // V6_vsatwh = 2987
14826 CEFBS_UseHVXV60, // V6_vsb = 2988
14827 CEFBS_UseHVXV65, // V6_vscattermh = 2989
14828 CEFBS_UseHVXV65, // V6_vscattermh_add = 2990
14829 CEFBS_UseHVXV65, // V6_vscattermhq = 2991
14830 CEFBS_UseHVXV65, // V6_vscattermhw = 2992
14831 CEFBS_UseHVXV65, // V6_vscattermhw_add = 2993
14832 CEFBS_UseHVXV65, // V6_vscattermhwq = 2994
14833 CEFBS_UseHVXV65, // V6_vscattermw = 2995
14834 CEFBS_UseHVXV65, // V6_vscattermw_add = 2996
14835 CEFBS_UseHVXV65, // V6_vscattermwq = 2997
14836 CEFBS_UseHVXV60, // V6_vsh = 2998
14837 CEFBS_UseHVXV60, // V6_vshufeh = 2999
14838 CEFBS_UseHVXV60, // V6_vshuff = 3000
14839 CEFBS_UseHVXV60, // V6_vshuffb = 3001
14840 CEFBS_UseHVXV60, // V6_vshuffeb = 3002
14841 CEFBS_UseHVXV60, // V6_vshuffh = 3003
14842 CEFBS_UseHVXV60, // V6_vshuffob = 3004
14843 CEFBS_UseHVXV60, // V6_vshuffvdd = 3005
14844 CEFBS_UseHVXV60, // V6_vshufoeb = 3006
14845 CEFBS_UseHVXV60, // V6_vshufoeh = 3007
14846 CEFBS_UseHVXV60, // V6_vshufoh = 3008
14847 CEFBS_UseHVXV60, // V6_vsubb = 3009
14848 CEFBS_UseHVXV60, // V6_vsubb_dv = 3010
14849 CEFBS_UseHVXV60, // V6_vsubbnq = 3011
14850 CEFBS_UseHVXV60, // V6_vsubbq = 3012
14851 CEFBS_UseHVXV62, // V6_vsubbsat = 3013
14852 CEFBS_UseHVXV62, // V6_vsubbsat_dv = 3014
14853 CEFBS_UseHVXV62, // V6_vsubcarry = 3015
14854 CEFBS_UseHVXV66, // V6_vsubcarryo = 3016
14855 CEFBS_UseHVXV60, // V6_vsubh = 3017
14856 CEFBS_UseHVXV60, // V6_vsubh_dv = 3018
14857 CEFBS_UseHVXV60, // V6_vsubhnq = 3019
14858 CEFBS_UseHVXV60, // V6_vsubhq = 3020
14859 CEFBS_UseHVXV60, // V6_vsubhsat = 3021
14860 CEFBS_UseHVXV60, // V6_vsubhsat_dv = 3022
14861 CEFBS_UseHVXV60, // V6_vsubhw = 3023
14862 CEFBS_UseHVXV60, // V6_vsububh = 3024
14863 CEFBS_UseHVXV60, // V6_vsububsat = 3025
14864 CEFBS_UseHVXV60, // V6_vsububsat_dv = 3026
14865 CEFBS_UseHVXV62, // V6_vsubububb_sat = 3027
14866 CEFBS_UseHVXV60, // V6_vsubuhsat = 3028
14867 CEFBS_UseHVXV60, // V6_vsubuhsat_dv = 3029
14868 CEFBS_UseHVXV60, // V6_vsubuhw = 3030
14869 CEFBS_UseHVXV62, // V6_vsubuwsat = 3031
14870 CEFBS_UseHVXV62, // V6_vsubuwsat_dv = 3032
14871 CEFBS_UseHVXV60, // V6_vsubw = 3033
14872 CEFBS_UseHVXV60, // V6_vsubw_dv = 3034
14873 CEFBS_UseHVXV60, // V6_vsubwnq = 3035
14874 CEFBS_UseHVXV60, // V6_vsubwq = 3036
14875 CEFBS_UseHVXV60, // V6_vsubwsat = 3037
14876 CEFBS_UseHVXV60, // V6_vsubwsat_dv = 3038
14877 CEFBS_UseHVXV60, // V6_vswap = 3039
14878 CEFBS_UseHVXV60, // V6_vtmpyb = 3040
14879 CEFBS_UseHVXV60, // V6_vtmpyb_acc = 3041
14880 CEFBS_UseHVXV60, // V6_vtmpybus = 3042
14881 CEFBS_UseHVXV60, // V6_vtmpybus_acc = 3043
14882 CEFBS_UseHVXV60, // V6_vtmpyhb = 3044
14883 CEFBS_UseHVXV60, // V6_vtmpyhb_acc = 3045
14884 CEFBS_UseHVXV60, // V6_vunpackb = 3046
14885 CEFBS_UseHVXV60, // V6_vunpackh = 3047
14886 CEFBS_UseHVXV60, // V6_vunpackob = 3048
14887 CEFBS_UseHVXV60, // V6_vunpackoh = 3049
14888 CEFBS_UseHVXV60, // V6_vunpackub = 3050
14889 CEFBS_UseHVXV60, // V6_vunpackuh = 3051
14890 CEFBS_UseHVXV62, // V6_vwhist128 = 3052
14891 CEFBS_UseHVXV62, // V6_vwhist128m = 3053
14892 CEFBS_UseHVXV62, // V6_vwhist128q = 3054
14893 CEFBS_UseHVXV62, // V6_vwhist128qm = 3055
14894 CEFBS_UseHVXV62, // V6_vwhist256 = 3056
14895 CEFBS_UseHVXV62, // V6_vwhist256_sat = 3057
14896 CEFBS_UseHVXV62, // V6_vwhist256q = 3058
14897 CEFBS_UseHVXV62, // V6_vwhist256q_sat = 3059
14898 CEFBS_UseHVXV60, // V6_vxor = 3060
14899 CEFBS_UseHVXV60, // V6_vzb = 3061
14900 CEFBS_UseHVXV60, // V6_vzh = 3062
14901 CEFBS_UseHVXV66_UseZReg, // V6_zLd_ai = 3063
14902 CEFBS_UseHVXV66_UseZReg, // V6_zLd_pi = 3064
14903 CEFBS_UseHVXV66_UseZReg, // V6_zLd_ppu = 3065
14904 CEFBS_UseHVXV66_UseZReg, // V6_zLd_pred_ai = 3066
14905 CEFBS_UseHVXV66_UseZReg, // V6_zLd_pred_pi = 3067
14906 CEFBS_UseHVXV66_UseZReg, // V6_zLd_pred_ppu = 3068
14907 CEFBS_UseHVXV66_UseZReg, // V6_zextract = 3069
14908 CEFBS_None, // Y2_barrier = 3070
14909 CEFBS_None, // Y2_break = 3071
14910 CEFBS_None, // Y2_dccleana = 3072
14911 CEFBS_None, // Y2_dccleaninva = 3073
14912 CEFBS_None, // Y2_dcfetchbo = 3074
14913 CEFBS_None, // Y2_dcinva = 3075
14914 CEFBS_None, // Y2_dczeroa = 3076
14915 CEFBS_None, // Y2_icinva = 3077
14916 CEFBS_None, // Y2_isync = 3078
14917 CEFBS_None, // Y2_syncht = 3079
14918 CEFBS_None, // Y2_wait = 3080
14919 CEFBS_None, // Y4_l2fetch = 3081
14920 CEFBS_None, // Y4_trace = 3082
14921 CEFBS_None, // Y5_l2fetch = 3083
14922 CEFBS_HasV67, // Y6_diag = 3084
14923 CEFBS_HasV67, // Y6_diag0 = 3085
14924 CEFBS_HasV67, // Y6_diag1 = 3086
14925 CEFBS_None, // dep_A2_addsat = 3087
14926 CEFBS_None, // dep_A2_subsat = 3088
14927 CEFBS_None, // dep_S2_packhl = 3089
14928 CEFBS_None, // invalid_decode = 3090
14929 };
14930
14931 assert(Inst.getOpcode() < 3091);
14932 const FeatureBitset &RequiredFeatures = FeatureBitsets[RequiredFeaturesRefs[Inst.getOpcode()]];
14933 FeatureBitset MissingFeatures =
14934 (AvailableFeatures & RequiredFeatures) ^
14935 RequiredFeatures;
14936 if (MissingFeatures.any()) {
14937 std::ostringstream Msg;
14938 Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
14939 << " instruction but the ";
14940 for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
14941 if (MissingFeatures.test(i))
14942 Msg << SubtargetFeatureNames[i] << " ";
14943 Msg << "predicate(s) are not met";
14944 report_fatal_error(Msg.str());
14945 }
14946#else
14947 // Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
14948 (void)MCII;
14949#endif // NDEBUG
14950}
14951#endif
14952